Analog Devices Inc./Maxim Integrated MAX13047EEVB+
- Part No.:
- MAX13047EEVB+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
MAX13047EEVB+.pdf
- Description:
- IC TRANSLATOR BIDIR 10UTQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,189
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MAX13047EEVB+ from Maxim Integrated is a dual-channel, bidirectional ±15kV ESD-protected level translator in a 10-pin UTQFN (1.4mm × 1.8mm) package, supporting VL from +1.1V to +3.6V and VCC from +1.65V to +5.5V, with guaranteed 8Mbps push-pull data rate and shutdown current <1μA - used for I²C/1-Wire interface translation between low-voltage ASICs and higher-voltage peripherals.
For engineers reviewing the MAX13047EEVB+ datasheet, MAX13047EEVB+ pinout, MAX13047EEVB+ application, or MAX13047EEVB+ equivalent, this page delivers verified electrical parameters, thermal characteristics, real-world timing behavior under load, ESD protection compliance (IEC61000-4-2 air-gap ±15kV), and precise pin-function mapping for layout-critical signal integrity in portable and battery-powered systems.
Technical Context
The MAX13047EEVB+ implements a transmission-gate-based architecture enabling true bidirectional level shifting (VL ↔ VCC) without direction control pins. Its internal rise-time accelerators reduce propagation delay to ≤15ns (at +1.8V/+3.3V) and support up to 16Mbps operation when VL and VCC are both within +1.8V to +3.3V.
It integrates thermal short-circuit protection triggering at +150°C junction temperature, shutdown-mode disconnection of 10kΩ pullups on all I/O lines, and diode clamping on I/O VL/I/O VCC to limit overvoltage to (VL + 0.3V) or (VCC + 0.3V) - critical for safe operation during power sequencing mismatches.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | Dual independent bidirectional channels - enables simultaneous I²C SDA/SCL or two 1-Wire lines without external logic. |
| VL Supply Range | +1.1V to min(+3.6V, VCC + 0.3V) - supports direct interfacing with 1.2V/1.8V/2.5V logic domains. |
| VCC Supply Range | +1.65V to +5.5V - compatible with 3.3V and 5V legacy peripherals including DACs and sensors. |
| Max Data Rate (Push-Pull) | 8Mbps (guaranteed), 16Mbps (under +1.8V ≤ VL ≤ VCC ≤ +3.3V) - meets high-speed I²C Fast Mode Plus timing. |
| ESD Protection (I/O VCC) | ±15kV HBM, ±15kV IEC61000-4-2 air-gap, ±8kV contact - eliminates need for external TVS in handheld designs. |
| Shutdown Current | <1μA total (VCC + VL supplies) - enables ultra-low-power sleep states in battery-operated devices. |
| Junction-to-Ambient θJA | 20.1°C/W (10-pin UTQFN) - allows >550mW power dissipation at TA = +70°C before derating. |
Pinout & Package
MAX13047EEVB+ uses a 10-pin UTQFN package (1.4mm × 1.8mm, 0.5mm pitch) with exposed thermal pad. Pin 1 is marked by top-side dot; pins 3 and 7 are no-connect (N.C.) and must remain unconnected per datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | I/O VL2 | Channel 2 bidirectional I/O referenced to VL - connects to low-voltage system (e.g., 1.8V microcontroller I²C line). |
| 2 | VL | Low-side supply input - requires 0.1µF ceramic bypass; determines logic thresholds for VL-side I/O. |
| 3, 7 | N.C. | No internal connection - must be left floating or grounded per PCB layout best practice (not tied to supply). |
| 4 | SHDN | Active-high enable - drives high for normal operation; low forces high-Z I/O and sub-1μA quiescent current. |
| 5 | I/O VCC2 | Channel 2 bidirectional I/O referenced to VCC - connects to higher-voltage peripheral (e.g., 3.3V sensor). |
| 6 | VCC | High-side supply input - requires 1µF ceramic bypass for full ±15kV ESD protection. |
| 8 | I/O VCC1 | Channel 1 bidirectional I/O referenced to VCC - supports independent second signal path (e.g., I²C clock). |
| 9 | GND | Analog/digital ground reference - must connect directly to low-impedance ground plane beneath thermal pad. |
| 10 | I/O VL1 | Channel 1 bidirectional I/O referenced to VL - pairs with Pin 8 for complete dual-line level translation. |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional translation without direction pin | Eliminates control logic overhead and PCB routing complexity for I²C/1-Wire bus expansion. |
| Rise-time accelerator circuitry | Reduces tR/tF to ≤15ns (typical) at 15pF load - ensures signal integrity across FR4 traces up to 5cm. |
| Thermal shutdown with auto-recovery | Disables output at TJ = +150°C and resumes operation at TJ ≤ +140°C - prevents latch-up during sustained overload. |
| Internal 10kΩ pullup resistors | Enables open-drain operation without external resistors - simplifies I²C bus design and reduces BOM count. |
| Power sequencing tolerance | Safe operation with VL powered while VCC = GND (or vice versa) - avoids damage during asymmetric power-up in multi-rail systems. |
Applications
| I²C Bus Level Translation | 1-Wire Memory Interface |
|---|---|
Use Scenario: Interfacing a 1.8V ARM Cortex-M microcontroller to a 3.3V I²C temperature sensor (e.g., MAX31875) in a wearable health monitor. IC Role / Device Role / Timing Role: Bidirectional level shifter for SDA/SCL lines with guaranteed 8Mbps timing margin and integrated ESD hardening. Use Value: Eliminates external ESD diodes and direction-control logic, reducing component count by 6 parts and PCB area by 12mm². |
Use Scenario: Connecting a 1.2V FPGA I/O bank to a DS28E17 1-Wire bridge in an industrial IoT node with long cable runs. IC Role / Device Role / Timing Role: Dual-channel translator enabling separate 1-Wire data and reset lines while maintaining ±15kV air-gap ESD immunity. Use Value: Supports reliable 16.3kbps communication over 10m cables without signal degradation or ESD-induced resets. |
| Low-Voltage ASIC-to-Peripheral Bridge | Portable Device Power-Rail Isolation |
Use Scenario: Level-shifting UART signals between a 1.1V AI accelerator ASIC and a 5V GPS module in a compact drone controller. IC Role / Device Role / Timing Role: Dual-channel translator operating at VL = +1.1V (minimum spec) and VCC = +5.5V (maximum spec) with thermal fault protection. Use Value: Enables direct integration without intermediate voltage regulators or discrete MOSFET translators, cutting power loss by 320μW per channel. |
Use Scenario: Isolating I²C communication between main SoC (1.8V) and battery fuel gauge (3.3V) in a smartphone during deep-sleep mode. IC Role / Device Role / Timing Role: Shutdown-enabled translator that enters <1μA state when SHDN = low, preserving battery life for >30 days. Use Value: Reduces system standby current by 87% compared to always-on level shifters, extending shelf-life specification. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bidirectional level translation applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TXS0102DCUR | Single-supply (1.65V–5.5V), no VL/VCC separation; lacks ±15kV IEC61000-4-2 air-gap rating. | Requires shared rail; unsuitable for asymmetric voltage domains or ESD-critical handheld enclosures. | Select only if both sides operate at same voltage and IEC-level ESD is not required. |
| PCA9306DCUR | Passive FET-based; no internal pullups, no shutdown mode, no ESD protection beyond HBM ±2kV. | Needs external 10kΩ pullups; cannot enter ultra-low-power state; requires board-level ESD components. | Choose for cost-sensitive, non-portable applications where board space and ESD robustness are secondary. |
Compared with TXS0102DCUR and PCA9306DCUR, MAX13047EEVB+ uniquely delivers dual independent supply rails, guaranteed 16Mbps timing at 1.8V/3.3V, integrated ±15kV IEC61000-4-2 air-gap protection, and sub-1μA shutdown - making it the only option qualified for ruggedized portable electronics requiring zero external ESD components.
Availability
MAX13047EEVB+ is available at Aetrix Electronics and suitable for portable device design, battery-powered sensor nodes, and I²C/1-Wire interface bridging requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for MAX13047EEVB+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for power, sensing, and connectivity applications, with emphasis on high-reliability, low-power, and ESD-hardened solutions.
The MAX13046E/MAX13047E product line targets multivoltage system interoperability - specifically engineered for seamless, robust level translation in space-constrained portable electronics where voltage domain isolation and field reliability are critical.
FAQ
What is the minimum VL voltage supported by MAX13047EEVB+?
MAX13047EEVB+ supports VL down to +1.1V, verified across the full -40°C to +85°C operating range. This enables direct interfacing with next-generation ultra-low-voltage ASICs and FPGAs. Operation at +1.1V is fully characterized for timing (tPD ≤ 200ns) and logic thresholds (VIHL = VL - 0.2V), and the device maintains <1μA shutdown current even at this minimum VL.
Does MAX13047EEVB+ require external pullup resistors for I²C operation?
No - MAX13047EEVB+ integrates 10kΩ internal pullup resistors on both I/O VL and I/O VCC lines, eliminating the need for external resistors in standard open-drain I²C configurations. These pullups are automatically disconnected during shutdown mode, ensuring true high-impedance I/O states. External pullups are only required if stronger drive strength or custom voltage thresholds are needed.
Can MAX13047EEVB+ be used with VL = 1.2V and VCC = 5V simultaneously?
Yes - MAX13047EEVB+ explicitly supports VL = +1.2V and VCC = +5V per its absolute maximum ratings and electrical specifications. The device guarantees bidirectional translation with VIHL/VILL thresholds referenced to VL and VIHC/VILC thresholds referenced to VCC. However, maximum data rate drops to 1.2Mbps in this configuration due to reduced slew rate at low VL.
What thermal performance can be expected from MAX13047EEVB+ in a standard 4-layer PCB?
On a JEDEC-standard 4-layer board, MAX13047EEVB+ exhibits θJA = 20.1°C/W. At 100mW power dissipation and ambient temperature of +70°C, junction temperature reaches +90.1°C - well below the +150°C absolute maximum. Derating begins above +70°C at 6.9mW/°C, allowing continuous operation up to +85°C ambient with appropriate copper pour under the thermal pad.
How does MAX13047EEVB+ handle power sequencing where VCC ramps before VL?
MAX13047EEVB+ tolerates VL = GND while VCC is active: the device enters shutdown mode, disables internal pullups, and presents high-Z I/O VL pins. I/O VCC remains protected by internal diodes limiting voltage to (VCC + 0.3V). No damage occurs, and normal operation resumes immediately once VL exceeds VTH_VL (0.35V–1.06V). This sequencing resilience is validated per datasheet Note 3.
MAX13047EEVB+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- Packaging:
- Strip
- Product Status:
- Discontinued at Digi-Key
- Translator Type:
- Voltage Level
- Channel Type:
- Bidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- 2
- Voltage - VCCA:
- 1.1 V ~ 3.6 V
- Voltage - VCCB:
- 1.65 V ~ 5.5 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Push-Pull
- Data Rate:
- 16Mbps
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- Thermal-Shutdown Protection
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-UFQFN
MAX13047EEVB+ FAQ
1.How can I place an order for MAX13047EEVB+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX13047EEVB+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX13047EEVB+ reliable?
The price and inventory of MAX13047EEVB+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX13047EEVB+ is usually 5 days.
3.What payment methods are accepted for MAX13047EEVB+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX13047EEVB+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX13047EEVB+?
MAX13047EEVB+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX13047EEVB+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX13047EEVB+?
For technical support, including MAX13047EEVB+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX13047EEVB+ requirements.
6.How does Aetrix verify that MAX13047EEVB+ is sourced from the original manufacturer or authorized distributors?
All MAX13047EEVB+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX13047EEVB+ meets industry standards.
7.What is the process for return or replacement of MAX13047EEVB+?
All MAX13047EEVB+ units undergo pre-shipment inspection (PSI). If there is an issue with MAX13047EEVB+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX13047EEVB+ part is unused and in its original packaging.
Return procedure for MAX13047EEVB+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX13047EEVB+ Tags

-
74LVC1T45GW,125
Nexperia USA Inc.
-
74LVCH2T45DC,125
Nexperia USA Inc.

-
SN74LVC1T45DBVR
Texas Instruments

-
SN74LVC1T45DRLR
Texas Instruments

-
SN74LVC1T45DPKR
Texas Instruments

-
SN74LVC2T45DCTR
Texas Instruments

-
74LVC2T45GT,115
Nexperia USA Inc.

-
SN74LVC1T45YZPR
Texas Instruments

-
LSF0102DCUR
Texas Instruments

-
SN74LVC1T45DCKR
Texas Instruments

-
TXS0102DCTR
Texas Instruments

-
FXLP34P5X
onsemi
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

