Analog Devices Inc./Maxim Integrated MAX14671EWL+T
- Part No.:
- MAX14671EWL+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Battery Management
- Package:
- 15-WFBGA, WLBGA
- Datasheet:
-
MAX14671EWL+T.pdf
- Description:
- IC BATT PROTECTION 15WLP
- Quantity:
- Payment:

- Shipping:

Inventory:2,035
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Product details
Overview
MAX14671EWL+T from Maxim Integrated is a bidirectional current-blocking, high-input overvoltage protector with adjustable OVLO threshold, featuring 15.5V ±3% internal trip voltage, 65mΩ (typ) on-resistance in WLP package, and ±4.5A continuous current capability - deployed to safeguard USB host ports and PMIC inputs in smartphones and tablets against +28V faults and +100V surges.
For engineers reviewing the MAX14671EWL+T datasheet, MAX14671EWL+T pinout, MAX14671EWL+T application, or MAX14671EWL+T equivalent, key selection considerations include its 15-bump WLP package footprint, reverse bias blocking behavior, OTG_EN-controlled bidirectional power flow, and thermal shutdown at 150°C - all critical for compact, robust portable power path design.
Technical Context
The MAX14671EWL+T integrates dual back-to-back n-channel MOSFETs with charge-pump gate drivers enabling bidirectional current blocking and OTG reverse power delivery. Its internal OVLO comparator triggers at 15.5V ±3% (rising), with 15ms startup debounce and 1µs OVP turn-off response time to prevent false triggering during hot-plug events.
It implements soft-start (25ms to 90% VOUT), IN/OUT leakage isolation (<0.1µA when disabled), and thermal shutdown with 20°C hysteresis. The device operates across -40°C to +85°C and supports external OVLO adjustment from 5V to 22V via resistor divider, though MAX14671EWL+T defaults to its factory-set 15.5V threshold.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| OVLO Threshold | 15.5V ±3% (rising edge); precise internal setting eliminates need for external resistors in fixed-threshold designs. |
| On-Resistance (RON) | 65mΩ (typ) at +25°C; minimizes voltage drop and power loss under 4.5A load in portable battery-powered systems. |
| Continuous Current | ±4.5A (WLP package); supports high-power USB host and OTG applications without external FETs or heatsinking. |
| Surge Withstand | +100V (with 2Ω series resistance); clamps transient energy before it reaches downstream PMIC or SoC rails. |
| Reverse Bias Blocking | IN remains isolated from OUT when disabled; prevents backfeed from battery or dock into input supply during fault or OTG disable. |
| Thermal Shutdown | Triggers at +150°C (typ), resets at +130°C; protects silicon integrity during sustained overload or poor PCB thermal design. |
| Package | 15-bump WLP, 1.6mm × 2.1mm; enables ultra-compact placement near USB connectors or battery terminals. |
Pinout & Package
MAX14671EWL+T uses a 15-bump Wafer-Level Package (WLP) with bottom-side solder bumps. Pin assignments follow standard bump grid layout (A1–A4, B1 = OUT; B2–C4 = IN; B3 = ACOK; B4 = OVLO; B5 = ACOK; C5 = GND).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| OUT (A1–A4, B1) | Overvoltage-protected output rail | Connects to PMIC input or system rail; requires ≥1µF ceramic bypass capacitor for stability during soft-start. |
| IN (B2, C1–C4) | Input voltage source terminal | Accepts +3V to +28V; bypass with 0.1µF ceramic near package to suppress LC ringing from long input traces. |
| ACOK (B3) | 1.8V logic-high active-good signal | Asserted after VIN stabilizes between min startup voltage and OVLO; drives host processor interrupt or enable logic. |
| ACOK (B5) | Open-drain active-low flag output | Pulled low when input is valid; requires external pullup to host I/O voltage (e.g., 1.8V or 3.3V) for level compatibility. |
| OVLO (B4) | Overvoltage lockout configuration input | Grounded to select internal 15.5V threshold; connect to resistor divider for adjustable OVLO (5V–22V range). |
| OTG_EN (A5) | OTG reverse power enable control | High enables OUT→IN power flow; deasserts ACOK/ACOK and activates bidirectional conduction path. |
| GND (C5) | Power and signal reference ground | Must be low-impedance connection to system ground plane; no exposed pad in WLP variant. |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional current blocking | Prevents reverse current flow from OUT to IN when disabled - essential for USB OTG state transitions and battery backup isolation. |
| Integrated 65mΩ n-FET switch | Eliminates need for discrete protection FETs and gate drivers, reducing BOM count and PCB area in space-constrained mobile designs. |
| 15ms startup debounce | Rejects short-duration input transients during plug-in events, preventing spurious OVP trips and system brownouts. |
| Soft-start (25ms) | Controls slew rate of VOUT rise to limit inrush into large output capacitors (up to 1000µF), avoiding overcurrent shutdown. |
| +100V surge clamping | Internal TVS structure absorbs high-energy transients without external components - validated per IEC 61000-4-2 contact discharge. |
| ±15kV HBM ESD on IN | Enables direct connection to exposed USB ports without additional ESD protection diodes, simplifying front-end design. |
Applications
| Smartphone Charging Port Protection | USB OTG Host Power Delivery |
|---|---|
|
Use Scenario: Protects smartphone PMIC input from faulty wall adapters or automotive chargers delivering up to +28V. IC Role / Device Role / Timing Role: Acts as primary overvoltage guard between USB connector and system power rail; responds within 1µs to OVP events. Use Value: Prevents catastrophic damage to SoC and battery management ICs while maintaining <65mΩ forward path loss during normal operation. |
Use Scenario: Enables smartphone to act as USB host (e.g., powering flash drives or peripherals) using its battery as source. IC Role / Device Role / Timing Role: Bidirectional switch controlled by OTG_EN; conducts OUT→IN only when enabled and VIN remains below OVLO. Use Value: Eliminates need for separate boost converter or dedicated OTG power path, reducing solution size and cost by >30%. |
| Tablet Docking Station Interface | PC Notebook USB-C Power Path Management |
|
Use Scenario: Safeguards tablet internal rails when connected to third-party docks supplying variable 5V/12V/20V inputs. IC Role / Device Role / Timing Role: Front-end protector with reverse bias blocking; isolates tablet battery from dock during abnormal conditions. Use Value: Ensures safe hot-plug operation and prevents backfeed-induced latch-up or thermal runaway in multi-rail systems. |
Use Scenario: Manages power routing in dual-role USB-C notebooks where port may receive or source power depending on cable orientation. IC Role / Device Role / Timing Role: Directional OVP switch with ACOK/ACOK status signaling; coordinates with USB PD controller for role negotiation. Use Value: Provides deterministic fault isolation independent of PD protocol stack, improving system-level reliability and certification margin. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar overvoltage protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX14670EWL+T | Fixed 6.8V ±3% OVLO threshold; identical WLP package, RON, and OTG functionality. | Targeted at 5V-input systems (e.g., USB 2.0 hosts) requiring lower trip point than MAX14671EWL+T's 15.5V. | Select when protecting legacy 5V rails where 15.5V OVLO would allow damaging overvoltage exposure. |
| TPD3S014RTER | Lower 3.6V OVLO, integrated USB data-line ESD protection (±12kV), but no OTG reverse power capability. | Designed for USB 2.0 data + power line protection; lacks bidirectional switching and soft-start timing control. | Choose only for cost-sensitive, non-OTG applications where data-line ESD co-protection is mandatory and 15.5V OVLO is unnecessary. |
Compared with MAX14670EWL+T, MAX14671EWL+T provides higher OVLO headroom for 12V/20V USB-C PD sources; compared with TPD3S014RTER, it delivers full bidirectional power path control and superior surge handling - making it uniquely suited for next-gen OTG-capable mobile platforms.
Availability
MAX14671EWL+T is available at Aetrix Electronics and suitable for smartphone charging port protection, USB OTG host power delivery, tablet docking station interface, and PC notebook USB-C power path management requiring stable component supply and long-term lifecycle support.
Supply support for MAX14671EWL+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated, now part of Analog Devices, designs precision analog, mixed-signal, and power management ICs for demanding industrial, communications, and consumer applications.
The MAX14670–MAX14673 family targets high-reliability overvoltage protection in portable electronics, specifically engineered to replace discrete FET + controller solutions with integrated, space-saving, and thermally robust alternatives.
FAQ
What is the exact overvoltage lockout (OVLO) threshold for MAX14671EWL+T?
The MAX14671EWL+T has a factory-trimmed internal OVLO threshold of 15.5V ±3% (rising edge), confirmed in the Electrical Characteristics table. This value is fixed and does not require external resistor programming - grounding the OVLO pin selects this preset threshold. The falling-edge threshold is 14.5V, providing hysteresis to prevent oscillation near trip point.
Does MAX14671EWL+T support reverse current flow from OUT to IN?
Yes, MAX14671EWL+T supports controlled reverse current flow via its OTG_EN pin. When OTG_EN is driven high, the internal FETs enable bidirectional conduction, allowing OUT (e.g., battery rail) to supply IN (e.g., USB port). During OTG operation, ACOK and ACOK are deasserted, and the device still monitors IN for overvoltage faults.
What package type and dimensions does MAX14671EWL+T use?
MAX14671EWL+T uses a 15-bump Wafer-Level Package (WLP) measuring 1.6mm × 2.1mm with 0.4mm bump pitch. It has no exposed pad and is RoHS-compliant. Land pattern information is documented in Maxim Application Note 1891 and package outline 21-0686.
Can MAX14671EWL+T replace MAX14670EWL+T in an existing design?
No - MAX14671EWL+T is not a drop-in replacement for MAX14670EWL+T due to differing OVLO thresholds (15.5V vs. 6.8V). Swapping them risks undervoltage exposure in 5V systems or premature shutdown in 12V/20V USB-C PD applications. Both share identical pinout and package, but functional validation is required before substitution.
What is the maximum continuous current rating for MAX14671EWL+T?
MAX14671EWL+T supports ±4.5A continuous current in both directions (IN→OUT and OUT→IN) when implemented with adequate PCB copper area per the WLP thermal guidelines. This rating assumes TA ≤ +70°C and derates linearly above that temperature at 16.4mW/°C.
MAX14671EWL+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 15-WFBGA, WLBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Battery Protection
- Battery Chemistry:
- -
- Number of Cells:
- -
- Fault Protection:
- Over Temperature, Over Voltage, Reverse Battery
- Interface:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 15-WLP (1.57x2.14)
MAX14671EWL+T FAQ
1.How can I place an order for MAX14671EWL+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX14671EWL+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX14671EWL+T reliable?
The price and inventory of MAX14671EWL+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX14671EWL+T is usually 5 days.
3.What payment methods are accepted for MAX14671EWL+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX14671EWL+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX14671EWL+T?
MAX14671EWL+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX14671EWL+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX14671EWL+T?
For technical support, including MAX14671EWL+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX14671EWL+T requirements.
6.How does Aetrix verify that MAX14671EWL+T is sourced from the original manufacturer or authorized distributors?
All MAX14671EWL+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX14671EWL+T meets industry standards.
7.What is the process for return or replacement of MAX14671EWL+T?
All MAX14671EWL+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX14671EWL+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX14671EWL+T part is unused and in its original packaging.
Return procedure for MAX14671EWL+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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