Analog Devices Inc./Maxim Integrated MAX155ACWI+

Overview

The MAX155ACWI+ from Maxim Integrated is an 8-channel, 8-bit simultaneous-sampling analog-to-digital converter (ADC) with integrated track/hold amplifiers, 2.5V internal reference, 3.6µs per-channel conversion time, and ±5V dual-supply or +5V single-supply operation - used in phase-sensitive data acquisition and vibration analysis systems.

For engineers reviewing the MAX155ACWI+ datasheet, MAX155ACWI+ pinout, MAX155ACWI+ application, or MAX155ACWI+ equivalent, this page delivers verified electrical specs, validated pin functions, confirmed mixed-mode input configuration support (unipolar/bipolar, single-ended/differential), and real-world timing behavior for multichannel synchronized sampling.

Technical Context

The MAX155ACWI+ implements a successive-approximation ADC core with eight independent track/hold circuits that sample all analog inputs simultaneously on the WR falling edge. Its internal 8×8 RAM stores results per channel, accessed via RD pulses with automatic address incrementing.

Configuration is handled through a shared bidirectional data bus (D0–D7) acting as both control register inputs and output data lines, where MODE pin state selects between hard-wired multiplexer modes or full I/O mode for dynamic channel setup - supporting mixed unipolar/bipolar and single-ended/differential conversions within one sequence.

Key Specifications

Pinout & Package

The MAX155ACWI+ is housed in a 28-pin wide SO (Small Outline) package with 300 mil body width and standard JEDEC MS-013AC footprint.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar multichannel simultaneous-sampling ADC applications.

Compared with ADS8556IPM and AD7656ASTZ, the MAX155ACWI+ uniquely delivers 8-channel simultaneous sampling at 8-bit resolution with integrated T/Hs and internal reference in a compact SO package - making it optimal for cost-sensitive, phase-critical embedded acquisition where 48 dB SINAD suffices.

Availability

The MAX155ACWI+ is available at Aetrix Electronics and suitable for phase-sensitive data acquisition, vibration analysis, AC power metering, and portable data logging requiring stable component supply across industrial temperature ranges (–40°C to +85°C).

Supply support for MAX155ACWI+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for industrial, automotive, and communications applications - emphasizing integration, low power, and robust performance.

The MAX155ACWI+ belongs to Maxim's high-speed data acquisition product line, engineered specifically for applications demanding synchronized multichannel sampling without external track/hold circuitry or reference components.

FAQ

What is the maximum sampling rate achievable with the MAX155ACWI+ in 8-channel simultaneous mode?

The MAX155ACWI+ completes each channel conversion in 3.6 µs, and all 8 channels are sampled simultaneously. Since results are stored in internal RAM and read sequentially via RD pulses, the aggregate throughput is limited by the read cycle - not conversion time. With typical microprocessor bus timing, sustained 8-channel acquisition can achieve ~220 kSPS total, assuming minimal RD overhead. The MAX155ACWI+ does not support continuous streaming mode; each acquisition sequence requires explicit WR and RD handshaking.

Does the MAX155ACWI+ support differential input configurations, and how are they implemented?

Yes, the MAX155ACWI+ supports per-channel differential input configurations via the DIFF bit in its configuration register. When DIFF = 1 and appropriate A0–A2 address bits are set, the device pairs adjacent analog inputs (e.g., AIN0+/AIN1−, AIN2+/AIN3−) for true differential sampling. This is configured in I/O mode (MODE floating) using D6/DIFF as a control bit during WR cycles. Differential mode operates with the same 3.6 µs conversion time and maintains the same 48 dB SINAD performance as single-ended mode at 50 kHz.

Can the MAX155ACWI+ operate from a single +5V supply, and what are the input range limitations?

Yes, the MAX155ACWI+ operates from a single +5V supply (VDD = +4.75V to +5.25V, VSS = AGND). In this configuration, unipolar input range is 0V to +2.5V (relative to AGND), and bipolar range is ±2.5V - achieved by setting the BIP bit and connecting VSS to AGND. To extend the bipolar range below ground (e.g., –2.5V to +2.5V centered at 0V), VSS must be connected to –5V. The MAX155ACWI+'s analog input voltage rating remains (VSS – 0.3V) to (VDD + 0.3V) under all supply conditions.

How does the power-down mode function in the MAX155ACWI+, and what is the wake-up time?

The MAX155ACWI+ enters power-down mode when PD = 1 is written to its configuration register. In this state, IDD drops to ≤100 µA, the internal 2.5V reference shuts off, and no conversions or RAM reads are possible - though register contents are retained. Wake-up requires writing PD = 0 followed by a minimum 5 ms stabilization period for the internal reference to recharge its 4.7 µF bypass capacitor before valid conversions resume. If an external reference is used and remains active during power-down, wake-up time reduces to ≤50 µs after PD = 0 is loaded.

Is the MAX155ACWI+ pin-compatible with other members of the MAX155/MAX156 family, such as the MAX156?

No, the MAX155ACWI+ is not pin-compatible with the MAX156. The MAX155ACWI+ uses a 28-pin wide SO package with AIN4–AIN7 exposed on pins 25–28, while the MAX156 uses either a 24-pin narrow PDIP or 28-pin wide SO package with those pins designated N.C. Although both share identical pin functions for common signals (WR, RD, CS, D0–D7, etc.), the MAX155ACWI+'s additional analog inputs and internal RAM addressing (A2 bit on D2/A2) require distinct PCB layout. Interchangeability is not supported without hardware redesign.