Analog Devices Inc./Maxim Integrated MAX16026TE+T

Overview

MAX16026TE+T from Maxim Integrated is a dual-voltage supervisor and sequencer in a 16-pin TQFN (4mm × 4mm) package, designed for precise power-rail monitoring and controlled startup sequencing in multivoltage systems. It monitors two independent supply rails (IN1/IN2), provides push-pull outputs (OUT1/OUT2), features capacitor-adjustable delay timing via CDLY1/CDLY2, supports 5%/10% threshold tolerance selection via TOL, and delivers a push-pull active-low RESET output with fixed (140ms min) or capacitor-adjustable timeout.

For engineers reviewing the MAX16026TE+T datasheet, MAX16026TE+T pinout, MAX16026TE+T application, or MAX16026TE+T equivalent, this device is selected for high-accuracy dual-supply supervision where independent enable control, temperature-stable thresholds (±2.7% over -40°C to +125°C), and robust noise immunity in server, storage, and telecom power architectures are required.

Technical Context

The MAX16026TE+T implements four independent comparator-based monitor channels-two active (IN1/IN2) and two unpopulated-each with logic-selectable thresholds (nine options via TH1/TH0), adjustable hysteresis via TOL, and capacitor-controlled timing (CDLY1/CDLY2). Its internal 250nA current source charges external capacitors to set delays from ~35µs to >1s, while the reset timeout is governed by either an internal 140ms minimum or an external capacitor on CRESET (0.5V threshold, 500nA charge current).

Each monitored input operates with 1.5% accurate adjustable thresholds down to 0.5V or 2.7% accurate fixed thresholds (3.3V/2.5V/1.8V/1.5V/1.2V), and all outputs remain functional down to VCC = 1.2V. The push-pull architecture enables direct interface to microprocessor reset inputs without external pullups, and EN1/EN2 allow digital disable of individual outputs during system sleep or fault recovery.

Key Specifications

Pinout & Package

MAX16026TE+T uses a 16-pin thin QFN (TQFN) package measuring 4mm × 4mm × 0.8mm with exposed pad (EP) internally connected to GND. Pin numbering follows standard top-view orientation with Pin 1 at top-left corner.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-voltage supervisory applications.

Compared with MAX16025TE+T, MAX16026TE+T eliminates external pullups and simplifies layout; compared with TPS3808G18DBVR, it adds dual-rail coordination, programmable thresholds, and capacitor-timed sequencing - making it uniquely suited for multivoltage system initialization.

Availability

MAX16026TE+T is available at Aetrix Electronics and suitable for server power sequencing, industrial PLC supervision, telecom line card reset control, and storage system voltage margining requiring stable component supply across extended temperature and long product lifecycles.

Supply support for MAX16026TE+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for demanding industrial, automotive, communications, and computing applications.

The MAX16025–MAX16030 family was developed to address multivoltage sequencing and supervision challenges in high-reliability systems where fixed-threshold supervisors lack flexibility and microcontroller-based solutions add cost and firmware overhead.

FAQ

What is the function of the TOL pin on the MAX16026TE+T?

The TOL pin on the MAX16026TE+T selects threshold tolerance: connecting TOL to GND configures 5% below nominal voltage thresholds, while connecting to VCC selects 10% below nominal. This setting affects both fixed and adjustable thresholds and is critical for matching system power supply tolerances. Leaving TOL floating is not allowed - it must be tied to GND or VCC. The MAX16026TE+T guarantees ±2.7% fixed-threshold accuracy over -40°C to +125°C with this configuration.

How does the MAX16026TE+T generate its reset timeout period?

The MAX16026TE+T generates reset timeout either internally (140ms minimum) when CRESET is connected to VCC, or externally by charging an external capacitor from CRESET to GND using a 500nA current source. Timeout duration is calculated as tRP = (0.5V / 500nA) × CCRESET + 35µs. The MAX16026TE+T deasserts RESET only after all monitored voltages exceed thresholds, all EN inputs are high, and the full timeout elapses - ensuring robust system initialization.

Can the MAX16026TE+T monitor voltages below 1.2V?

Yes - the MAX16026TE+T supports adjustable thresholds down to 0.5V using external resistor dividers on IN1 or IN2. When TH1/TH0 are set to 'Open/Open', both inputs default to adjustable mode. With TOL = GND, the internal reference is 0.5V ±1.5%, enabling accurate monitoring of sub-1V rails like DDR5 VDDQ (1.1V) or AI accelerator core supplies. The MAX16026TE+T maintains ±1.5% accuracy over temperature for these configurations.

What is the purpose of the CDLY1 and CDLY2 pins on the MAX16026TE+T?

CDLY1 and CDLY2 on the MAX16026TE+T set independent delay times between voltage crossing and corresponding OUT1/OUT2 assertion. Each pin sources 250nA to charge an external capacitor to 1V; delay = (1V / 250nA) × CCDLY + 35µs propagation. This enables precise power-rail sequencing - for example, delaying 3.3V rail enable by 10ms relative to 12V - without timers or microcontrollers. The MAX16026TE+T supports delays from ~35µs to several seconds depending on capacitor value.

Does the MAX16026TE+T require external pullup resistors on its outputs?

No - the MAX16026TE+T features push-pull outputs for OUT1, OUT2, and RESET, eliminating the need for external pullup resistors. This contrasts with open-drain variants like MAX16025TE+T. The MAX16026TE+T drives high actively (VOH ≥ 0.8×VCC @ 500µA) and low actively (VOL ≤ 0.35V @ 1mA), enabling direct connection to microprocessor reset inputs, FPGA configuration pins, or DC-DC enable terminals without additional components.