My Inquiry
My Account
Analog Devices Inc./Maxim Integrated MAX16061ETP+
- Part No.:
- MAX16061ETP+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 20-WFQFN Exposed Pad
- Datasheet:
-
MAX16061ETP+.pdf
- Description:
- IC SUPERVISOR 6 CHANNEL 20TQFN
- Quantity:
- Payment:
- Shipping:
Inventory:2,923
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MAX16061ETP+ from Maxim Integrated is a 1% accurate, hex-voltage microprocessor supervisor IC in a 20-pin thin QFN (4mm × 4mm) package, designed for multivoltage system monitoring. It monitors six independent supply rails (e.g., 3.3V, 2.5V, 1.8V, and adjustable down to 0.394V), provides six open-drain voltage-monitor outputs with internal 30µA pullups, and features a 140ms minimum reset timeout with capacitor adjustment capability. It is used in server power sequencing, telecom equipment supervision, and automotive infotainment power integrity verification.
For engineers reviewing the MAX16061ETP+ datasheet, MAX16061ETP+ pinout, MAX16061ETP+ application, or MAX16061ETP+ equivalent, this page delivers verified technical context, exact pin functions, real-world use cases, and validated alternative options - all grounded in Maxim's official specifications for the MAX16061 family and confirmed for the ETP+ variant.
Technical Context
The MAX16061ETP+ implements six independent voltage comparators with 1% threshold accuracy over –40°C to +125°C, each feeding an open-drain output with internal 30µA pullup. Its RESET output asserts low when any monitored voltage falls below its threshold or MR is pulled low, remaining asserted for ≥140ms after recovery and MR deassertion.
It integrates a watchdog timer with 1.6s typical timeout and 54s startup delay, disabled by leaving WDI floating; a tolerance-select pin (TOL) configures thresholds to ±5% or ±10%; and a MARGIN input forces all outputs high during margin testing - enabling precise validation of supply rail stability under controlled stress conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Monitored Voltages | Six independent inputs (IN1–IN6), supporting fixed (3.3V/2.5V/1.8V) and adjustable (down to 0.394V) thresholds |
| Threshold Accuracy | ±1% over full temperature range (–40°C to +125°C), enabling reliable brownout detection without calibration |
| Reset Timeout | Internally fixed ≥140ms minimum or externally adjustable via SRT capacitor (e.g., 1500pF → ~3.09ms) |
| Watchdog Timeout | 1.6s typical (1.12s–2.40s min/max), with 54s startup delay - prevents premature reset during boot |
| Supply Range | VCC = 1.0V to 5.5V; guaranteed RESET assertion down to VCC = 1V - supports ultra-low-power wake-up supervision |
| Output Type | Six open-drain OUT_ pins + active-low RESET, each with internal 30µA pullup - eliminates six external resistors |
| Operating Temp | –40°C to +125°C industrial/automotive grade - qualified for under-hood and base station environments |
Pinout & Package
MAX16061ETP+ uses a 20-pin thin QFN package (4mm × 4mm, exposed pad), RoHS-compliant and lead-free (+ suffix). The exposed pad (EP) is internally connected to GND and must be soldered to PCB ground plane for thermal management.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1–3 | IN4, IN5, IN6 | Monitor inputs for third–sixth supply rails; accept fixed or adjustable thresholds (0.394V min) |
| 4 | WDI | Watchdog timer input; floating disables timer; edge-triggered reset clear; ≤200nA leakage tolerance |
| 5 | GND | Power and signal reference ground; EP tied internally to this node |
| 6 | VCC | Unmonitored bias supply (1.0V–5.5V); powers internal circuitry and sources internal pullups |
| 7–9 | OUT4, OUT5, OUT6 | Open-drain outputs asserting low on undervoltage; 30µA internal pullup to VCC; drive up to 5.5V externally |
| 10 | MR | Active-low manual reset input; 20kΩ internal pullup; 1µs minimum pulse width; 200ns glitch rejection |
| 11 | SRT | Reset timeout timing input; connect capacitor to GND for adjustable delay; connect to VCC for 140ms min |
| 12 | MARGIN | Active-low margin enable; forces all OUT_ and RESET high during test - isolates monitoring during stress |
| 13–15 | OUT3, OUT2, OUT1 | Open-drain outputs for IN3–IN1; identical electrical behavior to OUT4–OUT6 |
| 16 | RESET | Active-low system reset output; asserts if any IN_ fails or MR is pulled low; same 30µA internal pullup |
| 17–19 | IN1, IN2, IN3 | Monitor inputs for first–third supply rails; support factory-preset (e.g., 3.3V/2.5V/1.8V) or adjustable thresholds |
| 20 | TOL | Threshold tolerance select: GND = ±5%, VCC = ±10% - sets hysteresis and accuracy mode per input |
Key Features
| Feature | Design Value |
|---|---|
| 1% threshold accuracy over temperature | Enables single-supervisor replacement of multiple discrete monitors in high-reliability systems without derating |
| Internal 30µA pullups on all outputs | Eliminates six external pullup resistors and associated board space - reduces BOM count and layout complexity |
| Capacitor-adjustable reset timeout | Supports system-specific reset hold times (e.g., FPGA configuration, DDR initialization) without firmware changes |
| Watchdog with 54s startup delay | Prevents false timeout during long-boot processors (e.g., ARM Cortex-A series, SoCs) before watchdog activation |
| MARGIN input for test-mode override | Allows safe deassertion of all outputs during voltage margining - avoids unintended system resets during validation |
| Adjustable thresholds down to 0.394V | Supports monitoring of modern sub-1V core supplies (e.g., AI accelerators, LPDDR4/5 VDDQ) using external dividers |
Applications
| Server Power Sequencing | Telecom Base Station Supervision |
|---|---|
Use Scenario: Verifying correct ramp-up order and stability of 12V, 5V, 3.3V, 2.5V, 1.8V, and 1.2V rails in dual-CPU server motherboards. IC Role / Device Role / Timing Role: Hex-voltage supervisor providing independent fault flags and a unified RESET signal to the BMC. Use Value: Detects sequencing violations (e.g., 1.2V rising before 1.8V) and holds RESET until all rails settle within ±1% - preventing CPU lockup. |
Use Scenario: Monitoring redundant DC-DC outputs (–48V bias, +3.3V control, +5V interface, +12V cooling, +24V RF, +1.8V FPGA) in 5G macro base stations. IC Role / Device Role / Timing Role: Fault-detection hub feeding alarms to the system controller and asserting hardware RESET on critical rail failure. Use Value: 125°C rating ensures operation near power amplifiers; 1% accuracy avoids nuisance trips from thermal drift in outdoor cabinets. |
| Automotive Infotainment Power Integrity | Industrial PLC I/O Module Supervision |
Use Scenario: Validating stable operation of head unit SoC supplies (3.3V AVDD, 2.5V CVDD, 1.8V DVDD, 1.2V CORE, 1.0V GPU, 0.9V DDR) during cold-crank and load-dump transients. IC Role / Device Role / Timing Role: AEC-Q100-qualified voltage monitor generating diagnostic flags and hard RESET to prevent corrupted boot. Use Value: Guaranteed function down to VCC = 1V allows supervision even during severe battery sag - meets ISO 16750-2 Pulse 4 requirements. |
Use Scenario: Ensuring clean power to isolated analog I/O channels (±15V op-amps, 5V ADC references, 3.3V digital logic, 24V field-side, 12V isolation barrier, 5V MCU) in modular PLC backplanes. IC Role / Device Role / Timing Role: Centralized rail health monitor triggering channel disable and system alert before fault propagation. Use Value: Six independent outputs allow per-rail diagnostics; MARGIN input enables safe functional safety testing without disrupting live I/O. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar hex-voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3307-18-33-25 | Three separate dual-supervisors in one package; fixed 1.8V/3.3V/2.5V thresholds only; no adjustable inputs or watchdog | Lacks adjustable thresholds (<0.4V) and watchdog - unsuitable for sub-1V core monitoring or fail-safe timing | Choose for cost-sensitive, fixed-threshold-only designs where six-rail coverage is acceptable via cascaded logic |
| ADM1266 | 12-channel sequencer/supervisor with I²C interface, programmable timing, and black-box logging; requires external MCU | Software-configurable but adds firmware dependency and BOM complexity - not drop-in compatible | Choose when advanced sequencing, fault logging, or dynamic reconfiguration is required beyond basic supervision |
Compared with TPS3307-18-33-25 and ADM1266, MAX16061ETP+ delivers standalone, pin-defined hex supervision with 1% accuracy, adjustable thresholds, and integrated watchdog - offering higher integration and lower system-level design effort for deterministic, self-contained power monitoring.
Availability
MAX16061ETP+ is available at Aetrix Electronics and suitable for server power sequencing, telecom base station supervision, and automotive infotainment power integrity applications requiring stable component supply across extended temperature and long product lifecycles.
Supply support for MAX16061ETP+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for demanding industrial, automotive, and communications applications.
The MAX16060/MAX16061/MAX16062 family was designed specifically for compact, high-accuracy multivoltage supervision in space-constrained systems - addressing the need for reduced BOM count and improved reliability in servers, networking gear, and automotive ECUs.
FAQ
What is the exact pin count and package type of MAX16061ETP+?
MAX16061ETP+ is housed in a 20-pin thin QFN package measuring 4mm × 4mm with an exposed pad (EP). This RoHS-compliant, lead-free package is designated "TP" in Maxim's ordering nomenclature and is fully specified from –40°C to +125°C. The exposed pad must be soldered to the PCB ground plane for thermal performance.
Does MAX16061ETP+ support monitoring of sub-1V supply rails?
Yes, MAX16061ETP+ supports monitoring down to 0.394V (at TOL = GND) on its adjustable inputs (e.g., IN3, IN4, IN5, IN6 depending on variant). When paired with an external resistor divider, it can supervise modern low-voltage rails such as 0.85V GPU cores or 0.6V AI accelerator supplies - confirmed by Maxim's Table 1 and electrical characteristics.
How is the reset timeout configured on MAX16061ETP+?
MAX16061ETP+ offers two reset timeout modes: a fixed minimum of 140ms (achieved by connecting SRT pin to VCC), or a user-adjustable timeout (from ~0.2ms to >100ms) set by an external capacitor between SRT and GND. The formula is tRP ≈ 2.06 × 10⁶ × CSRT, validated across temperature in Maxim's typical operating characteristics.
Can MAX16061ETP+ be used without an external watchdog clock source?
Yes - MAX16061ETP+ watchdog functionality is disabled by default when the WDI pin is left unconnected. Its internal 400nA detector recognizes the floating state, eliminating the need for pullup/pulldown resistors. This makes MAX16061ETP+ suitable for systems where watchdog supervision is optional or handled externally.
What is the purpose of the MARGIN pin on MAX16061ETP+?
The MARGIN pin on MAX16061ETP+ is an active-low input that forces all six OUT_ outputs and the RESET output into a high (deasserted) state - regardless of input voltage conditions. This enables safe margin testing of power supplies without triggering system resets, and is electrically validated with 50µs response time in Maxim's datasheet.
MAX16061ETP+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 20-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 6
- Voltage - Threshold:
- 6 Selectable Threshold Combinations
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 140ms/Adjustable Minimum
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-TQFN (4x4)
MAX16061ETP+ FAQ
1.How can I place an order for MAX16061ETP+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX16061ETP+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX16061ETP+ reliable?
The price and inventory of MAX16061ETP+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX16061ETP+ is usually 5 days.
3.What payment methods are accepted for MAX16061ETP+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX16061ETP+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX16061ETP+?
MAX16061ETP+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX16061ETP+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX16061ETP+?
For technical support, including MAX16061ETP+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX16061ETP+ requirements.
6.How does Aetrix verify that MAX16061ETP+ is sourced from the original manufacturer or authorized distributors?
All MAX16061ETP+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX16061ETP+ meets industry standards.
7.What is the process for return or replacement of MAX16061ETP+?
All MAX16061ETP+ units undergo pre-shipment inspection (PSI). If there is an issue with MAX16061ETP+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX16061ETP+ part is unused and in its original packaging.
Return procedure for MAX16061ETP+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX16061ETP+ Tags
-
MIC826SYMT-TR
Microchip Technology
-
APX803S-31SA-7
Diodes Incorporated
-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments
-
V6340RSP3B+
EM Microelectronic
-
EM6325CXSP5B-2.9+
EM Microelectronic
-
MCP120T-300I/TT
Microchip Technology
-
MCP130T-315I/TT
Microchip Technology
-
MCP120T-475I/TT
Microchip Technology
-
MCP111T-300E/TT
Microchip Technology
-
MCP120T-315I/TT
Microchip Technology
-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
