Analog Devices Inc./Maxim Integrated MAX16993AGJF/VY+
- Part No.:
- MAX16993AGJF/VY+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
MAX16993AGJF/VY+.pdf
- Description:
- IC REG BUCK ADJ 3A TRPL 32QFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,326
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MAX16993AGJF/VY+ from Maxim Integrated is an AEC-Q100 qualified automotive PMIC integrating one high-voltage synchronous step-down controller (OUT1) and two low-voltage synchronous step-down converters (OUT2/OUT3), all operating up to 2.1MHz. It accepts 3.5V–36V input, delivers ≤5.0V/≤3A on OUT1 and ≤3.95V/≤3A on each cascaded output, and consumes only 30µA quiescent current - enabling always-on functionality in infotainment, ADAS camera modules, and telematics ECUs.
For engineers reviewing the MAX16993AGJF/VY+ datasheet, MAX16993AGJF/VY+ pinout, MAX16993AGJF/VY+ application, or MAX16993AGJF/VY+ equivalent, this page provides verified technical context, validated pin functions, confirmed automotive-grade thermal and protection specs, and real-world selection guidance for multi-rail vehicle power systems.
Technical Context
The MAX16993AGJF/VY+ implements a current-mode control architecture with forced-PWM and skip modes, supporting frequency synchronization via SYNC input (1.7–2.4MHz range) and spread-spectrum modulation via SSEN to reduce EMI. Its OUT1 controller uses external high-side/low-side MOSFETs, while OUT2/OUT3 integrate 3A FETs and operate from OUT1's output - enabling cascaded efficiency optimization and compact layout.
Each rail features individual enable inputs (EN1/EN2/EN3), open-drain RESET_ outputs with programmable timeout (0.1–7.8ms), and overtemperature shutdown at +170°C with 15°C hysteresis. The BIAS LDO (5.0V ±0.4V) powers internal circuitry pre-soft-start and transitions to OUT1 post-startup, eliminating need for external bias supply.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3.5V to 36V continuous; withstands 42V load-dump transients - suitable for direct connection to automotive battery without external TVS. |
| Switching Frequency | Pin-selectable 2.1MHz (CSEL1 = GND) or factory-set 350/420/525/1050kHz - enables AM-band avoidance and small passive sizing. |
| Quiescent Current | 30µA with OUT1 enabled - meets ISO 16750-2 cold-cranking and extended-stop requirements for always-on domains. |
| Output Accuracy | ±2.5% for OUT1 (fixed/adjustable), ±3.0% for OUT2/OUT3 - guaranteed over -40°C to +125°C without precision resistors. |
| Thermal Protection | Thermal shutdown at +170°C with 15°C hysteresis; thermal warning at +150°C - supports robust operation in under-hood environments. |
| Package | 32-pin TQFN-EP (5mm × 5mm × 0.75mm) with side-wettable QFND variant - enables automated optical solder-joint inspection per IPC-A-610. |
| AEC-Q100 Grade | Grade 0 (−40°C to +125°C junction) - qualified for safety-critical automotive applications including ADAS and body control. |
Pinout & Package
MAX16993AGJF/VY+ is housed in a 32-pin TQFN-EP (5mm × 5mm × 0.75mm) package with exposed pad (EP = GND). The side-wettable QFND variant supports automated solder-joint inspection. Thermal resistance θJA = 29°C/W (TQFN), θJC = 1.7°C/W - optimized for high-power density automotive PCBs with 2oz copper and thermal vias.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VSUP | Main HV input supply | Accepts 3.5V–36V battery input; requires ≥0.1µF local ceramic bypass - primary path for load-dump energy handling. |
| EN1 / EN2 / EN3 | Independent enable inputs | Active-high digital controls; EN1 must be asserted before OUT2/OUT3 startup - enables sequenced power-up for SoC/FPGA rails. |
| OUT1 / OUT2 / OUT3 | Output voltage sense nodes | Connect directly to regulated outputs; used for feedback and overvoltage detection - eliminates need for remote sensing traces. |
| RESET1 / RESET2 / RESET3 | Open-drain reset outputs | Assert low when output drops >6% below nominal; timeout programmable (0.1–7.8ms) - provides reliable power-good signaling to microcontrollers. |
| SYNC | Frequency synchronization I/O | Configurable as input (1.7–2.4MHz external clock) or output; enables system-wide noise reduction - critical for radar/ADAS coexistence. |
| SSEN | Spread-spectrum enable | Logic-high enables ±6% frequency dithering at 4kHz rate - reduces peak EMI by >10dB without altering loop compensation. |
Key Features
| Feature | Design Value |
|---|---|
| Cascaded dual buck architecture | OUT2/OUT3 powered from OUT1 output - improves overall system efficiency by 8–12% vs. independent buck supplies at light-to-moderate loads. |
| 180° out-of-phase switching (OUT2/OUT3) | Reduces input capacitance RMS current by ~30% - lowers required bulk capacitance and extends capacitor lifetime in harsh thermal environments. |
| Individual soft-start timers | 4ms for OUT1, 2.5ms for OUT2/OUT3 - prevents inrush current overload during cold-cranking and ensures controlled SoC boot sequencing. |
| Factory-trimmed fixed outputs | 3.3V, 5.0V, 3.15V (OUT1); 3.15V, 1.8V, 1.2V (OUT2/OUT3) - eliminates need for external resistor networks and associated tolerance stack-up errors. |
| Integrated BIAS LDO with auto-transition | 5.0V LDO active pre-soft-start; internally shorts to OUT1 post-startup - removes dependency on external bias supply and simplifies BOM. |
Applications
| Infotainment Head Unit Power | ADAS Camera Module Supply |
|---|---|
|
Use Scenario: Powering SoC, DDR memory, display interface, and audio codec in automotive head units with CAN/FlexRay connectivity. IC Role / Device Role / Timing Role: Primary PMIC delivering three regulated rails: 5.0V for USB/PCIe, 3.3V for I/O, and 1.2V for core logic - with synchronized startup and fault isolation. Use Value: 2.1MHz operation avoids AM band interference; individual RESET_ signals enable precise boot timing control for Linux-based IVI systems. |
Use Scenario: Providing clean, sequenced power to CMOS image sensors, ISP processors, and MIPI CSI-2 transceivers in surround-view cameras. IC Role / Device Role / Timing Role: Cascaded triple-buck regulator supplying 3.3V sensor bias, 1.8V ISP core, and 1.2V MIPI PHY - with <7.8ms reset timeout for fail-safe diagnostics. Use Value: Spread-spectrum mode reduces radiated emissions near sensitive analog video paths; AEC-Q100 Grade 0 ensures reliability at +105°C ambient. |
| Telematics Control Unit (TCU) | Body Control Module (BCM) Gateway |
|
Use Scenario: Supporting LTE modem, GNSS receiver, eSIM, and CAN FD gateway in cellular-connected vehicle telematics units. IC Role / Device Role / Timing Role: High-efficiency PMIC generating 3.3V modem rail, 1.8V GNSS LNA supply, and 5.0V CAN transceiver VCC - with load-dump immunity up to 42V. Use Value: 30µA quiescent current enables >10-year battery-backed sleep mode; SYNC input allows synchronization with baseband processor clocks. |
Use Scenario: Powering microcontroller, LIN transceivers, relay drivers, and EEPROM in centralized body electronics modules. IC Role / Device Role / Timing Role: Robust triple-output regulator delivering 5.0V MCU VDD, 3.3V LIN PHY, and 1.2V logic - with undervoltage lockout and thermal warning outputs. Use Value: Individual EN_/RESET_ pins support modular firmware-controlled power sequencing; side-wettable QFND package enables AOI verification in high-volume BCM production. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multichannel automotive DC-DC converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX20096ATP/VY+ | Single 3.5V–36V buck controller + dual 2.2MHz integrated bucks; lower IQ (25µA); no spread-spectrum; different pinout. | Lacks SSEN and has fixed 2.2MHz only - less flexible for EMI-sensitive radar co-location. | Preferred where lowest quiescent current is critical and EMI constraints allow fixed-frequency operation. |
| TPS650361QRGZTQ1 | Triple buck (2.2/1.8/1.2V fixed) + LDO; 3.0V–5.5V input only; no HV buck controller; smaller 24-pin QFN. | Requires external HV pre-regulator - increases BOM count and board area for battery-fed systems. | Suitable for post-5V domain applications (e.g., domain controllers powered from main ECU rail). |
Compared with MAX20096ATP/VY+ and TPS650361QRGZTQ1, the MAX16993AGJF/VY+ uniquely combines HV direct-battery operation, pin-selectable frequency, spread-spectrum EMI reduction, and cascaded efficiency - making it optimal for compact, battery-fed ADAS and infotainment subsystems requiring AEC-Q100 Grade 0 compliance.
Availability
MAX16993AGJF/VY+ is available at Aetrix Electronics and suitable for automotive infotainment, ADAS camera modules, and telematics control units requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for MAX16993AGJF/VY+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs high-performance analog and mixed-signal ICs for automotive, industrial, and communications markets - emphasizing reliability, integration, and AEC-Q100 qualification.
The MAX16993AGJF/VY+ belongs to Maxim's automotive PMIC portfolio, engineered specifically for compact, efficient, and robust multi-rail power delivery in safety-critical vehicle subsystems operating from battery voltage.
FAQ
What is the maximum input voltage rating for MAX16993AGJF/VY+?
The MAX16993AGJF/VY+ supports continuous input voltage up to 36V and is protected against load-dump transients up to 42V. This specification is validated per ISO 7637-2 Pulse 5a and enables direct connection to 12V/24V automotive batteries without external transient suppression components in most use cases.
Does MAX16993AGJF/VY+ support output voltage adjustment via external resistors?
Yes, MAX16993AGJF/VY+ supports resistor-divider adjustable outputs: OUT1 regulates to 1.0V at FB1 (allowing 3.0V–5.5V range), while OUT2/OUT3 regulate to 0.815V at their respective feedback pins (supporting 0.8V–3.95V). Fixed-output variants are also available, but the AGJF/VY+ suffix indicates the adjustable version per Maxim's ordering guide.
How does the cascaded architecture of MAX16993AGJF/VY+ improve system efficiency?
The MAX16993AGJF/VY+ powers OUT2 and OUT3 from the regulated output of OUT1 rather than directly from VSUP. This reduces conduction losses in the low-voltage converters' FETs and minimizes total system power loss - especially beneficial at partial loads typical in automotive always-on domains, where efficiency gains of 8–12% over independent buck topologies are measured.
What thermal management features does MAX16993AGJF/VY+ include?
MAX16993AGJF/VY+ integrates thermal warning at +150°C and thermal shutdown at +170°C with 15°C hysteresis. Its 32-pin TQFN-EP package achieves θJA = 29°C/W on a 4-layer board with thermal vias - enabling sustained 3A output operation at +105°C ambient when properly heatsinked, meeting AEC-Q100 Grade 0 requirements.
Can MAX16993AGJF/VY+ synchronize to an external clock source?
Yes, MAX16993AGJF/VY+ supports external synchronization via its SYNC pin, which accepts input frequencies from 1.7MHz to 2.4MHz. When configured as an input, SYNC enables fixed-frequency forced-PWM mode and allows phase alignment with other system clocks - reducing beat frequencies and improving EMI performance in complex multi-PMIC automotive architectures.
MAX16993AGJF/VY+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable (Programmable)
- Number of Outputs:
- 3
- Voltage - Input (Min):
- 3.5V
- Voltage - Input (Max):
- 36V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 3.95V
- Current - Output:
- 3A
- Frequency - Switching:
- 2.1MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-QFN (5x5)
MAX16993AGJF/VY+ FAQ
1.How can I place an order for MAX16993AGJF/VY+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX16993AGJF/VY+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX16993AGJF/VY+ reliable?
The price and inventory of MAX16993AGJF/VY+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX16993AGJF/VY+ is usually 5 days.
3.What payment methods are accepted for MAX16993AGJF/VY+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX16993AGJF/VY+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX16993AGJF/VY+?
MAX16993AGJF/VY+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX16993AGJF/VY+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX16993AGJF/VY+?
For technical support, including MAX16993AGJF/VY+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX16993AGJF/VY+ requirements.
6.How does Aetrix verify that MAX16993AGJF/VY+ is sourced from the original manufacturer or authorized distributors?
All MAX16993AGJF/VY+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX16993AGJF/VY+ meets industry standards.
7.What is the process for return or replacement of MAX16993AGJF/VY+?
All MAX16993AGJF/VY+ units undergo pre-shipment inspection (PSI). If there is an issue with MAX16993AGJF/VY+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX16993AGJF/VY+ part is unused and in its original packaging.
Return procedure for MAX16993AGJF/VY+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX16993AGJF/VY+ Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

