Analog Devices Inc./Maxim Integrated MAX17510ATC/V+T

Overview

MAX17510ATC/V+ from Analog Devices is a low-voltage, dual-direction DDR termination linear regulator with internal n-channel MOSFETs, delivering ±3A peak sourcing/sinking capability (typ), 0.5V–1.5V output range, ±15mV load-regulation error (max), and 2ms PGOOD startup delay - designed for active DDR memory bus termination in automotive-grade systems operating from −40°C to +125°C.

For engineers reviewing the MAX17510ATC/V+ datasheet, MAX17510ATC/V+ pinout, MAX17510ATC/V+ application, or MAX17510ATC/V+ equivalent, key selection considerations include its 10-pin 3mm×3mm TDFN package with exposed pad, separate 3.3V bias supply (VCC) requirement, external reference tracking (REFIN/REFOUT), thermal shutdown at +165°C, and ±150mV PGOOD window tolerance.

Technical Context

The MAX17510ATC/V+ employs an n-channel high-side source MOSFET and low-side sink MOSFET with matched on-resistance (0.14Ω–0.25Ω typ), enabling bidirectional current delivery for DDR VTT termination. Its control loop regulates OUTS to match REFIN voltage, supporting dynamic voltage tracking via external resistor networks.

It integrates shoot-through protection to prevent simultaneous conduction of source/sink MOSFETs, features a 200µs soft-start current-limit timer, and uses a dedicated 3.3V VCC bias rail to drive gate circuitry - decoupling gate-drive efficiency from low VIN (1.1V–3.6V) operation and reducing dropout-related power loss.

Key Specifications

Pinout & Package

MAX17510ATC/V+ is housed in a 10-pin, 3mm × 3mm thin DFN package with exposed pad (TDFN-EP), optimized for thermal dissipation in space-constrained DDR memory subsystems. The exposed pad must be soldered to AGND for junction-to-ambient thermal resistance of 41°C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar DDR termination regulator applications.

Compared with MAX1510ATB/V+, MAX17510ATC/V+ extends junction temperature capability to +150°C and thermal shutdown to +165°C for under-hood deployment, while TPS51200DRCR trades reference buffering and bias-rail flexibility for higher integration density - making MAX17510ATC/V+ optimal for thermally demanding, reference-critical DDR termination.

Availability

MAX17510ATC/V+ is available at Aetrix Electronics and suitable for automotive ADAS modules, DDR memory subsystems, and graphics processor core supplies requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for MAX17510ATC/V+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving automotive, industrial, communications, and consumer markets since 1965.

The MAX17510ATC/V+ belongs to Analog Devices' DDR termination regulator product line, engineered specifically for automotive-grade active memory bus termination with precision tracking, bidirectional current handling, and extended thermal resilience.

FAQ

What is the maximum junction temperature specification for MAX17510ATC/V+?

The MAX17510ATC/V+ has an absolute maximum junction temperature of +150°C and incorporates thermal shutdown that activates at +165°C (rising edge) with 15°C hysteresis. This ensures safe operation in automotive under-hood environments where ambient temperatures reach +125°C. The device resumes normal regulation once the junction cools below +150°C. Thermal design must account for θ_JA = 41°C/W and derate power dissipation above +70°C ambient at 24.4mW/°C.

Does MAX17510ATC/V+ require an external 3.3V bias supply, and why?

Yes, MAX17510ATC/V+ requires a dedicated 2.7V–3.6V VCC bias supply connected to Pin 2. This rail powers the internal gate drivers for the n-channel source/sink MOSFETs, enabling low R_DS(ON) operation even when the main input (IN) is as low as 1.1V. Without VCC, the device cannot achieve its specified ±3A current capability or maintain regulation - it is not optional and must be well-bypassed with ≥1µF ceramic capacitance.

How does the PGOOD signal behave during startup and fault conditions for MAX17510ATC/V+?

During startup, MAX17510ATC/V+ asserts PGOOD high-impedance 2ms (typ) after OUTS reaches regulation within ±150mV of VREFIN. If OUTS deviates beyond that window, PGOOD pulls low within 10µs. It also goes low during shutdown (SHDN = GND) or when VCC or IN drops below their respective UVLO thresholds (2.55V and 1.1V). A 100kΩ pullup to VCC is required for logic-level compatibility.

Can MAX17510ATC/V+ be used for dynamic voltage scaling in GPU core supplies?

Yes, MAX17510ATC/V+ supports dynamic output voltage changes by modulating the REFIN voltage using an external switched resistor network. As documented in Figure 4 of the datasheet, two discrete output voltages (e.g., 0.9V and 1.25V) can be selected via MOSFET-switched resistors, with slew rate controlled by C_REFIN. The device maintains ±15mV load regulation and fast transient response (<10mV for ±1.5A steps), making it suitable for GPU DVFS applications.

What is the role of the OUTS pin in MAX17510ATC/V+, and how should it be connected?

The OUTS pin on MAX17510ATC/V+ serves as the remote sense input for feedback regulation, connected directly to the DDR termination bypass capacitors near the memory ICs. It is internally tied to OUT through a 12kΩ resistor and sets the regulation point for VOUTS = VREFIN. Proper OUTS routing minimizes PCB trace inductance and ensures accurate voltage regulation at the point of load - critical for meeting DDR timing margins under fast transient loads.