Analog Devices Inc./Maxim Integrated MAX17673ATI+T

Overview

MAX17673ATI+T from Maxim Integrated is a triple-output power management IC integrating one 4.5V–60V, 1.5A synchronous buck regulator and two 2.7V–5.5V, 1A synchronous buck regulators - all with integrated MOSFETs, independent current-mode control, hiccup OCP, EN inputs, and Power-OK signals. It serves as a compact, high-efficiency PMIC for FPGA/CPLD core and auxiliary rail generation in industrial high-voltage single-board systems.

For engineers reviewing the MAX17673ATI+T datasheet, MAX17673ATI+T pinout, MAX17673ATI+T application, or MAX17673ATI+T equivalent, key selection considerations include its fractional HV/LV switching frequency ratio programming (2–8×), adjustable soft-start on the HV channel, PFM/PWM mode flexibility, -40°C to +125°C operation, and CISPR22 Class B EMI compliance.

Technical Context

The MAX17673ATI+T implements peak-current-mode control across all three regulators, enabling fast transient response and stable regulation under varying load and input conditions. Its HV buck uses an external RT resistor and FDIV network to set switching frequency (250kHz–800kHz) and derive LV frequencies via programmable integer division ratios (2–8).

The LV regulators feature fixed soft-start (4096 clock cycles), while the HV regulator supports adjustable soft-start via SSH current (4.25–5.75µA). The device includes monotonic startup into prebiased loads, hiccup-mode overcurrent protection, thermal shutdown at 165°C (20°C hysteresis), and output voltage monitoring via three independent open-drain POK signals (POKH, POKA, POKB) with 89–98.5% threshold windows.

Key Specifications

Pinout & Package

The MAX17673ATI+T is housed in a thermally enhanced 28-pin, 5mm × 5mm TQFN package (package code T2855+6C) with exposed thermal pad for efficient heat dissipation in high-power-density layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar triple-output buck regulator applications.

Compared with MP2451DT-LF-Z and TPS543B20RHLT, the MAX17673ATI+T uniquely integrates three independently controllable buck regulators with synchronized switching, prebias-safe startup, and industrial-grade thermal/EMI performance - eliminating design complexity and layout risk in multi-rail embedded systems.

Availability

MAX17673ATI+T is available at Aetrix Electronics and suitable for industrial control power supplies, FPGA/CPLD power supplies, and distributed supply regulation requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for MAX17673ATI+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated, now part of Analog Devices, designs high-performance analog and mixed-signal ICs for industrial, automotive, communications, and computing markets.

The MAX17673/MAX17673A product line targets space- and efficiency-critical power architectures in harsh environments, delivering integrated multi-rail regulation with robust protection and EMI control - specifically for next-generation industrial automation and 5G infrastructure.

FAQ

What is the maximum input voltage supported by the HV buck regulator in the MAX17673ATI+T?

The HV buck regulator in the MAX17673ATI+T supports an input voltage range of 4.5V to 60V. This wide range allows direct connection to industrial 24V/48V buses or telecom -48V-derived positive rails without external pre-regulation, making it suitable for high-voltage single-board systems and base station applications where input transients up to 60V must be tolerated.

Does the MAX17673ATI+T support independent enable control for each of its three regulators?

Yes, the MAX17673ATI+T provides independent enable inputs: ENH for the HV regulator and ENA/ENB for the two LV regulators. Each has defined thresholds (ENH: 1.175–1.225V rising; ENA/ENB: 1.2V rising with 150mV hysteresis), enabling precise power sequencing - for example, bringing up the HV rail first, followed by LV-A and LV-B with programmable delays using external RC networks on the EN pins.

How does the MAX17673ATI+T achieve EMI compliance without external filters?

The MAX17673ATI+T achieves CISPR22 Class B radiated emissions compliance through integrated features including synchronized multi-rail switching (via FDIV), optimized gate drive timing, spread-spectrum-capable architecture, and careful internal routing. Validation testing on the MAX17673AEVKIT# showed compliance with vertical/horizontal scan limits up to 1GHz using standard 4-layer PCB layout practices and recommended decoupling (e.g., C12/C19 = 220pF, C27–C29 = 150pF), eliminating need for costly external EMI filters.

Can the MAX17673ATI+T start up safely when its output rails are already biased (precharged)?

Yes, the MAX17673ATI+T supports monotonic startup into prebiased loads on all three outputs. Its current-mode architecture and controlled gate drive prevent reverse current flow during hot-insertion scenarios - verified in typical operating characteristics (Fig. toc44–toc46). This capability protects downstream FPGAs, memory, and ASICs in modular systems where power rails may be partially energized before the PMIC is enabled.

What is the purpose of the FDIV pin on the MAX17673ATI+T, and how is it configured?

The FDIV pin on the MAX17673ATI+T sets the integer division ratio (2, 3, 4, 5, 6, 7, or 8) between the LV and HV switching frequencies. A resistor connected from FDIV to GND selects the ratio - e.g., RFDIV = 15kΩ yields 4×, allowing a 2MHz LV frequency to drive the HV regulator at 500kHz. This synchronization eliminates beat-frequency noise and simplifies EMI filtering in multi-rail systems such as FPGA power trees.