Analog Devices Inc./Maxim Integrated MAX191BENG+
- Part No.:
- MAX191BENG+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 24-DIP (0.300", 7.62mm)
- Datasheet:
-
MAX191BENG+.pdf
- Description:
- IC ADC 12BIT SAR 24DIP
- Quantity:
- Payment:

- Shipping:

Inventory:1,867
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
The MAX191BENG+ from Maxim Integrated is a monolithic, CMOS 12-bit successive-approximation analog-to-digital converter (ADC) with differential pseudo-differential inputs, integrated track/hold, internal 4.096V reference with REFADJ trim input, and dual serial/parallel µP interface. It delivers 100ksps guaranteed sample rate, 7.5µs conversion time, and operates from single +5V or dual ±5V supplies - enabling ground-referenced bipolar signal acquisition in portable data loggers and industrial process controllers.
For engineers reviewing the MAX191BENG+ datasheet, MAX191BENG+ pinout, MAX191BENG+ application, or MAX191BENG+ equivalent, this page provides verified electrical specifications, package-validated pin functions, temperature-rated performance (–40°C to +85°C), and real-world interface timing for SPI/MICROWIRE/parallel µP integration without external hold capacitors or reference buffers.
Technical Context
The MAX191BENG+ implements a SAR architecture with on-chip track/hold that acquires signals in 2µs and exhibits 25ns aperture delay with ≤50ps jitter. Its analog front-end supports pseudo-differential operation: AIN+ is actively sampled while AIN– serves as a stable return node requiring ≤±0.5LSB stability during conversion.
Digital control is configurable via PAR (serial/parallel mode), HBEN (high-byte enable), CS (conversion trigger), and RD (data strobe). Internal clock generation uses a 120pF capacitor on CLK/DGND for ~1MHz operation, or accepts external TTL/CMOS clocks from 100kHz to 1.6MHz with 45–55% duty cycle tolerance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit SAR with ±1 LSB integral nonlinearity (INL) over –40°C to +85°C |
| Sample Rate | Guaranteed 100ksps minimum - enables real-time capture of 50kHz baseband signals |
| Conversion Time | 7.5µs typical - determined by 13-clock-cycle sequence at 1.6MHz internal/external clock |
| Reference | Internal 4.096V ±20mV (TYP) bandgap reference with REFADJ trim input for system gain calibration |
| Power Modes | 3mA active supply current; 50µA max power-down current with bandgap reference retained |
| Analog Input Range | Bipolar ±4.096V or unipolar 0–4.096V full-scale range selectable via BIP pin |
| Supply Voltage | +5V ±5% (VDD) and/or –5V ±5% (VSS) - supports true ground-referenced bipolar inputs |
Pinout & Package
MAX191BENG+ is housed in a 24-pin narrow plastic DIP (0.300" width) with through-hole mounting and standard 0.1" pin pitch. Pin 1 is marked with a notch or dot; pin numbering follows counterclockwise convention from top-left corner when viewed from component side.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD (Pin 24) | Positive supply input | Accepts +5V ±5%; powers analog core, reference, and digital logic |
| VSS (Pin 1) | Negative supply input | Accepts 0V or –5V ±5%; enables bipolar input operation with AGND-referenced AIN– |
| AGND (Pin 8) | Analog ground reference | Return path for analog inputs and internal reference; must be separated from DGND for noise immunity |
| DGND (Pin 12) | Digital ground reference | Return path for digital I/O and clock; connected to AGND at single point near VDD/VSS decoupling |
| AIN+ (Pin 2) | Sampled analog input | Primary signal input; tracks during T/H tracking mode, held during conversion |
| AIN– (Pin 3) | Analog input return | Pseudo-differential return node; must remain stable within ±0.5LSB vs. AGND during conversion |
| VREF (Pin 4) | Reference buffer output | 4.096V internal reference output; can serve as external reference input when REFADJ = VDD |
| REFADJ (Pin 5) | Reference trim input | Adjusts internal reference gain; 2.5V–5.0V input range yields ±1.7× VREF change for system-level gain calibration |
| CLK/SCLK (Pin 22) | Clock input / serial clock | Accepts external 100kHz–1.6MHz clock or drives internal oscillator with 120pF capacitor to DGND |
| PAR (Pin 21) | Interface mode select | High = parallel mode; low = serial mode (SPI/MICROWIRE/QSPI compatible) |
| HBEN (Pin 20) | High-byte enable | In parallel mode: low = output LSBs (D7–D0); high = output MSBs (D11–D8) on D3–D0 |
| CS (Pin 19) | Chip select | Falling edge initiates conversion in serial mode; enables RD/HBEN in parallel mode when low |
| RD (Pin 18) | Read strobe | In parallel mode: falling edge starts conversion (with CS/HBEN low); enables data output when CS low |
| BUSY (Pin 17) | Conversion status output | Active-low open-drain signal; low during conversion, high when result is latched and ready |
| BIP (Pin 6) | Bipolar/unipolar mode | High = bipolar (±FS); low = unipolar (0–FS); sets data format (MSB inversion in bipolar mode) |
| PD (Pin 7) | Power-down control | Low = 50µA standby mode (bandgap only active); high = normal operation; floating = external reference mode |
| D7/DOUT (Pin 13) | Data output / serial out | Three-state parallel data bit 7 or serial data output (DOUT) in serial mode with RD low |
| D6/SCLKOUT (Pin 14) | Clock output / serial clock | Three-state serial clock output synchronized to conversion; enabled when CS low and RD low |
| D5/SSTRB (Pin 15) | Strobe output / serial strobe | Three-state serial frame strobe; pulses once per 12-bit word; used to latch shift-register outputs |
| D0/D8–D4 (Pins 9–11,16) | Parallel data outputs | Three-state outputs for D0–D4; D0/D8–D3/D11 map to full 12-bit result depending on HBEN state |
Key Features
| Feature | Design Value |
|---|---|
| Integrated track/hold | Eliminates need for external hold capacitor; 2µs acquisition time supports high-Z sensor interfaces |
| Trim-adjustable internal reference | REFADJ pin enables system-level gain error correction without external DAC or op-amp circuitry |
| Dual µP interface modes | Hardware-selectable serial (SPI/MICROWIRE/QSPI) or 8-bit parallel reduces MCU resource usage and PCB routing complexity |
| True bipolar input capability | ±5V dual-supply operation allows direct digitization of AC-coupled or offset signals without level-shifting circuitry |
| Low-power power-down mode | 50µA max quiescent current preserves battery life in portable data loggers between sampling intervals |
Applications
| Battery-Powered Data Logging | PC Pen Digitizers |
|---|---|
Use Scenario: Continuous voltage/current monitoring in remote environmental sensors powered by coin-cell or Li-ion batteries. IC Role / Device Role / Timing Role: ADC front-end acquiring analog sensor outputs at 100ksps with internal reference and power-down control. Use Value: 50µA power-down current extends multi-year battery life; integrated T/H eliminates external components for compact PCB layout. |
Use Scenario: High-resolution position sensing in stylus-based tablet input systems with low-latency response. IC Role / Device Role / Timing Role: Sampling analog pen tip voltage from resistive grid at sub-10µs conversion intervals for real-time cursor tracking. Use Value: 7.5µs conversion time and 25ns aperture delay ensure minimal positional jitter; pseudo-differential input rejects common-mode noise from display EMI. |
| High-Accuracy Process Control | Automatic Testing Systems |
Use Scenario: Closed-loop feedback in PLC analog I/O modules requiring <±1 LSB linearity across industrial temperature range. IC Role / Device Role / Timing Role: Precision digitization of 4–20mA transducer outputs with on-board reference trimming for field calibration. Use Value: ±1 LSB INL at –40°C to +85°C and REFADJ trim capability eliminate need for factory calibration per unit. |
Use Scenario: Multi-channel stimulus-response measurement in benchtop ATE platforms validating mixed-signal ICs. IC Role / Device Role / Timing Role: Synchronized sampling of DUT analog outputs using external clock and BUSY handshake for deterministic timing. Use Value: Guaranteed 100ksps rate and 50ps aperture jitter enable accurate FFT-based distortion analysis up to 50kHz. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit sampling ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS7816U | 12-bit SAR ADC with 200ksps max rate, no internal reference, requires external 2.5V ref; 8-pin SOIC package | Suited for space-constrained designs where external reference is already present; lacks bipolar input support | Select when higher speed and smaller footprint are prioritized over self-contained reference and bipolar operation |
| AD7892BRZ | 12-bit SAR ADC with 600ksps rate, internal 2.5V reference, single +5V supply only; 24-pin SOIC package | Optimized for high-speed unipolar acquisition; no dual-supply option limits bipolar signal handling | Choose for applications needing >100ksps with minimal external components, but verify unipolar-only input compatibility |
Compared with ADS7816U and AD7892BRZ, the MAX191BENG+ uniquely combines internal 4.096V reference with trim capability, true bipolar input support via ±5V supplies, and validated –40°C to +85°C operation - making it optimal for calibrated, battery-operated, or industrial analog front-ends where reference stability and supply flexibility are critical.
Availability
MAX191BENG+ is available at Aetrix Electronics and suitable for battery-powered data logging, PC pen digitizers, and high-accuracy process control requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for MAX191BENG+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in precision analog, mixed-signal, and power management ICs for industrial, medical, and communications applications.
The MAX191BENG+ belongs to Maxim's precision data-acquisition ADC family designed for low-power, high-accuracy digitization in portable and harsh-environment systems - emphasizing integrated functionality, temperature-stable references, and flexible µP interfacing.
FAQ
What is the operating temperature range specified for the MAX191BENG+?
The MAX191BENG+ is rated for operation from –40°C to +85°C, as confirmed by its ordering code suffix "BENG" (B = ±1 LSB INL grade, E = –40°C to +85°C range, NG = narrow plastic DIP). This range is validated across all key parameters including offset error, gain error, and reference output stability - making it suitable for industrial and automotive under-hood environments where thermal robustness is required. The MAX191BENG+ maintains its 100ksps sample rate and ±1 LSB INL performance across this full range.
Does the MAX191BENG+ require external components for basic operation?
Only decoupling capacitors are required for basic operation of the MAX191BENG+: a 4.7µF tantalum or electrolytic capacitor from VDD to DGND, a 0.1µF ceramic capacitor from VSS to DGND, and a 0.1µF ceramic capacitor from AGND to DGND. No external hold capacitor, reference buffer, or clock crystal is needed - the internal track/hold, 4.096V reference, and capacitor-timed oscillator eliminate these components. The REFADJ pin may connect to a trim pot for system calibration, but is optional for nominal operation.
How does the MAX191BENG+ handle bipolar versus unipolar input signals?
The MAX191BENG+ selects input range via the BIP pin: BIP = high configures bipolar mode (±4.096V full-scale), where the 12-bit output is offset binary (MSB inverted); BIP = low configures unipolar mode (0–4.096V), with straight binary output. In both modes, AIN– must be referenced to AGND and stabilized with a 0.1µF capacitor. Bipolar operation requires dual ±5V supplies; unipolar works with single +5V supply and AIN– tied to AGND - enabling flexible signal conditioning without external level-shifting circuitry.
Can the MAX191BENG+ interface directly with SPI-compatible microcontrollers?
Yes, the MAX191BENG+ supports SPI-compatible serial communication when PAR = low. In this mode, CS falling edge initiates conversion, SCLKOUT provides synchronous clock output, SSTRB acts as frame strobe, and DOUT shifts out 12 bits MSB-first. It complies with SPI Mode 0 (CPOL = 0, CPHA = 0) and requires no additional level-shifting for 3.3V or 5V µCs - confirmed by its VIH = 2.4V and VIL = 0.8V logic thresholds. The BUSY pin provides hardware handshaking to prevent read-before-ready errors.
What is the purpose of the REFADJ pin on the MAX191BENG+?
The REFADJ pin on the MAX191BENG+ enables system-level gain calibration by adjusting the internal 4.096V reference voltage. Applying 2.5V–5.0V to REFADJ changes VREF proportionally (≈1.7× sensitivity), allowing correction of end-to-end gain errors from sensors, amplifiers, or PCB traces. This eliminates need for external DACs or op-amp trim circuits. When REFADJ is tied to VDD, the device accepts an external reference on VREF - providing dual reference configuration flexibility within the same footprint and pinout.
MAX191BENG+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 24-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 100k
- Number of Inputs:
- 1
- Input Type:
- Pseudo-Differential
- Data Interface:
- SPI, Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- Internal
- Voltage - Supply, Analog:
- ±5V, 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 24-PDIP
- Mounting Type:
- Through Hole
- Grade:
- -
- Qualification:
- -
MAX191BENG+ FAQ
1.How can I place an order for MAX191BENG+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX191BENG+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX191BENG+ reliable?
The price and inventory of MAX191BENG+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX191BENG+ is usually 5 days.
3.What payment methods are accepted for MAX191BENG+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX191BENG+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX191BENG+?
MAX191BENG+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX191BENG+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX191BENG+?
For technical support, including MAX191BENG+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX191BENG+ requirements.
6.How does Aetrix verify that MAX191BENG+ is sourced from the original manufacturer or authorized distributors?
All MAX191BENG+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX191BENG+ meets industry standards.
7.What is the process for return or replacement of MAX191BENG+?
All MAX191BENG+ units undergo pre-shipment inspection (PSI). If there is an issue with MAX191BENG+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX191BENG+ part is unused and in its original packaging.
Return procedure for MAX191BENG+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX191BENG+ Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

