Analog Devices Inc./Maxim Integrated MAX19517ETM+
- Part No.:
- MAX19517ETM+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
MAX19517ETM+.pdf
- Description:
- IC ADC 10BIT PIPELINED 48TQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,493
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Product details
Overview
MAX19517ETM+ from Maxim Integrated is a dual-channel, 10-bit analog-to-digital converter (ADC) with 130Msps sampling rate, 59.8dBFS SNR at 70MHz, 82dBc SFDR at 70MHz, and 0.4V–1.4V input common-mode voltage range. It supports DC-coupled RF/IF front-ends in zero-IF receivers and operates from 1.8V analog supply or 2.5V–3.3V regulated AVDD.
For engineers reviewing the MAX19517ETM+ datasheet, MAX19517ETM+ pinout, MAX19517ETM+ application, or MAX19517ETM+ equivalent, key selection criteria include dual-channel interleaving capability, programmable clock divider modes (DIV1/DIV2/DIV4), selectable CMOS output bus configuration, and support for single-ended or differential analog/clock inputs in high-frequency communications systems.
Technical Context
The MAX19517ETM+ employs a 10-stage fully differential pipelined architecture with 9-cycle data latency, digital error correction to eliminate missing codes, and integrated duty-cycle equalization for robust high-speed timing. Its track-and-hold circuit uses switched-capacitor sampling with 120Ω input switch resistance and 1.2pF sampled capacitance per input.
It features dual independent analog input channels (INA+/INA− and INB+/INB−), programmable common-mode reference (0.45V–1.35V in 0.15V steps), and flexible power management with 1mW power-down, 21mW standby, and 74mW/channel active mode at 130Msps under 1.8V AVDD.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 10-bit - delivers 1024 discrete amplitude levels for precision digitization of RF/IF signals |
| Max Sampling Rate | 130Msps - enables Nyquist-limited bandwidth up to 65MHz with oversampling flexibility |
| SNR @ 70MHz | 59.8dBFS - ensures >9 effective bits of dynamic resolution for demanding communication waveforms |
| SFDR @ 70MHz | 82dBc - suppresses harmonics and spurs critical for adjacent-channel interference rejection |
| Input Bandwidth | >850MHz - supports direct sampling of L-band and S-band RF signals without external IF filtering |
| Power Consumption | 74mW/channel @ 130Msps - enables compact, thermally constrained designs in portable instrumentation |
| Common-Mode Range | 0.4V to 1.4V - accommodates DC-coupled outputs from baluns, transformers, and baseband amplifiers |
Pinout & Package
MAX19517ETM+ is housed in a 48-pin thin QFN package (7mm × 7mm, 0.8mm height) with exposed thermal pad (EP) connected internally to GND. The package supports high-density PCB layouts and efficient heat dissipation via soldered EP connection to ground plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| INA+, INA− / INB+, INB− | Differential analog input pairs | Accepts ±0.75VP-P differential signal (1.5VP-P full-scale); supports single-ended operation when one side grounded |
| CMA, CMB | Channel A/B common-mode reference | Programmable 0.45V–1.35V bias point; sets input DC operating point for DC-coupled front-ends |
| CLK+, CLK− | Differential clock input | Self-biased 10kΩ termination; accepts 0.4–2.0VP-P; single-ended mode enabled by grounding CLK− |
| D0A–D9A, D0B–D9B | CMOS digital output buses | Configurable as dual parallel (10-bit × 2) or multiplexed (10-bit × 1 with time-division) |
| DCLKA, DCLKB | Data clock outputs | Source-synchronous clocks aligned to respective channel data; simplifies FPGA/CPLD interface timing |
| REFIO | Reference input/output | Internal 1.25V bandgap reference; adjustable ±5% externally to calibrate full-scale voltage (VFS = 1.5 × VREFIO/1.25) |
| SPEN, CS, SCLK, SDIN | Serial programming interface | 3-wire SPI-compatible control; disabled in parallel mode (SPEN = high) to repurpose pins for format/divider/output selection |
Key Features
| Feature | Design Value |
|---|---|
| Programmable clock division | DIV1/DIV2/DIV4 modes allow flexible system clock tree design without external dividers |
| Selectable output data format | Two's complement, gray code, or offset binary - matches native DSP/FPGA arithmetic requirements |
| Reversible bit order | MSB-first or LSB-first output ordering eliminates need for post-processing bit reordering |
| Out-of-range indicator (DORA/DORB) | Dedicated flag per channel signals ADC saturation in real time - enables adaptive gain control loops |
| CMOS output internal termination | Programmable 50Ω/75Ω on-chip termination reduces external component count and layout complexity |
| Wide analog input bandwidth | 850MHz full-power bandwidth supports direct RF sampling up to S-band without external anti-aliasing filters |
Applications
| Cellular Base Station IF Receiver | Ultrasound Beamforming System |
|---|---|
Use Scenario: Digitizing dual-channel I/Q signals from quadrature demodulators in macrocell BTS radios. IC Role / Device Role / Timing Role: Dual-channel simultaneous sampling ADC providing synchronized 10-bit I/Q data streams at 130Msps for digital downconversion. Use Value: 82dBc SFDR prevents harmonic folding into adjacent LTE carriers; 0.4V–1.4V common-mode range interfaces directly with passive IQ mixers. | Use Scenario: Acquiring echo return signals from phased-array transducers in portable ultrasound machines. IC Role / Device Role / Timing Role: Low-power dual-channel ADC capturing time-aligned RF echoes across 128+ receive channels with precise inter-channel phase matching. Use Value: ±0.5° phase match and ±0.15%FSR offset match enable coherent beam synthesis; 74mW/channel minimizes battery drain. |
| Portable Spectrum Analyzer Front-End | Digital Set-Top Box Tuner |
Use Scenario: High-fidelity digitization of wideband IF signals (up to 100MHz span) in handheld RF test equipment. IC Role / Device Role / Timing Role: Wide-input-bandwidth ADC enabling direct IF sampling with minimal analog preprocessing. Use Value: >850MHz analog bandwidth preserves signal integrity through entire IF chain; programmable common-mode allows calibration against variable mixer output levels. | Use Scenario: Converting QAM-modulated IF signals from silicon tuners in consumer STBs before OFDM demodulation. IC Role / Device Role / Timing Role: Dual-channel ADC supporting both legacy NTSC/PAL baseband and modern DVB-C/QAM IF paths. Use Value: Dual CMOS bus outputs feed separate video/audio processing pipelines; 59.8dBFS SNR ensures clean symbol recovery at high-order QAM constellations. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel, 10-bit, high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX19516ETM+ | 100Msps max sampling rate; identical pinout, register map, and feature set | Lower power (62mW/channel) but reduced Nyquist bandwidth (50MHz) | Select when system clock constraints or thermal budget preclude 130Msps operation |
| AD9236BCPZ-105 | Single-channel, 10-bit, 105Msps; different pinout and SPI interface protocol | Lacks dual-channel synchronization and programmable common-mode; higher 1.25V supply requirement | Choose only if single-channel architecture suffices and board redesign is acceptable |
Compared with MAX19517ETM+, MAX19516ETM+ offers identical functionality at lower speed and power, while AD9236BCPZ-105 requires layout and firmware changes due to single-channel architecture and non-compatible control interface.
Availability
MAX19517ETM+ is available at Aetrix Electronics and suitable for cellular infrastructure, medical imaging, portable instrumentation, and digital broadcast equipment requiring stable component supply over extended temperature ranges and long production lifecycles.
Supply support for MAX19517ETM+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and high-speed data conversion ICs for demanding industrial, communications, and medical applications.
The MAX195xx family targets high-performance, low-power sampling in RF/IF receiver chains, emphasizing dual-channel synchronization, wide analog bandwidth, and flexible digital interfacing for software-defined radio and instrumentation systems.
FAQ
What is the maximum input frequency supported by the MAX19517ETM+?
The MAX19517ETM+ specifies a full-power analog input bandwidth of >850MHz, enabling direct sampling of RF signals up to S-band frequencies. Dynamic performance remains characterized up to 175MHz input, with SNR = 59.5dBFS and SFDR = 78dBc at that frequency. For optimal SFDR above 100MHz, maintain clean clock jitter (<0.3ps RMS) and proper analog input termination.
Does the MAX19517ETM+ support single-ended analog inputs?
Yes, the MAX19517ETM+ supports single-ended analog inputs on each channel: drive INA− or INB− to GND and apply signal to INA+ or INB+. Input impedance is ~4kΩ in this mode. Performance metrics (e.g., SNR, SFDR) are specified for differential operation but remain usable in single-ended configurations with appropriate layout and noise mitigation.
How does the MAX19517ETM+ handle power supply variations between AVDD and OVDD?
The MAX19517ETM+ separates analog (AVDD) and digital output (OVDD) supplies: AVDD operates at 1.8V or 2.5V–3.3V (with internal regulator), while OVDD runs independently from 1.8V–3.5V. This isolation prevents digital switching noise from degrading analog performance. Supply current scales linearly with OVDD voltage, and digital output drive strength adjusts accordingly to maintain signal integrity across logic families.
Can the MAX19517ETM+ operate without an external reference?
Yes, the MAX19517ETM+ includes an internal 1.25V bandgap reference. Bypass REFIO to GND with ≥0.1µF capacitor to enable it. Internal reference provides <±60ppm/°C temperature drift and supports full-scale range calculation VFS = 1.5 × VREFIO/1.25. External reference is optional for tighter gain accuracy or system-level calibration.
What is the data latency of the MAX19517ETM+ and how is it affected by clock divider mode?
The MAX19517ETM+ has fixed 9-clock-cycle latency from sample initiation to valid output data, regardless of DIV1/DIV2/DIV4 clock divider mode. Latency is measured from rising edge of CLK+ to valid D0A–D9A/D0B–D9B data aligned with DCLKA/DCLKB. Clock divider affects only the relationship between input master clock and internal sampling clock-not pipeline depth or propagation delay.
MAX19517ETM+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 10
- Sampling Rate (Per Second):
- 130M
- Number of Inputs:
- 2
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 1.7V ~ 1.9V, 2.3V ~ 3.5V
- Voltage - Supply, Digital:
- 1.7V ~ 3.5V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 48-TQFN (7x7)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
MAX19517ETM+ FAQ
1.How can I place an order for MAX19517ETM+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX19517ETM+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX19517ETM+ reliable?
The price and inventory of MAX19517ETM+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX19517ETM+ is usually 5 days.
3.What payment methods are accepted for MAX19517ETM+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX19517ETM+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX19517ETM+?
MAX19517ETM+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX19517ETM+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX19517ETM+?
For technical support, including MAX19517ETM+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX19517ETM+ requirements.
6.How does Aetrix verify that MAX19517ETM+ is sourced from the original manufacturer or authorized distributors?
All MAX19517ETM+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX19517ETM+ meets industry standards.
7.What is the process for return or replacement of MAX19517ETM+?
All MAX19517ETM+ units undergo pre-shipment inspection (PSI). If there is an issue with MAX19517ETM+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX19517ETM+ part is unused and in its original packaging.
Return procedure for MAX19517ETM+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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