Analog Devices Inc./Maxim Integrated MAX1970EEE+T
- Part No.:
- MAX1970EEE+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package:
- 16-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
MAX1970EEE+T.pdf
- Description:
- IC REG BUCK ADJ 750MA DL 16QSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,370
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Product details
Overview
MAX1970EEE+T from Maxim Integrated is a dual-output, current-mode PWM buck regulator IC operating at a fixed 1.4MHz switching frequency, delivering up to 750mA per output from a 2.6V–5.5V input. It features 180° out-of-phase operation to reduce input ripple, ±1% output voltage accuracy over load/line/temperature, and integrated power-on reset (POR) with 16.6ms delay. It is used in USB-powered xDSL modems for compact, efficient dual-rail power conversion.
For engineers reviewing the MAX1970EEE+T datasheet, MAX1970EEE+T pinout, MAX1970EEE+T application, or MAX1970EEE+T equivalent, this page delivers verified technical context, exact pin functions, real-world application mappings, and validated alternative options - all grounded in Maxim's official specifications for the MAX1970EEE+T variant.
Technical Context
The MAX1970EEE+T implements a current-mode PWM control architecture with slope compensation to ensure stability across wide load and input ranges. Its two synchronous buck regulators operate 180° out of phase, minimizing input capacitor RMS current and enabling all-ceramic designs. Internal high-side and low-side MOSFETs (RDS(ON) = 0.32Ω / 0.25Ω typical at 5V/3.3V) eliminate external diodes and enable >90% efficiency at mid-load.
It integrates a 1.2V reference (±0.3% initial accuracy), soft-start via REF pin (25µA current source), and dedicated compensation pins (COMP1/COMP2) for loop tuning. The POR circuit monitors both outputs and asserts an open-drain signal after they reach 92% of regulation plus a fixed 16.6ms delay - critical for sequenced system startup in xDSL and SFP applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.6V to 5.5V - supports single-cell Li-ion, USB 5V, and 3.3V/5V system rails without pre-regulation. |
| Switching Frequency | 1.4MHz (fixed) - enables use of sub-4.7µH inductors and 10µF ceramic input/output capacitors. |
| Output Current (each) | 750mA guaranteed - sufficient to replace dual LDOs in point-of-load applications like SFP modules. |
| Output Voltage Accuracy | ±1% over load, line, and temperature - ensures stable core/logic rail compliance without post-regulation trimming. |
| POR Delay Time | 16.6ms - provides deterministic system reset timing after both outputs stabilize to ≥92% of target. |
| Power-Fail Output (PFO) | Open-drain, trips at 3.94V falling VIN - enables early USB power-loss detection before output collapse. |
| Soft-Start Control | REF pin with 25µA current source - allows programmable ramp time (e.g., 48ms with 1µF capacitor) to limit inrush. |
Pinout & Package
MAX1970EEE+T is housed in a 16-pin QSOP package (5.0mm × 6.2mm, 0.635mm pitch), optimized for thermal performance and board space in compact DSL and optical module designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 LX1 | High-side switch node 1 | Connects to inductor for OUT1; carries high-frequency switching current - requires tight layout to PGND. |
| 2 VCC | Analog supply | Bypassed with 0.1µF ceramic to GND; powers internal reference, comparators, and gate drivers. |
| 3 COMP1 | OUT1 compensation node | Connect RC network (e.g., 39kΩ + 680pF) to GND to stabilize feedback loop for first regulator. |
| 4 FB1 | OUT1 feedback input | Senses regulated output; supports preset (1.8V/3.3V) or adjustable (1.2V–VIN) modes via FBSEL1. |
| 5 FB2 | OUT2 feedback input | Same functionality as FB1 but for second output; preset options are 1.5V or 2.5V. |
| 6 COMP2 | OUT2 compensation node | Independent loop compensation path - allows optimization of transient response for each output. |
| 7 REF | Reference voltage & soft-start | 1.2V reference output; charging current (25µA) sets soft-start ramp rate when bypassed with capacitor. |
| 8 GND | Analog ground | Reference for FB/COMP/REF; must be star-connected to PGND near IN bypass capacitor. |
| 9 POR | Open-drain power-on reset | Active-low signal asserted until both outputs reach regulation + 16.6ms - drives microcontroller reset. |
| 10 EN | Enable input | Logic-high enables both regulators; logic-low reduces quiescent current to ~1µA for shutdown. |
| 11 PFO | Open-drain power-fail output | Goes high when VIN falls below 3.94V - used to trigger graceful shutdown or status alert in USB systems. |
| 12 FBSEL2 | OUT2 feedback select | Connect to GND → 1.5V; to VCC → 2.5V; floating → external resistor divider for custom voltage. |
| 13 FBSEL1 | OUT1 feedback select | Connect to GND → 1.8V; to VCC → 3.3V; floating → external divider for 1.2V–VIN range. |
| 14 IN | Main power input | 2.6V–5.5V supply; bypassed with 10µF ceramic to PGND; feeds internal regulators and switches. |
| 15 LX2 | High-side switch node 2 | Inductor connection for OUT2; 180° out-of-phase with LX1 to cancel input ripple. |
| 16 PGND | Power ground | Return path for high-current LX1/LX2 paths; separate from analog GND to minimize noise coupling. |
Key Features
| Feature | Design Value |
|---|---|
| 180° out-of-phase dual regulation | Reduces RMS input capacitor current by ~30%, allowing smaller 10µF ceramic instead of larger electrolytic. |
| Integrated synchronous rectification | Eliminates external Schottky diodes - improves full-load efficiency by 5–8% vs. asynchronous designs. |
| Sub-1V output capability (with constraint) | Enables generation of 1.0V core rails when one output is >1.2V - supports mixed-voltage SoC designs. |
| Programmable soft-start via REF pin | 25µA current source enables precise ramp control (e.g., 10ms–100ms) without external timers or components. |
| Open-drain POR and PFO outputs | Directly interface with standard logic-level microcontrollers and PMICs without level-shifting or pull-up conflicts. |
| All-ceramic capacitor support | Validated with 10µF X5R/X7R input and 22µF output caps - eliminates ESR-related instability and aging concerns. |
Applications
| xDSL Modems | USB-Powered Devices |
|---|---|
|
Use Scenario: Powering ADSL/VDSL line card ASICs and PHYs from a single USB 5V port. IC Role / Device Role / Timing Role: Dual-rail DC-DC converter generating 3.3V for digital logic and 1.5V for analog front-end, synchronized to avoid beat frequencies. Use Value: 1.4MHz operation stays outside xDSL band (0.138–30MHz); PFO detects USB disconnect before brownout. |
Use Scenario: Compact portable test equipment drawing power exclusively from USB host. IC Role / Device Role / Timing Role: Replaces discrete LDO pair with higher efficiency and tighter regulation for MCU + sensor rails. Use Value: 750mA per rail supports active USB peripherals; ±1% accuracy maintains ADC reference stability. |
| Copper Gigabit SFP Modules | Dual LDO Replacement |
|
Use Scenario: Providing isolated 3.3V and 2.5V supplies inside hot-pluggable SFP transceivers. IC Role / Device Role / Timing Role: Primary power controller with POR sequencing to meet SFF-8472 compliance for module initialization. Use Value: QSOP package fits narrow SFP PCB; 16.6ms POR delay matches host controller reset timing requirements. |
Use Scenario: Upgrading legacy dual-LDO power trees in industrial controllers to improve thermal performance. IC Role / Device Role / Timing Role: High-efficiency buck regulator pair replacing linear regulators to reduce board temperature rise. Use Value: >90% efficiency at 500mA cuts power loss by >1.2W vs. LDOs - eliminates need for heatsinking in sealed enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX1972EEE+T | Same 1.4MHz frequency and PFO function, but 175ms POR delay (vs. 16.6ms); identical pinout and electrical specs. | Used where longer system reset hold time is required - e.g., FPGA configuration loading sequences. | Select MAX1972EEE+T only if extended POR delay is needed; otherwise MAX1970EEE+T offers tighter timing control. |
| TPS65270RGET | 2.5V–5.5V input, 1.2MHz switching, 1A per channel, but no integrated PFO or POR; requires external reset IC. | Preferred for higher-current applications (>750mA) where system-level reset management already exists. | Choose TPS65270RGET when output current headroom or wider input range is prioritized over integrated monitoring features. |
Compared with MAX1972EEE+T, the MAX1970EEE+T provides faster POR assertion for time-critical boot sequences; compared with TPS65270RGET, it trades off current capacity for integrated fault monitoring and smaller solution size.
Availability
MAX1970EEE+T is available at Aetrix Electronics and suitable for xDSL modems, USB-powered devices, and copper Gigabit SFP modules requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for MAX1970EEE+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog and mixed-signal ICs for power management, sensing, and communications.
The MAX1970EEE+T belongs to Maxim's high-frequency dual buck regulator product line, designed specifically for space-constrained, noise-sensitive broadband communications equipment requiring precise dual-rail power with integrated monitoring.
FAQ
What is the switching frequency of the MAX1970EEE+T and why does it matter?
The MAX1970EEE+T operates at a fixed 1.4MHz switching frequency. This high frequency allows the use of small-value inductors (e.g., 3.3µH) and ceramic capacitors, reducing solution size and cost. It also places switching noise outside the xDSL frequency band (0.138–30MHz), preventing interference with data transmission - a key requirement confirmed in Maxim's application notes for MAX1970EEE+T.
Does the MAX1970EEE+T support output voltages below 1.2V?
Yes, the MAX1970EEE+T can generate sub-1V outputs (e.g., 1.0V) on one rail, provided the other output is set above 1.2V - a capability explicitly documented in the "Output Voltage Selection" section of the MAX1970EEE+T datasheet. This is achieved using a cross-connected resistor divider between FB1 and OUT2, not standard feedback topology.
How does the power-fail output (PFO) function in the MAX1970EEE+T?
The PFO pin on the MAX1970EEE+T is an open-drain output that goes high when the input voltage (VIN) falls below 3.94V (typical). It is designed for USB-powered systems to detect upstream power loss before output regulation collapses. A 10kΩ–100kΩ pull-up to VIN or an output rail is required, as specified in the MAX1970EEE+T functional description.
What is the purpose of the FBSEL1 and FBSEL2 pins on the MAX1970EEE+T?
FBSEL1 and FBSEL2 on the MAX1970EEE+T configure each output's default voltage: FBSEL1 = GND → 1.8V, VCC → 3.3V; FBSEL2 = GND → 1.5V, VCC → 2.5V. When left unconnected, they enable external resistor-divider programming from 1.2V to VIN. This three-mode flexibility is a defining feature of the MAX1970EEE+T, eliminating need for external DACs or EEPROMs.
Can the MAX1970EEE+T be used with all-ceramic capacitors?
Yes, the MAX1970EEE+T is fully qualified for all-ceramic capacitor designs. The datasheet specifies 10µF X5R/X7R ceramic for input and 22µF for each output, enabled by its current-mode control and internal compensation. This eliminates ESR dependency and improves reliability versus tantalum or aluminum electrolytics - a key design advantage confirmed in MAX1970EEE+T typical application circuits.
MAX1970EEE+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 16-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable (Programmable)
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.6V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.2V (1.5V, 1.8V, 2.5V, 3.3V)
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 750mA
- Frequency - Switching:
- 1.4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QSOP
MAX1970EEE+T FAQ
1.How can I place an order for MAX1970EEE+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX1970EEE+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX1970EEE+T reliable?
The price and inventory of MAX1970EEE+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX1970EEE+T is usually 5 days.
3.What payment methods are accepted for MAX1970EEE+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX1970EEE+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX1970EEE+T?
MAX1970EEE+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX1970EEE+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX1970EEE+T?
For technical support, including MAX1970EEE+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX1970EEE+T requirements.
6.How does Aetrix verify that MAX1970EEE+T is sourced from the original manufacturer or authorized distributors?
All MAX1970EEE+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX1970EEE+T meets industry standards.
7.What is the process for return or replacement of MAX1970EEE+T?
All MAX1970EEE+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX1970EEE+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX1970EEE+T part is unused and in its original packaging.
Return procedure for MAX1970EEE+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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