Analog Devices Inc./Maxim Integrated MAX1996AEGI

Overview

MAX1996AEGI from Maxim Integrated is a high-efficiency CCFL backlight controller optimized for synchronized full-bridge inverter architectures driving cold-cathode fluorescent lamps. It delivers near-sinusoidal lamp drive waveforms, supports 4.6V–28V input voltage range, achieves >30:1 dimming via combined linear + DPWM control, and integrates 5.3V linear regulator and four gate drivers for external N-channel MOSFETs - used in notebook computers and multibulb LCD monitors.

For engineers reviewing the MAX1996AEGI datasheet, MAX1996AEGI pinout, MAX1996AEGI application, or MAX1996AEGI equivalent, key selection considerations include its guaranteed 200Hz–220Hz DPWM frequency, lamp-out protection with ~1s timeout, transformer secondary voltage limiting, SMBus-compatible 2-wire interface (address 0x58), and 28-pin thin QFN (5mm × 5mm) package with -40°C to +85°C operation.

Technical Context

The MAX1996AEGI implements dual-loop control: a current loop (regulated via IFB input, 150mV lamp-out threshold) dominates brightness regulation, while a voltage loop (regulated via VFB input, 500mV target) limits transformer secondary voltage during startup and open-lamp faults. Its feed-forward circuit dynamically adjusts on-time (t_ON) to input voltage changes, ensuring stable lamp output across wide VBATT variations without loop compensation redesign.

It synchronizes DPWM chopping to resonant tank frequency using MODE pin AC coupling (32kHz–100kHz sync range), enabling zero-voltage switching (ZVS) across all four power MOSFETs. The internal 5.3V LDO powers gate drivers (GH1/GH2/GL1/GL2), DPWM oscillator, and core logic - with GH/GL drivers delivering ≤6Ω on-resistance and ≥1A peak output current.

Key Specifications

Pinout & Package

MAX1996AEGI is housed in a 28-pin thin QFN package (5mm × 5mm, 0.5mm pitch), thermally enhanced with exposed pad. Pin functions are validated per Maxim's official pin description table and schematic Figure 1.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar CCFL backlight controller applications.

Compared with MAX1895ETI and LM3481MM/NOPB, the MAX1996AEGI uniquely integrates gate drivers, dual-loop regulation, guaranteed DPWM frequency, and SMBus interface in one 28-pin QFN - reducing BOM count and simplifying layout for compact, high-reliability CCFL backlight systems.

Availability

MAX1996AEGI is available at Aetrix Electronics and suitable for notebook computers, multibulb LCD monitors, and portable display electronics requiring stable component supply, long-lifecycle support, and qualified industrial temperature operation.

Supply support for MAX1996AEGI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in precision analog, mixed-signal, and power management ICs for industrial, computing, and consumer applications.

The MAX1996AEGI belongs to Maxim's CCFL backlight controller product line, designed specifically for high-efficiency, flicker-free, and fault-protected cold-cathode fluorescent lamp driving in space-constrained portable and display systems.

FAQ

What is the SMBus slave address for MAX1996AEGI?

The MAX1996AEGI uses SMBus slave address 0x58, which differs from the MAX1895's 0x50. This allows both controllers to coexist on the same SMBus bus without address conflict. The address is hardwired and not configurable. MAX1996AEGI responds to standard SMBus read/write commands for brightness, status, and configuration registers when MODE = VCC.

How does MAX1996AEGI protect against lamp-out conditions?

The MAX1996AEGI monitors lamp current via the IFB pin and triggers lamp-out protection if the voltage drops below 150mV for approximately 1 second (256 DPWM cycles). Upon detection, it disables gate drive outputs and enters a fault state. Recovery requires cycling SH/SUS or resetting the SMBus command. This behavior is confirmed in the Electrical Characteristics table and Typical Operating Characteristics figure toc08.

Can MAX1996AEGI operate with input voltage below 5.5V?

Yes - MAX1996AEGI supports VBATT from 4.6V to 28V. When VBATT < 5.5V, VCC can be tied directly to BATT (per Pin Description note on pin 28). The internal 5.3V LDO remains active only when VBATT > 5.5V; below that, the chip operates from the direct BATT supply. Quiescent current is 6mA at VBATT = 5V, verified in the Electrical Characteristics table.

What is the purpose of the MODE pin on MAX1996AEGI?

The MODE pin on MAX1996AEGI serves two functions: interface selection (GND = positive analog, REF = reverse analog, VCC = SMBus) and DPWM synchronization input. An AC signal (32–100kHz, 2–5V_PP) superimposed on the DC bias synchronizes the internal DPWM oscillator to the resonant tank frequency - critical for achieving zero-voltage switching and minimizing EMI in the full-bridge inverter.

Does MAX1996AEGI require external compensation components?

Yes - MAX1996AEGI requires external capacitors on CCI (0.1µF to GND) and CCV (10nF to GND) for current-loop and voltage-loop compensation, respectively. These components set loop stability and transient response. The values are specified in the Pin Description section and Figure 1. No external resistors are needed for DPWM frequency setting - it is internally guaranteed from 200Hz to 220Hz.