Analog Devices Inc./Maxim Integrated MAX20333ENL+T
- Part No.:
- MAX20333ENL+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Current Regulation/Management
- Package:
- 15-XFBGA, WLBGA
- Datasheet:
-
MAX20333ENL+T.pdf
- Description:
- IC CURRENT SWITCH 15WLP
- Quantity:
- Payment:

- Shipping:

Inventory:2,230
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Product details
Overview
MAX20333ENL+T from Maxim Integrated is a programmable current-limit switch with latchoff behavior, designed for high-reliability power path protection in USB ports and battery disconnect circuits. It features 23mΩ typical on-resistance, 3.5V–22V input range, programmable current limit from 0.2A to 4.75A via SETI resistor, and integrated thermal shutdown at +150°C. Its 15-bump WLP package (2.1mm × 1.52mm) supports compact industrial and portable designs.
For engineers reviewing the MAX20333ENL+T datasheet, MAX20333ENL+T pinout, MAX20333ENL+T application, or MAX20333ENL+T equivalent, key selection criteria include latchoff fault response, PBT-based blanking time configuration, low-quiescent-current operation in normal mode (0.9–1.2mA), and compatibility with 3.5V–22V supply rails in embedded power management systems.
Technical Context
The MAX20333ENL+T implements a precision current-sense FET switch with three operational modes: normal (NM), high-current (HCM), and low-power (LPM). In NM - its default active mode - it enforces a user-programmed current limit using an external resistor on SETI and responds to overcurrent with latchoff behavior after blanking time expiration.
It uses PBT (Programmable Blanking Time) functionality: a 5µA internal current source charges an external capacitor to set tBLANK from 350µs to 500ms, with autoretry disabled per ordering code "ENL". The device integrates open-drain FLAG output for fault reporting and PG input for mode selection, supporting robust system-level fault containment without microcontroller intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | +3.5V to +22V - supports wide-input industrial and automotive auxiliary rails without external regulators. |
| On-Resistance (NM) | 23mΩ (typ) - minimizes voltage drop and power loss at 2A load (46mV drop, 92mW dissipation). |
| Current Limit Range | 0.2A to 4.75A - set by 421Ω–10kΩ resistor on SETI; enables single-BOM flexibility across load profiles. |
| Fault Response | Latchoff - disables output permanently until EN/EN or VIN cycling; prevents repeated fault stress on downstream circuitry. |
| Blanking Time | Programmable via CPBT capacitor - avoids false trips during inrush or transient overload (e.g., 100ms blanking with 330nF). |
| Thermal Shutdown | +150°C (typ), +15°C hysteresis - protects silicon integrity during sustained short-circuit conditions. |
| Quiescent Current (NM) | 0.9–1.2mA - enables always-on monitoring without excessive standby drain in battery-backed systems. |
Pinout & Package
MAX20333ENL+T is housed in a 15-bump Wafer-Level Package (WLP), measuring 2.1mm × 1.52mm, optimized for space-constrained PCB layouts and thermal performance on four-layer boards (θJA = 61.65°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN (A1–A3, B1, B3) | Power Input | High-current input node; must be bypassed with ≥1μF ceramic capacitor near package for stability during short-circuit events. |
| OUT (B2, C1–C3) | Switch Output | Load-side terminal; connects to protected subsystem; requires local 1μF ceramic decoupling to GND. |
| SETI (C5) | Current Limit & Monitor | Analog interface for programming ILIM (via RSETI) and reading real-time IOUT (VSETI ∝ IOUT × CIRATIO). |
| PBT (B4) | Blanking Time Control | Sources 5µA to external capacitor; sets tBLANK = (CPBT × 1.5)/5µA + 300µs - defines minimum fault duration before latchoff. |
| EN (B5) | Active-High Enable | Assert high to activate NM/HCM/LPM; low forces shutdown with <3.5µA quiescent current. |
| PG (A4) | Mode Selection Input | With EN high, PG low selects HCM; PG high selects NM; used with EN/PG truth table for precise mode control. |
| FLAG (A5) | Open-Drain Fault Flag | Asserts low on overcurrent (after tBLANK), thermal shutdown, or SETI grounded - signals host controller of critical fault. |
| GND (C4) | Reference Ground | Primary return path for all internal circuitry and external capacitors; must be low-impedance connection to system ground plane. |
Key Features
| Feature | Design Value |
|---|---|
| Latchoff Fault Response | Prevents repeated current surges by latching OFF after blanking time - eliminates thermal cycling and ensures safe fault isolation. |
| PBT-Based Blanking Time | Enables precise, capacitor-programmable tBLANK (350µs–500ms) - suppresses nuisance trips while retaining fast fault detection. |
| Three-Mode Operation | Supports NM (precision limit), HCM (2× limit, up to 5.5A), and LPM (25µA IQ, 420mΩ RON) - adapts protection profile to system state. |
| Real-Time Current Monitoring | VSETI provides analog IOUT feedback (±5% accuracy) - enables closed-loop load diagnostics without additional sense resistors. |
| Integrated Thermal Protection | Shuts down at +150°C junction temperature with +15°C hysteresis - prevents permanent damage during sustained overload. |
Applications
| USB Port Protection Switch | Battery Disconnect Switch |
|---|---|
Use Scenario: Protecting downstream USB peripherals from overcurrent faults caused by cable shorts or defective devices. IC Role / Device Role / Timing Role: Primary current-limiting switch placed between USB VBUS and port connector; enforces strict 900mA–3A limits per USB spec revisions. Use Value: Prevents host port damage and system brownouts by latching off during sustained overload - eliminating retry-induced bus instability. | Use Scenario: Isolating backup battery from main system during maintenance, fault, or deep sleep states. IC Role / Device Role / Timing Role: High-side disconnect switch controlled by MCU GPIO; activated only during safe power-down sequences. Use Value: Guarantees zero leakage current in shutdown (<3.5µA) and prevents battery drain - extends shelf life in unattended equipment. |
| Industrial Power Supply Sequencing | Medical Diagnostic Equipment Power Path |
Use Scenario: Enabling controlled power-up of multiple subsystems with staggered current limits to avoid inrush overload on shared 24V rail. IC Role / Device Role / Timing Role: Programmable current limiter per subsystem rail; coordinated via EN/PG logic to sequence turn-on timing. Use Value: Eliminates need for discrete current-sense amplifiers and comparators - reduces BOM count and layout area in multi-rail supplies. | Use Scenario: Safeguarding sensitive imaging sensors and analog front-ends from power faults during MRI or ultrasound operation. IC Role / Device Role / Timing Role: Final-stage protection switch before critical analog circuitry; configured for 0.5A limit and 10ms blanking to tolerate sensor startup transients. Use Value: Maintains UL 2367 recognition (File E211395) and meets IEC 60601 creepage requirements via integrated fault containment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar current-limit switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS259621RVCR | Fixed 2.5A limit (non-programmable); 28mΩ RON; integrated eFuse with I²C telemetry. | Requires digital interface for configuration; lacks analog current monitor (SETI) and PBT blanking. | Choose when telemetry, logging, or remote reset are required - not for analog-only or cost-sensitive latchoff designs. |
| AP22653AW5-7 | Programmable 0.5–3.5A limit; 45mΩ RON; auto-retry only (no latchoff or LPM). | No low-power mode or thermal shutdown; blanking time fixed at 10ms. | Choose for simpler, lower-cost USB charging ports where latchoff is unnecessary and thermal margin is sufficient. |
Compared with TPS259621RVCR and AP22653AW5-7, MAX20333ENL+T uniquely delivers latchoff behavior with capacitor-programmable blanking, analog current monitoring, and ultra-low IQ in low-power mode - making it optimal for safety-critical, analog-controlled, and battery-sensitive applications.
Availability
MAX20333ENL+T is available at Aetrix Electronics and suitable for USB port protection, battery disconnect, and industrial power supply sequencing requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for MAX20333ENL+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated, now part of Analog Devices, designs precision analog, mixed-signal, and power management ICs for demanding industrial, medical, and communications applications.
The MAX20333 family was developed to deliver programmable, mode-selectable current limiting in ultra-small WLP packages - targeting space-constrained, high-reliability power path protection where analog configurability and fault containment are essential.
FAQ
What current limit range does MAX20333ENL+T support, and how is it set?
MAX20333ENL+T supports a programmable current limit from 0.2A to 4.75A in normal mode. This is set by connecting a resistor (RSETI) between the SETI pin and GND. For example, a 421Ω resistor yields 4.75A, while a 10kΩ resistor yields 0.2A. The relationship follows ILIM = 2000V / RSETI(Ω), and RSETI must exceed 350Ω to avoid disabling the switch. MAX20333ENL+T uses this analog programming method for precise, resistor-based tuning without digital interface overhead.
How does the latchoff fault response work in MAX20333ENL+T?
In MAX20333ENL+T, latchoff means the switch turns OFF permanently once an overcurrent condition persists beyond the programmed blanking time (tBLANK). Unlike autoretry or continuous modes, no automatic recovery occurs - the output remains disabled until the enable signal (EN) is cycled or input voltage is removed and reapplied. This behavior prevents repeated fault stress on downstream loads and is ideal for safety-critical disconnection. MAX20333ENL+T implements this via internal logic tied to the PBT pin configuration and EN/PG truth table.
What is the role of the PBT pin on MAX20333ENL+T, and how is it used?
The PBT (Programmable Blanking Time) pin on MAX20333ENL+T sources a precise 5µA current to charge an external capacitor (CPBT) to ground, setting the blanking time tBLANK = (CPBT × 1.5)/5µA + 300µs. This defines the minimum overcurrent duration before latchoff activation - suppressing false trips during inrush or transient events. For instance, a 330nF capacitor yields ~100ms blanking. MAX20333ENL+T relies on PBT instead of fixed internal timers to provide design flexibility across diverse load profiles.
Does MAX20333ENL+T support low-power mode, and what are its characteristics?
Yes, MAX20333ENL+T supports Low Power Mode (LPM), entered via EN/PG logic. In LPM, quiescent current drops to 13–25µA, but on-resistance rises to 420mΩ (typ), and overcurrent protection triggers at 0.4A (typ). Thermal shutdown and autoretry are disabled; the switch opens immediately if (VIN – VOUT) exceeds 165mV (VSD_THR). LPM is intended for standby or maintenance states - not active load driving. MAX20333ENL+T maintains flag assertion and latchoff behavior in LPM, ensuring fault visibility even at ultra-low IQ.
Can MAX20333ENL+T monitor output current in real time, and how accurate is it?
Yes, MAX20333ENL+T provides real-time current monitoring via the SETI pin: VSETI = IOUT × RSETI / CIRATIO, where CIRATIO = 1333 in normal mode. With proper layout and ≤20pF capacitance on SETI, measurement accuracy is ±5% across temperature. This analog output eliminates need for external sense resistors and ADCs in basic load diagnostics. MAX20333ENL+T's SETI interface directly supports microcontroller ADC inputs for closed-loop current supervision without signal conditioning.
MAX20333ENL+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 15-XFBGA, WLBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Current Switch
- Sensing Method:
- -
- Accuracy:
- -
- Voltage - Input:
- 3.5V ~ 22V
- Current - Output:
- 4.75A
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 15-WLP (2.1x1.52)
MAX20333ENL+T FAQ
1.How can I place an order for MAX20333ENL+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX20333ENL+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX20333ENL+T reliable?
The price and inventory of MAX20333ENL+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX20333ENL+T is usually 5 days.
3.What payment methods are accepted for MAX20333ENL+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX20333ENL+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX20333ENL+T?
MAX20333ENL+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX20333ENL+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX20333ENL+T?
For technical support, including MAX20333ENL+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX20333ENL+T requirements.
6.How does Aetrix verify that MAX20333ENL+T is sourced from the original manufacturer or authorized distributors?
All MAX20333ENL+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX20333ENL+T meets industry standards.
7.What is the process for return or replacement of MAX20333ENL+T?
All MAX20333ENL+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX20333ENL+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX20333ENL+T part is unused and in its original packaging.
Return procedure for MAX20333ENL+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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