Analog Devices Inc./Maxim Integrated MAX335CWG

Overview

The MAX335CWG from Maxim Integrated is an 8-channel serial-controlled SPST analog switch IC with SPI-compatible interface, ±4.5V to ±20V dual-supply operation, 100Ω typical on-resistance, rail-to-rail ±15V analog signal handling, and daisy-chainable shift-register architecture-used for precision signal routing in avionics and process control systems.

For engineers reviewing the MAX335CWG datasheet, MAX335CWG pinout, MAX335CWG application, or MAX335CWG equivalent, this page delivers verified electrical specs, real-world timing behavior, package-validated pin functions, and functionally comparable alternatives for industrial-grade analog switching designs.

Technical Context

The MAX335CWG implements an 8-bit serial shift register synchronized to SCLK's rising edge, with CS-controlled latching on its rising edge while SCLK is low-ensuring deterministic switch state updates. Its internal translator circuitry supports TTL-level logic thresholds via VL (4.5V to V+), enabling compatibility with +5V microcontrollers while operating analog channels across ±20V rails.

Each of the eight SPST switches exhibits symmetrical conduction, constant on-resistance over full analog range, sub-1nA off-leakage at ±14V, and <500ns turn-on/turn-off times. Digital feedthrough is limited to 100nV-sec, mitigated by 150mV SCLK hysteresis and channel capacitance filtering.

Key Specifications

Pinout & Package

The MAX335CWG is housed in a 24-pin Wide SO (Small Outline) package with 0.300" body width, gull-wing leads, and JEDEC MS-013AC compliant footprint (15.6mm × 7.6mm × 2.65mm).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar analog switch applications.

Compared with MAX335CWG, MAX336CWI+ offers double channel count in identical packaging but sacrifices daisy-chain capability and increases on-resistance, while ADG732BRUZ delivers ultra-low R_ON and higher integration at the cost of bipolar analog support-making MAX335CWG uniquely suited for ruggedized, wide-supply, serially scalable analog routing.

Availability

MAX335CWG is available at Aetrix Electronics and suitable for avionics signal routing, industrial process control, test equipment multiplexing, and networking signal conditioning requiring stable component supply across extended temperature and voltage ranges.

Supply support for MAX335CWG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs high-performance analog, mixed-signal, and power management ICs for demanding industrial, automotive, and communications applications.

The MAX335CWG belongs to Maxim's serial-controlled analog switch product line, engineered specifically for robust, low-leakage, rail-to-rail signal routing in environments requiring deterministic digital control and wide supply flexibility.

FAQ

What is the maximum analog signal voltage swing supported by the MAX335CWG?

The MAX335CWG supports a ±15V analog signal range referenced to V−, meaning it handles rail-to-rail signals from −15V to +15V relative to the negative supply. This is validated across its full operating temperature range (0°C to +70°C) and compatible with ±4.5V to ±20V dual supplies. The MAX335CWG maintains consistent on-resistance and leakage performance within this span, making it suitable for high-fidelity analog routing in industrial and avionics systems where signal integrity across wide voltage excursions is critical. The MAX335CWG datasheet specifies VANALOG = ±15V under all conditions.

How does the MAX335CWG achieve daisy-chaining, and what is required to synchronize multiple devices?

The MAX335CWG achieves daisy-chaining via its DOUT pin, which outputs the Q₇ bit of its internal 8-bit shift register on SCLK's falling edge-delayed by exactly eight clocks. To synchronize multiple MAX335CWG devices, connect DIN of Device 1 to the controller, DOUT of Device 1 to DIN of Device 2, and so on, while tying all CS and SCLK lines together. A single CS pulse after shifting 8 × N bits updates all N devices simultaneously. This architecture eliminates timing skew between devices and requires no additional logic-only three MCU pins (SCLK, DIN, CS) regardless of chain length. The MAX335CWG's guaranteed t_DO (240–400ns) ensures reliable inter-device data propagation.

What happens to the MAX335CWG switches during power-up, and how is the initial state ensured?

Upon power-up, the MAX335CWG initializes all eight SPST switches to the OFF state, and its internal 8-bit shift register resets to zero. This behavior is guaranteed by internal power-on-reset circuitry that monitors V+, V−, and VL. The reset is active until all supplies stabilize within valid ranges (±4.5V to ±20V for V±, 4.5V to V+ for VL). No external reset signal is required-the MAX335CWG asserts deterministic OFF-state behavior autonomously. Additionally, pulling VL below 0.8V at any time re-triggers this reset, forcing all switches OFF and clearing the shift register-a feature used for safe-mode recovery. This ensures predictable startup in safety-critical applications like avionics and process control.

Can the MAX335CWG operate from a single supply, and what are the constraints?

Yes, the MAX335CWG can operate from a single supply by connecting V− to GND and setting VL = V+. In this configuration, the analog signal range becomes 0V to V+, with V+ ranging from +10V to +30V (since VL must be ≥4.5V and ≤V+). However, the VL pin loses its reset functionality when tied to V+, because the reset threshold (0.8V) can no longer be asserted below VL. Also, TTL-level logic compatibility is lost unless VL is held at +5V. The MAX335CWG's absolute maximum ratings still apply: V+ must not exceed +30V, and analog signals must remain within 0V to V+. This mode is commonly used in industrial PLCs where only positive rails are available.

What is the significance of the 100nV-sec clock feedthrough specification for the MAX335CWG?

At 100nV-sec, the MAX335CWG's clock feedthrough quantifies the energy coupling from SCLK edges into analog channels-measured as the integral of induced transient voltage over time. In practice, this means a sharp SCLK edge can induce ~1V_p-p in an unfiltered channel for ~100ns. However, the MAX335CWG's design mitigates this: built-in 150mV SCLK hysteresis rejects noise, and typical channel RC filtering (e.g., 100pF + 100Ω) reduces feedthrough to ~10mV_p-p. This specification confirms the MAX335CWG's suitability for sensitive applications like precision data acquisition, where digital switching noise must not corrupt µV-level analog measurements. The MAX335CWG's feedthrough value is measured and guaranteed-not estimated.