Analog Devices Inc./Maxim Integrated MAX3390EEUD+T
- Part No.:
- MAX3390EEUD+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
MAX3390EEUD+T.pdf
- Description:
- IC TRANSLATOR UNIDIR 14TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,916
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MAX3390EEUD+T from Maxim Integrated is a quad unidirectional logic-level translator enabling voltage-domain bridging between low-voltage (VL = +1.2V to +5.5V) and higher-voltage (VCC = +1.65V to +5.5V) digital interfaces. It supports guaranteed 8Mbps data rate across full voltage range, delivers ±15kV HBM ESD protection on VCC-side I/Os, operates with 130µA typical supply current, and features three-state output mode reducing current to <1µA - ideal for SPI/I²C translation in portable POS systems and smart card readers.
For engineers reviewing the MAX3390EEUD+T datasheet, MAX3390EEUD+T pinout, MAX3390EEUD+T application, or MAX3390EEUD+T equivalent, key selection criteria include its unidirectional VL→VCC translation direction, 14-pin TDFN-EP (3mm × 3mm) package, guaranteed 8Mbps operation at 1.2V–5.5V VL/VCC co-range, thermal short-circuit protection, and compatibility with open-drain driving configurations up to 500kbps.
Technical Context
The MAX3390EEUD+T implements a MOSFET-based unidirectional level-shifting architecture optimized for VL→VCC translation only, with independent input thresholds referenced to VL (VIHL = VL − 0.2V, VILL = 0.15V) and VCC (VIHC = VCC − 0.4V, VILC = 0.15V). It integrates rise-time accelerators and one-shot speed-up circuitry to achieve ≤25ns propagation delay (tPLH/tPHL) and ≤30ns rise/fall times under +2.5V ≤ VL ≤ VCC ≤ +3.3V conditions.
Three-state control is VL-referenced: pulling the THREE-STATE pin low forces all four I/O pairs into high-impedance mode, disabling internal 10kΩ pullups and limiting total supply current to <1µA. Thermal protection activates at +152°C junction temperature, forcing automatic entry into three-state mode until cooling to +142°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Range VL | +1.2V to +5.5V - enables interface with 1.2V/1.8V/2.5V/3.3V/5V logic domains |
| Supply Range VCC | +1.65V to +5.5V - supports translation to legacy 3.3V/5V systems without level-shifter cascading |
| Guaranteed Data Rate | 8Mbps over full VL/VCC operating range - ensures reliable SPI clocking at ≥2MHz SCLK with margin |
| ESD Protection (I/O VCC) | ±15kV HBM - eliminates need for external TVS diodes on externally routed VCC-side signal lines |
| Propagation Delay | ≤20ns (typ, +2.5V ≤ VL ≤ VCC ≤ +3.3V) - meets timing budgets for 10MHz+ I²C Fast-mode Plus and SPI |
| Three-State Supply Current | <1µA - reduces standby power in battery-operated devices during bus arbitration or sleep states |
| Operating Temperature | −40°C to +85°C - qualified for industrial and portable consumer equipment environments |
Pinout & Package
The MAX3390EEUD+T is housed in a 14-pin TDFN-EP (3mm × 3mm) package with exposed pad (EP) requiring connection to GND for thermal and EMI performance. Pin numbering follows standard top-view orientation with pin 1 marked by dot or chamfer.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | I/O VL1 | Unidirectional input/output referenced to VL - accepts low-voltage logic, outputs translated high-voltage logic to I/O VCC1 |
| 2 | I/O VL2 | Unidirectional input/output referenced to VL - dedicated channel for second data line (e.g., SPI MISO) |
| 3 | I/O VL3 | Unidirectional input/output referenced to VL - third independent translation path |
| 4 | I/O VL4 | Unidirectional input/output referenced to VL - fourth channel supporting quad-interface protocols like QSPI |
| 5 | VCC | High-side supply input - powers VCC-side logic and output drivers; must be ≥1.65V |
| 6 | VL | Low-side supply input - sets VL-side logic thresholds and powers VL-side input receivers |
| 7 | THREE-STATE | VL-referenced enable - logic-low disables all outputs into high-Z; logic-high enables normal translation |
| 8 | GND | Analog/digital ground reference - common return for both supply domains and EP connection point |
| 9 | I/O VCC1 | Unidirectional output/input referenced to VCC - receives translated signal from I/O VL1; not bidirectional |
| 10 | I/O VCC2 | Unidirectional output/input referenced to VCC - second high-voltage channel paired with I/O VL2 |
| 11 | I/O VCC3 | Unidirectional output/input referenced to VCC - third high-voltage channel paired with I/O VL3 |
| 12 | I/O VCC4 | Unidirectional output/input referenced to VCC - fourth high-voltage channel paired with I/O VL4 |
| 13,14 | N.C. | No internal connection - left floating per design; no PCB routing required |
| EP | Exposed Pad | Thermal and EMI ground - must be soldered to large GND copper area for junction temperature control |
Key Features
| Feature | Design Value |
|---|---|
| Rise-time accelerators | Enable 16Mbps operation within specific voltage domains (+1.8V ≤ VL ≤ VCC ≤ +2.5V), cutting tR/tF to ≤15ns |
| Open-drain compatible drive | Supports 500kbps open-drain configuration with controlled slew rates, easing I²C bus termination |
| Thermal short-circuit protection | Auto-enters three-state mode at +152°C junction temp, preventing latch-up and enabling self-recovery |
| 1μA three-state quiescent current | Reduces system-level standby power by >99% vs active mode, critical for battery longevity in portable devices |
| ±15kV HBM ESD on VCC I/Os | Meets IEC 61000-4-2 Level 3 immunity without external protection components on external-facing ports |
Applications
| SPI Level Translation | I²C Level Translation |
|---|---|
Use Scenario: Interfacing a 1.8V microcontroller SPI master with a 3.3V flash memory peripheral in a portable medical device. IC Role / Device Role: Unidirectional VL→VCC translator for SCLK, MOSI, and chip-select signals; isolates voltage domains while preserving timing integrity. Use Value: Eliminates discrete resistor-divider networks, reduces board space by 60%, and guarantees 8Mbps timing compliance across −40°C to +85°C. | Use Scenario: Connecting a 1.2V sensor ASIC to a 3.3V host processor via I²C bus in a wearable fitness tracker. IC Role / Device Role: Quad-channel level shifter handling SDA, SCL, and two auxiliary control lines with open-drain support. Use Value: Maintains I²C Fast-mode Plus (1MHz) timing with <20ns propagation delay and prevents bus contention during power sequencing mismatches. |
| Smart Card Reader Interface | Portable POS System |
Use Scenario: Translating ISO/IEC 7816-3 compliant 5V smart card signals to a 1.8V secure element in a contactless payment terminal. IC Role / Device Role: Unidirectional translator for RST, CLK, and I/O lines, with ±15kV ESD protection on VCC-side contacts exposed to user insertion. Use Value: Replaces three discrete translators and external TVS diodes, achieving UL/IEC 60950-1 surge immunity certification with single-component solution. | Use Scenario: Enabling communication between a 2.5V barcode scanner module and a 5V main controller in a handheld retail POS terminal. IC Role / Device Role: Quad-level shifter managing UART TX/RX, GPIO handshake, and power-good signaling across voltage domains. Use Value: Supports hot-plug detection with three-state mode, reduces BOM count by 4 components, and maintains <1µA sleep current during idle periods. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar unidirectional level translation applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TXB0104RGYR | Bidirectional auto-sensing architecture; no separate VL/VCC supplies; max 1.8V VL; 100Mbps rated but requires careful bus capacitance management | Best for I²C/SMBus where direction reversal occurs; unsuitable for fixed-direction high-noise SPI with asymmetric voltage margins | Select MAX3390EEUD+T when VL/VCC separation, ±15kV ESD, or guaranteed 8Mbps under 50pF load is mandatory |
| SN74AVC4T245PWR | Active dual-supply bidirectional translator; 3.6V max VCC; no integrated ESD beyond 2kV HBM; 3.3V-typical operation only | Lower cost for benign internal board traces; lacks robustness for external connector interfaces or industrial ESD stress | Choose MAX3390EEUD+T for designs requiring certified ±15kV protection, wide VL range down to 1.2V, or thermal fault recovery |
Compared with TXB0104RGYR and SN74AVC4T245PWR, the MAX3390EEUD+T provides deterministic unidirectional translation, industry-leading ESD hardening, and guaranteed timing performance across its full 1.2V–5.5V VL range - making it optimal for safety-critical or externally exposed interfaces where reliability outweighs bidirectionality.
Availability
MAX3390EEUD+T is available at Aetrix Electronics and suitable for SPI, I²C, and smart card reader applications requiring stable component supply, long-term industrial lifecycle support, and guaranteed traceable sourcing from Maxim Integrated's production line.
Supply support for MAX3390EEUD+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated, now part of Analog Devices, designs precision analog, mixed-signal, and power management ICs for industrial, automotive, communications, and consumer markets.
The MAX3372E–MAX3393E product line delivers ESD-hardened, low-power level translators targeting multivoltage system interoperability in portable, battery-powered, and externally connected equipment.
FAQ
What voltage ranges does the MAX3390EEUD+T support on VL and VCC supplies?
The MAX3390EEUD+T supports VL from +1.2V to +5.5V and VCC from +1.65V to +5.5V, with the constraint that VL must not exceed VCC + 0.3V. This allows interfacing ultra-low-voltage ASICs (e.g., 1.2V FPGA I/O banks) with legacy 3.3V or 5V peripherals while maintaining rail-to-rail logic swing fidelity. The MAX3390EEUD+T is tested and specified across this full range.
Is the MAX3390EEUD+T bidirectional or unidirectional?
The MAX3390EEUD+T is a unidirectional level translator, designed exclusively for VL → VCC translation. Signals applied to I/O VLx pins appear translated on corresponding I/O VCCx pins, but not vice versa. Bidirectional operation requires separate devices like the MAX3377E or alternative families such as TXB0104 - the MAX3390EEUD+T does not support automatic direction sensing or reverse-path translation.
How does the three-state mode function on the MAX3390EEUD+T?
The MAX3390EEUD+T enters three-state mode when the THREE-STATE pin is pulled low (logic 0 referenced to VL). This disables all four translation channels, placing I/O VLx and I/O VCCx pins in high-impedance state and reducing total supply current to <1µA. For normal operation, connect THREE-STATE to VL (logic high). The MAX3390EEUD+T's three-state behavior is VL-referenced and fully characterized across temperature and voltage.
What is the maximum data rate guaranteed for the MAX3390EEUD+T across all voltage combinations?
The MAX3390EEUD+T guarantees 8Mbps operation across its entire specified VL and VCC voltage ranges (+1.2V ≤ VL ≤ +5.5V, +1.65V ≤ VCC ≤ +5.5V). Higher rates - up to 16Mbps - are achievable within narrower domains: +1.8V ≤ VL ≤ VCC ≤ +2.5V and +2.5V ≤ VL ≤ VCC ≤ +3.3V. These 16Mbps values are not guaranteed across full temperature or process variation, unlike the 8Mbps spec.
Does the MAX3390EEUD+T include built-in ESD protection, and what standards does it meet?
Yes, the MAX3390EEUD+T integrates ±15kV Human Body Model (HBM) ESD protection on all I/O VCC pins, validated per JEDEC JS-001. It also meets ±8kV IEC 61000-4-2 contact discharge and ±10kV air-gap discharge requirements. This eliminates need for external TVS diodes on VCC-side signal lines routed to connectors or external interfaces, directly supporting IEC 61000-4-2 Level 3 system-level ESD compliance.
MAX3390EEUD+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Translator Type:
- Voltage Level
- Channel Type:
- Unidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- 4
- Voltage - VCCA:
- 1.2 V ~ 5.5 V
- Voltage - VCCB:
- 1.65 V ~ 5.5 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Open Drain, Tri-State
- Data Rate:
- 16Mbps
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- Power Supply Decoupling, Thermal-Shutdown Protection
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP (0.173", 4.40mm Width)
MAX3390EEUD+T FAQ
1.How can I place an order for MAX3390EEUD+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX3390EEUD+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX3390EEUD+T reliable?
The price and inventory of MAX3390EEUD+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX3390EEUD+T is usually 5 days.
3.What payment methods are accepted for MAX3390EEUD+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX3390EEUD+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX3390EEUD+T?
MAX3390EEUD+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX3390EEUD+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX3390EEUD+T?
For technical support, including MAX3390EEUD+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX3390EEUD+T requirements.
6.How does Aetrix verify that MAX3390EEUD+T is sourced from the original manufacturer or authorized distributors?
All MAX3390EEUD+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX3390EEUD+T meets industry standards.
7.What is the process for return or replacement of MAX3390EEUD+T?
All MAX3390EEUD+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX3390EEUD+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX3390EEUD+T part is unused and in its original packaging.
Return procedure for MAX3390EEUD+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX3390EEUD+T Tags

-
74LVC1T45GW,125
Nexperia USA Inc.
-
74LVCH2T45DC,125
Nexperia USA Inc.

-
SN74LVC1T45DBVR
Texas Instruments

-
SN74LVC1T45DRLR
Texas Instruments

-
SN74LVC1T45DPKR
Texas Instruments

-
SN74LVC2T45DCTR
Texas Instruments

-
74LVC2T45GT,115
Nexperia USA Inc.

-
SN74LVC1T45YZPR
Texas Instruments

-
LSF0102DCUR
Texas Instruments

-
SN74LVC1T45DCKR
Texas Instruments

-
TXS0102DCTR
Texas Instruments

-
FXLP34P5X
onsemi
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

