Analog Devices Inc./Maxim Integrated MAX4928AETN+T

Overview

MAX4928AETN+T from Maxim Integrated is a high-speed passive hex double-pole/double-throw (6×DPDT) analog switch designed for routing PCIe Gen I/II and DisplayPort differential signals in ATX-form-factor desktop PCs. It operates from a single +3.3V supply, supports data rates up to 10Gbps, delivers >12dB return loss at 2.5GHz, and integrates six bidirectional signal pairs in a 56-pin TQFN package.

For engineers reviewing the MAX4928AETN+T datasheet, MAX4928AETN+T pinout, MAX4928AETN+T application, or MAX4928AETN+T equivalent, key selection criteria include differential insertion loss at 5GHz, on-resistance matching across channels, latch-enabled signal path retention, and compatibility with PCIe Gen II and DisplayPort AC-coupled 8b/10b signaling.

Technical Context

The MAX4928AETN+T implements six independent DPDT switch cells using CMOS architecture, each supporting bidirectional differential signal routing between common terminals (IN_, X_, OUT_) and two alternate paths (e.g., D_/TX_, HPD_/RX1_, AUX_/RX0_). Its SEL input selects active path per channel while LE latches state, enabling stable switching without continuous control signaling.

Designed specifically for ATX desktop platforms, the device routes signals between a graphics memory controller hub (GMCH) and either a PCIe connector or DisplayPort interface. It handles AC-coupled 8b/10b encoded signals up to 5.0Gbps (PCIe Gen II) and 2.7Gbps (DisplayPort), with analog input range specified from –0.1V to (VDD – 1.8V) and differential off-isolation of –22dB at 3.0GHz.

Key Specifications

Pinout & Package

MAX4928AETN+T is housed in a 56-pin TQFN-EP package with an exposed paddle thermally and electrically connected to GND. Pin assignments are industry-standard and optimized for PCIe/DP trace routing, with differential pairs placed adjacent and ground pins interleaved to minimize crosstalk.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed differential switching applications.

Compared with MAX4928BETN+, the MAX4928AETN+T provides ATX-optimized pin mapping for direct integration into existing desktop reference designs; compared with TS3USB30E, it delivers six-channel PCIe/DP co-routing with latch control and superior RF performance essential for multi-protocol motherboard architectures.

Availability

MAX4928AETN+T is available at Aetrix Electronics and suitable for desktop PC motherboard design, PCIe graphics multiplexing, and DisplayPort source selection requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for MAX4928AETN+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a U.S.-based semiconductor company specializing in high-performance analog and mixed-signal ICs for computing, communications, and industrial applications.

The MAX4928AETN+T belongs to Maxim's high-speed interface switch product line, engineered specifically for PCIe and DisplayPort signal routing in space-constrained ATX desktop platforms where signal integrity and protocol transparency are critical.

FAQ

What is the maximum data rate supported by the MAX4928AETN+T?

The MAX4928AETN+T supports signal data rates up to 10Gbps with a differential –3dB bandwidth of 5GHz. It is fully characterized for PCIe Gen I (2.5Gbps), Gen II (5.0Gbps), and DisplayPort 1.1/1.2 (up to 2.7Gbps), meeting insertion loss and return loss specifications across this range. The MAX4928AETN+T maintains signal integrity without equalization or retiming, making it suitable for transparent high-speed routing applications.

Does the MAX4928AETN+T require external biasing or termination resistors?

No, the MAX4928AETN+T does not require external biasing or termination resistors for standard PCIe or DisplayPort operation. It is designed to interface directly with AC-coupled 100Ω differential traces. External 0.1µF ceramic bypass capacitors are required at each VDD pin, and the exposed paddle must be connected to GND-but no pull-up/down resistors or termination networks are needed on analog signal paths for compliant operation.

How does the LE (Latch Enable) pin function in the MAX4928AETN+T?

The LE pin on the MAX4928AETN+T freezes the current switch configuration when driven high, holding all six DPDT channels in their present state regardless of subsequent SEL transitions. This prevents unintended signal path changes during control bus activity or noise events. When LE is low, SEL transitions immediately update routing. The MAX4928AETN+T uses this feature to enable glitch-free, synchronized switching in complex motherboard firmware environments.

Is the MAX4928AETN+T compatible with PCIe Gen III or higher?

The MAX4928AETN+T is not specified or characterized for PCIe Gen III (8Gbps) or higher. Its differential –3dB bandwidth is 5GHz and insertion loss is –3.3dB at 5.0GHz, which falls short of Gen III channel requirements. While some marginal operation may occur in lab conditions, Maxim's datasheet explicitly validates the MAX4928AETN+T only for PCIe Gen I and Gen II. For Gen III, a higher-bandwidth switch such as the MAX4929E is required.

What is the thermal performance of the MAX4928AETN+T in its TQFN package?

The MAX4928AETN+T in its 56-pin TQFN-EP package has a junction-to-ambient thermal resistance (θJA) of 24.4°C/W and junction-to-case (θJC) of 1.5°C/W, measured per JEDEC JESD51-7 on a 4-layer board. With a maximum power dissipation of 3279mW at +70°C ambient, the device operates reliably within its –40°C to +85°C range when the exposed paddle is soldered to a solid ground plane and appropriate copper area is allocated per Maxim's layout guidelines.