Analog Devices Inc./Maxim Integrated MAX4947ETG+T
- Part No.:
- MAX4947ETG+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
MAX4947ETG+T.pdf
- Description:
- IC SWITCH DPDT X 3 5.5OHM 24TQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MAX4947ETG+T from Maxim Integrated is a triple double-pole/double-throw (DPDT) analog switch IC operating from a single +1.8V to +5.5V supply, featuring 4Ω typical on-resistance, 30pF typical off-capacitance, and rail-to-rail signal handling-designed for high-speed SDIO, Memory Stick, and USB signal routing in portable electronics.
For engineers reviewing the MAX4947ETG+T datasheet, MAX4947ETG+T pinout, MAX4947ETG+T application, or MAX4947ETG+T equivalent, key selection criteria include guaranteed 4Ω RON, 30pF channel capacitance, break-before-make timing (2ns), 300MHz -3dB bandwidth, and compatibility with 1.8V logic control in compact 24-pin TQFN (4mm × 4mm) packaging.
Technical Context
The MAX4947ETG+T implements three independent DPDT switch sections, each controlled by dedicated CB12, CB34, and CB56 logic inputs-enabling paired switching of differential or complementary signal paths. Its CMOS process ensures rail-to-rail analog signal swing (0V to VCC) and bidirectional operation across all NO/NC/COM terminals.
It delivers low charge injection (10pC typ), high off-isolation (-70dB at 1MHz), and minimal crosstalk (-90dB), supporting clean signal integrity in multiplexed data interfaces. The device guarantees 4Ω on-resistance matching (ΔRON ≤ 0.6Ω) and flatness (≤1.2Ω) over full analog range and temperature.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | +1.8V to +5.5V - supports direct interface with 1.8V, 2.7V, 3.3V, and 5V logic/system rails without level shifting. |
| On-Resistance (RON) | 4Ω (typ) at VCC = 2.7V - minimizes voltage drop and power loss in high-current analog/data paths (e.g., SDIO DAT lines). |
| Off-Capacitance (CNO/CNC) | 15pF (typ) - preserves signal edge rate and reduces loading on high-speed digital buses like USB 1.1 or UART. |
| -3dB Bandwidth | 300MHz - enables reliable switching of signals up to ~150MHz fundamental frequency (e.g., SD clock at 50MHz with harmonics). |
| Break-Before-Make Time | 2ns (guaranteed by design) - prevents momentary short-circuit between NC and NO paths during state transitions. |
| Off-Isolation | -70dB at 1MHz - suppresses coupling from active to inactive channels, critical for noise-sensitive mixed-signal routing. |
| Charge Injection | 10pC (typ) - limits transient glitches on high-impedance nodes (e.g., ADC inputs or sensor references). |
Pinout & Package
MAX4947ETG+T is housed in a 24-pin, 4mm × 4mm, exposed-pad TQFN package (TQFN-EP). The exposed paddle must be soldered to GND for thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1–5, 7–12, 15–20, 22–24 | Analog I/O (NO1–6, NC1–6, COM1–6) | Three DPDT sections: Pins 19/20/17/15/11/7 = COM1/NO1/NO2/NC2/COM3/NC3; pins 3/4/23/24/8/9 = COM5/NC5/COM6/NO6/NO4/NC4; pins 10/12/13/14/16/18 = NO3/NC3/CB34/CB12/COM2/NC1 - support full differential pair routing. |
| 5, 13, 14 | Digital Control (CB12, CB34, CB56) | Independent logic inputs per DPDT pair: CB12 controls switches 1 & 2; CB34 controls 3 & 4; CB56 controls 5 & 6 - enables selective path activation without global enable. |
| 6, 21 | GND | Primary ground reference for analog and digital domains; connects to exposed pad for optimal thermal dissipation and noise immunity. |
| 22 | VCC | Single positive supply input (1.8V–5.5V); powers internal logic and analog switch core - requires local 0.1µF bypass capacitor. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail analog signal handling | Supports 0V to VCC signal swing on all NO/NC/COM terminals - eliminates clipping in battery-powered systems with varying VCC. |
| Low 30pF typical channel capacitance | Minimizes capacitive loading on high-speed data lines (e.g., SDIO CMD/DAT), preserving rise/fall times and reducing EMI. |
| Guaranteed 4Ω on-resistance | Ensures <1% voltage drop at 10mA load - maintains signal fidelity in precision analog routing and low-voltage logic interfaces. |
| Triple DPDT architecture with independent CB inputs | Enables simultaneous but separate control of three differential pairs (e.g., USB D+/D−, UART TX/RX, SDIO CLK/DAT) without shared logic constraints. |
| Break-before-make switching (2ns) | Prevents cross-conduction faults during reconfiguration - essential for hot-plug detection and safe bus arbitration in portable devices. |
Applications
| SDIO/Memory Stick Multiplexing | USB 1.1 Signal Switching |
|---|---|
|
Use Scenario: Sharing a single SDIO host controller between two memory cards (e.g., microSD and Memory Stick) in a smartphone or PDA. IC Role / Device Role / Timing Role: Triple DPDT switch routes CLK, CMD, and DAT0–DAT3 lines between host and either card under CB12/CB34/CB56 control - no software delay required. Use Value: Eliminates need for dual SDIO controllers; 4Ω RON and 30pF COFF maintain signal integrity at 25MHz SD clock rates. |
Use Scenario: Dynamically selecting between two USB peripheral ports (e.g., debug port and OTG port) on a handheld device. IC Role / Device Role / Timing Role: Routes D+ and D− differential pairs using two DPDT sections; third section handles ID/VBUS sensing or auxiliary control. Use Value: 300MHz bandwidth supports full-speed USB (12Mbps) signaling; -90dB crosstalk prevents interference between active/inactive ports. |
| UART Interface Sharing | Cell Phone Baseband Debug Routing |
|
Use Scenario: Connecting a single UART interface to multiple peripherals (e.g., GPS module, Bluetooth chip, and modem) in time-division mode. IC Role / Device Role / Timing Role: One DPDT section switches TX/RX lines; second handles RTS/CTS handshaking; third manages power/reset signals. Use Value: 2ns break-before-make prevents bus contention; 10pC charge injection avoids false start-bit detection on RX line. |
Use Scenario: Reconfiguring baseband processor test/debug signals (JTAG, SWD, trace clocks) between production test and field diagnostics modes. IC Role / Device Role / Timing Role: Routes high-frequency trace clocks (up to 50MHz) and bidirectional data lanes using all three DPDT sections with precise timing control. Use Value: 4Ω RON flatness (<1.2Ω) ensures matched propagation delay across lanes; -70dB off-isolation blocks debug noise from RF sections. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX4948ETG+T | Hex SPDT (6 independent SPDTs) with single CB input and EN pin; same package, supply, and RON/COFF specs. | Requires global enable/disable and uniform switching of all six channels - less flexible than MAX4947ETG+T's per-pair control. | Select when routing six unrelated single-ended signals (e.g., six GPIOs) rather than three differential pairs. |
| TMUX1574RTER | Quad SPDT, 3.6V max VCC, 0.7Ω RON, 12pF COFF, 16-pin WQFN - lower RON but narrower voltage range and no DPDT topology. | Cannot replace DPDT functionality directly; requires two devices plus external logic to emulate one MAX4947ETG+T section. | Choose only for ultra-low-loss single-ended switching below 3.6V where DPDT is not required. |
Compared with MAX4948ETG+T and TMUX1574RTER, the MAX4947ETG+T uniquely provides triple DPDT topology with independent control - enabling true differential signal routing without added components or layout complexity.
Availability
MAX4947ETG+T is available at Aetrix Electronics and suitable for SDIO multiplexing, USB signal routing, UART sharing, cell phone baseband debugging, and portable memory interface applications requiring stable component supply and long-term industrial availability.
Supply support for MAX4947ETG+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, communications, and consumer applications - emphasizing high integration, low power, and robust performance.
The MAX4947ETG+T belongs to Maxim's high-speed analog switch product line, engineered specifically for data-path multiplexing in space-constrained portable electronics where signal integrity, low voltage operation, and small footprint are critical.
FAQ
What is the maximum operating voltage for MAX4947ETG+T?
The MAX4947ETG+T operates from a single supply ranging from +1.8V to +5.5V. Absolute maximum rating is +6.0V on VCC relative to GND. Exceeding this may cause permanent damage. For reliable long-term operation, keep VCC within the 1.8V–5.5V range specified in the Electrical Characteristics table - the MAX4947ETG+T is fully characterized at 2.7V, 3.3V, and 5.0V.
Does MAX4947ETG+T support bidirectional signal flow?
Yes, the MAX4947ETG+T supports fully bidirectional analog signal routing. All NO, NC, and COM terminals can serve as inputs or outputs - verified by rail-to-rail signal handling (0V to VCC) and symmetric on-resistance behavior. This allows flexible use in both source-driven (e.g., SDIO host output) and sink-driven (e.g., ADC input sampling) configurations without polarity restrictions.
How many independent switch sections does MAX4947ETG+T contain?
The MAX4947ETG+T contains three independent double-pole/double-throw (DPDT) switch sections. Each section comprises two matched SPDT switches sharing common control logic - implemented via dedicated CB12, CB34, and CB56 inputs. This architecture enables coordinated switching of differential or complementary signal pairs (e.g., USB D+/D−, UART TX/RX) without cross-talk or timing skew between sections.
What is the thermal pad connection requirement for MAX4947ETG+T?
The MAX4947ETG+T features an exposed thermal pad (EP) on the underside of its 24-pin TQFN package. This pad must be soldered to a solid GND plane on the PCB to ensure proper thermal dissipation and electrical stability. Failure to connect the EP compromises thermal performance (derating begins above +70°C) and may degrade noise immunity and switching consistency - the datasheet specifies "connect exposed pad to ground" as mandatory.
Can MAX4947ETG+T replace MAX4948ETG+T in a design?
No, the MAX4947ETG+T is not a drop-in replacement for MAX4948ETG+T due to fundamental architectural differences: MAX4947ETG+T is triple DPDT with three independent CB inputs, while MAX4948ETG+T is hex SPDT with one CB input and an EN pin. Pinouts differ significantly - e.g., CB12/CB34/CB56 on MAX4947ETG+T versus CB/EN on MAX4948ETG+T. Layout and firmware changes are required for substitution.
MAX4947ETG+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Circuit:
- DPDT
- Multiplexer/Demultiplexer Circuit:
- 2:2
- Number of Circuits:
- 3
- On-State Resistance (Max):
- 5.5Ohm
- Channel-to-Channel Matching (ΔRon):
- 300mOhm
- Voltage - Supply, Single (V+):
- 1.8V ~ 5.5V
- Voltage - Supply, Dual (V±):
- -
- Switch Time (Ton, Toff) (Max):
- 800ns, 800ns
- -3db Bandwidth:
- 300MHz
- Charge Injection:
- 10pC
- Channel Capacitance (CS(off), CD(off)):
- 15pF
- Current - Leakage (IS(off)) (Max):
- 3nA
- Crosstalk:
- -90dB @ 1MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TQFN (4x4)
MAX4947ETG+T FAQ
1.How can I place an order for MAX4947ETG+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX4947ETG+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX4947ETG+T reliable?
The price and inventory of MAX4947ETG+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX4947ETG+T is usually 5 days.
3.What payment methods are accepted for MAX4947ETG+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX4947ETG+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX4947ETG+T?
MAX4947ETG+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX4947ETG+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX4947ETG+T?
For technical support, including MAX4947ETG+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX4947ETG+T requirements.
6.How does Aetrix verify that MAX4947ETG+T is sourced from the original manufacturer or authorized distributors?
All MAX4947ETG+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX4947ETG+T meets industry standards.
7.What is the process for return or replacement of MAX4947ETG+T?
All MAX4947ETG+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX4947ETG+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX4947ETG+T part is unused and in its original packaging.
Return procedure for MAX4947ETG+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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