Analog Devices Inc./Maxim Integrated MAX6709JUB
- Part No.:
- MAX6709JUB
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
MAX6709JUB.pdf
- Description:
- IC SUPERVISOR QUAD VOLT MONITOR
- Quantity:
- Payment:

- Shipping:

Inventory:7,392
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
The MAX6709JUB from Maxim Integrated is a low-power, quad voltage monitor IC designed for multivoltage system supervision. It provides four independent, active-low open-drain power-good outputs with 10µA internal pullup to VCC, monitors adjustable/3.3V/2.5V/adjustable supplies at ±2.0% threshold accuracy, and operates from 2.0V to 5.5V supply across –40°C to +85°C. It is used in desktop computers and networking equipment for reliable power sequencing and fault detection.
For engineers reviewing the MAX6709JUB datasheet, MAX6709JUB pinout, MAX6709JUB application, or MAX6709JUB equivalent, key selection criteria include factory-trimmed 3.3V and 2.5V thresholds with 5% tolerance, adjustable inputs down to 0.62V, 35µA typical supply current, and 10-pin µMAX package compatibility with wire-ORed power-good signaling.
Technical Context
The MAX6709JUB implements four precision comparators with an internal 0.62V bandgap reference and factory-trimmed resistor-divider networks for fixed thresholds (3.3V, 2.5V) and two adjustable inputs. Each input has built-in 0.3% threshold hysteresis and supports monitoring down to 0.62V via external resistor dividers.
It features undervoltage lockout that forces all PWRGD_ outputs low when VCC drops below 2.0V, and all four open-drain outputs are internally pulled up to VCC with 10µA current sources-enabling direct interface with 3.3V/5V logic and wire-OR configurations without external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2.0V to 5.5V - supports direct connection to monitored rails including 3.3V and 2.5V supplies. |
| Supply Current (typ) | 35µA at VCC = 5V - enables ultra-low-power supervision in battery-backed or energy-sensitive systems. |
| Threshold Accuracy | ±2.0% over –40°C to +85°C - ensures reliable trip points without calibration or trimming. |
| Adjustable Threshold | 0.609V to 0.635V (IN1 & IN4) - allows precise monitoring of any voltage ≥0.62V using external resistor dividers. |
| Fixed Thresholds | 3.3V (–5%) and 2.5V (–5%) - factory-set for nominal 3.3V/2.5V supplies with 5% tolerance compliance. |
| Output Type | Four independent active-low open-drain outputs with 10µA internal pullup - eliminates need for external pullups in most 3.3V/5V logic interfaces. |
| Operating Temperature | –40°C to +85°C - fully specified for industrial and computing environments without derating. |
Pinout & Package
MAX6709JUB is housed in a 10-pin µMAX package (3mm × 3mm, 0.6mm height), RoHS-compliant, with exposed pad for thermal performance. Pin pitch is 0.5mm; package outline conforms to Maxim drawing 21-0061I (U10+2 variant).
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | IN1 | Adjustable threshold input - connects to external resistor divider for custom voltage monitoring ≥0.62V. |
| 2 | IN2 | 3.3V nominal input - factory-trimmed to assert PWRGD2 low when supply falls below 3.15V (–5%). |
| 3 | IN3 | 2.5V nominal input - factory-trimmed to assert PWRGD3 low when supply falls below 2.38V (–5%). |
| 4 | IN4 | Adjustable threshold input - identical function to IN1; supports second custom voltage monitor. |
| 5 | GND | Analog/digital ground reference - common return for all internal comparators and outputs. |
| 6 | PWRGD4 | Active-low open-drain output - asserts low when IN4 falls below its threshold; 10µA internal pullup to VCC. |
| 7 | PWRGD3 | Active-low open-drain output - asserts low when IN3 falls below 2.38V; supports wire-OR with other PWRGD_ signals. |
| 8 | PWRGD2 | Active-low open-drain output - asserts low when IN2 falls below 3.15V; compatible with 3.3V logic families. |
| 9 | PWRGD1 | Active-low open-drain output - asserts low when IN1 falls below its adjustable threshold. |
| 10 | VCC | Power supply input - powers internal circuitry; also subject to undervoltage lockout below 2.0V. |
Key Features
| Feature | Design Value |
|---|---|
| Quad independent monitoring | Four separate comparator channels enable concurrent supervision of mixed-voltage rails (e.g., 3.3V, 2.5V, and two custom supplies) without shared timing or reset propagation. |
| Factory-trimmed 3.3V/2.5V thresholds | Eliminates external resistors for standard I/O and core rails-reduces BOM count and layout area while guaranteeing ±2.0% accuracy over temperature. |
| Adjustable inputs (IN1 & IN4) | Supports monitoring of any voltage ≥0.62V using two-pin resistor dividers-ideal for FPGA auxiliary supplies, analog references, or custom DC-DC outputs. |
| 10µA internal pullup per output | Enables direct interfacing with 3.3V/5V microcontrollers and CPLDs without external pullups; internal sourcing prevents reverse current flow during mixed-supply operation. |
| Built-in 0.3% hysteresis | Prevents output chatter during slow-rising/falling supply transitions-no external hysteresis network required, simplifying design and improving noise immunity. |
Applications
| Desktop Computer Power Sequencing | Network Switch Supervisor |
|---|---|
Use Scenario: Monitoring 3.3V PCIe slot power, 2.5V memory I/O, and two auxiliary rails (e.g., 1.2V GPU core, 1.8V SerDes) during cold boot and brownout recovery. IC Role / Device Role / Timing Role: Quad voltage monitor providing independent, glitch-free PWRGD signals to motherboard CPLD for staged power-enable sequencing and fault latching. Use Value: Ensures CPU and peripheral power domains meet timing margins before release; eliminates need for four discrete supervisors or complex FPGA logic. |
Use Scenario: Supervising dual 3.3V management rails (PHY and switch fabric), 2.5V SerDes supply, and a programmable 1.2V auxiliary rail in a 1U rack-mounted switch. IC Role / Device Role / Timing Role: Centralized power-good arbiter feeding OR'd signal to system watchdog and hot-swap controller; supports fail-safe shutdown on any rail collapse. Use Value: Reduces supervisor footprint by 75% vs. discrete solutions; maintains deterministic response (<5µs propagation delay) during transient events on high-speed data planes. |
| Industrial PLC Backplane Monitor | Medical Imaging Subsystem |
Use Scenario: Verifying integrity of isolated 5V control, 3.3V logic, 2.5V ADC reference, and adjustable 1.5V sensor bias supply in a modular PLC backplane. IC Role / Device Role / Timing Role: Fault-detection node reporting to main controller via dedicated PWRGD lines; each output wired to separate interrupt pin for root-cause identification. Use Value: Enables per-rail diagnostics without software polling; ±2.0% threshold accuracy ensures compliance with IEC 61000-4-28 immunity requirements. |
Use Scenario: Monitoring 3.3V FPGA configuration, 2.5V image sensor interface, adjustable 1.8V analog front-end, and adjustable 3.0V high-voltage DAC supply in portable ultrasound hardware. IC Role / Device Role / Timing Role: Safety-critical power validator asserting fault flag to ARM Cortex-M7 safety monitor within <100ms of first rail failure. Use Value: Meets IEC 62304 Class C software safety requirements via hardware-enforced power validation; 35µA quiescent current extends battery runtime. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad voltage monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6710JUB | Same pinout and 3.3V/2.5V/adjustable/adjustable configuration, but with 10% tolerance on fixed thresholds instead of 5%. | Suitable where looser supply tolerance is acceptable (e.g., non-critical auxiliary rails), but not for tight-margin 3.3V I/O or 2.5V memory rails. | Select MAX6709JUB when 5% tolerance compliance is required for nominal 3.3V/2.5V supplies; choose MAX6710JUB only if design margin allows ±10% trip points. |
| TPS3307-33D | Triple voltage monitor (not quad); fixed 3.3V/3.0V/2.5V thresholds; no adjustable inputs; higher 60µA supply current. | Lacks fourth channel and adjustability-requires supplemental circuitry for dual adjustable monitoring or forces redesign to consolidate rails. | Use TPS3307-33D only in space-constrained triple-rail applications; MAX6709JUB remains superior for true quad supervision with flexibility. |
Compared with MAX6710JUB and TPS3307-33D, the MAX6709JUB uniquely delivers four-channel supervision with two factory-optimized 5%-tolerance thresholds plus two fully adjustable inputs-all in a single 10-pin µMAX package with 35µA quiescent current, enabling compact, high-accuracy multirail validation without compromise.
Availability
MAX6709JUB is available at Aetrix Electronics and suitable for desktop computers, network switches, industrial PLCs, and medical imaging subsystems requiring stable component supply and long-term production continuity.
Supply support for MAX6709JUB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for industrial, computing, and communications markets.
The MAX6709JUB belongs to Maxim's precision voltage supervisor product line, engineered for multivoltage system reliability-specifically targeting applications where simultaneous, accurate monitoring of heterogeneous power rails is critical to functional safety and startup integrity.
FAQ
What is the exact threshold voltage for the 3.3V input on MAX6709JUB?
The IN2 pin of the MAX6709JUB is factory-trimmed for a 3.3V nominal supply with 5% tolerance, resulting in a guaranteed trip threshold of 3.15V (3.3V × 0.95). Electrical characteristics confirm a typical value of 3.08V and maximum of 3.15V at TA = +25°C, fully specified from –40°C to +85°C. This ensures robust detection of 3.3V rail collapse before downstream logic fails.
Can both adjustable inputs (IN1 and IN4) on MAX6709JUB monitor the same voltage rail?
Yes, both IN1 and IN4 on the MAX6709JUB can independently monitor the same voltage rail-for example, using identical resistor dividers-providing redundant fault detection. Each drives its own PWRGD output (PWRGD1 and PWRGD4), allowing separate interrupt handling or OR-ing into a single system-level power-good signal without cross-talk or timing skew.
Does MAX6709JUB require external pullup resistors for its open-drain outputs?
No, the MAX6709JUB integrates 10µA internal pullup current sources to VCC on all four PWRGD outputs. These are sufficient to drive standard CMOS/TTL inputs operating at VCC levels (2.0V–5.5V). External pullups are only needed when interfacing with logic running at voltages outside the VCC range-e.g., pulling PWRGD_ to a 1.8V domain-where internal sourcing is disabled and external resistors prevent reverse current.
How does the MAX6709JUB handle supply transients during power-up?
The MAX6709JUB is explicitly designed to be immune to supply transients, with built-in hysteresis (0.3% of threshold) and fast propagation delay (5µs typical). Its internal bandgap reference and comparator architecture reject short-duration spikes (<100ns) on monitored inputs. The undervoltage lockout circuit holds all outputs low until VCC stabilizes above 2.0V, preventing false assertions during ramp-up.
Is the MAX6709JUB pin-compatible with other variants in the MAX6709 family?
Yes, all MAX6709 variants-including MAX6709JUB-share identical 10-pin µMAX packaging and pinout. Differences lie solely in factory-trimmed threshold configurations (e.g., MAX6709AUB uses 5%/3.3V/2.5V/Adj*, while MAX6709JUB uses Adj*/3.3V/2.5V/Adj* with 5% tolerance). PCBs designed for one variant can accommodate others without layout changes, enabling late-stage BOM optimization.
MAX6709JUB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 4
- Voltage - Threshold:
- 2.32V, 3.08V, Adj, Adj
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-uMAX
MAX6709JUB FAQ
1.How can I place an order for MAX6709JUB through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX6709JUB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX6709JUB reliable?
The price and inventory of MAX6709JUB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX6709JUB is usually 5 days.
3.What payment methods are accepted for MAX6709JUB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX6709JUB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX6709JUB?
MAX6709JUB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX6709JUB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX6709JUB?
For technical support, including MAX6709JUB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX6709JUB requirements.
6.How does Aetrix verify that MAX6709JUB is sourced from the original manufacturer or authorized distributors?
All MAX6709JUB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX6709JUB meets industry standards.
7.What is the process for return or replacement of MAX6709JUB?
All MAX6709JUB units undergo pre-shipment inspection (PSI). If there is an issue with MAX6709JUB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX6709JUB part is unused and in its original packaging.
Return procedure for MAX6709JUB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX6709JUB Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

