Analog Devices Inc./Maxim Integrated MAX6714AUB+
- Part No.:
- MAX6714AUB+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
MAX6714AUB+.pdf
- Description:
- IC SUPERVISOR 4 CHANNEL 10UMAX
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
The MAX6714AUB+ from Maxim Integrated is a quad voltage monitor IC with integrated reset timing, designed for multivoltage system supervision. It features one fixed VCC reset input (5.0V ±10%), three adjustable power-fail comparators (PFI1–PFI3), active-low open-drain RESET and PFO outputs, 140ms minimum reset timeout, and operates from 2.0V to 5.5V supply. It is used in servers and telecom equipment for reliable µP reset and power-fail detection.
For engineers reviewing the MAX6714AUB+ datasheet, MAX6714AUB+ pinout, MAX6714AUB+ application, or MAX6714AUB+ equivalent, this page delivers verified electrical parameters, exact pin functions, real-world use cases in multivoltage systems, and validated alternative options - all confirmed against Maxim's official datasheet Rev 1 (12/2005) and Selector Guide.
Technical Context
The MAX6714AUB+ implements a dedicated VCC reset path with internal bandgap reference (0.62V) and factory-trimmed threshold (4.25V min for 5V ±10% version), plus three independent high-impedance comparator inputs tied to the same 0.62V reference for adjustable monitoring. Each PFI input supports external resistor-divider configuration down to 0.62V threshold.
Its RESET output combines undervoltage lockout, manual reset (MR) integration, and fixed 140ms–280ms timeout delay; PFO outputs assert low on PFI under-voltage with no built-in delay. All outputs are open-drain with 10µA internal pullup to VCC and support wire-ORing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2.0V to 5.5V - powers device and defines operating envelope for all monitored inputs and outputs |
| VCC Reset Threshold | 4.25V (min), 4.38V (typ), 4.50V (max) - triggers RESET assertion when 5.0V supply drops below ±10% tolerance |
| Adjustable Threshold | 0.609V–0.635V (±2.0% accuracy) - internal reference for PFI1–PFI3; enables custom monitoring via external divider |
| Reset Timeout Period | 140ms (min), 210ms (typ), 280ms (max) - ensures stable µP reset hold time after VCC recovery or MR release |
| Supply Current | 60µA (typ), 105µA (max) at VCC = 5V - ultra-low quiescent current enables use in always-on supervisory circuits |
| Operating Temperature | −40°C to +85°C - fully specified for industrial and telecom environments without derating |
| Output Type | Active-low, open-drain with 10µA internal pullup - allows flexible logic-level interfacing and wire-ORed power-good signaling |
Pinout & Package
MAX6714AUB+ uses a 10-pin µMAX package (3.0mm × 3.0mm, 0.6mm height), lead-free, RoHS-compliant, with exposed pad for thermal enhancement.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - PFI3 | Power-Fail Input 3 | Noninverting comparator input referenced to 0.62V; accepts externally divided voltage for adjustable monitoring |
| 2 - PFI2 | Power-Fail Input 2 | Noninverting comparator input referenced to 0.62V; independent of other PFI pins for multi-rail fail detection |
| 3 - PFI1 | Power-Fail Input 1 | Noninverting comparator input referenced to 0.62V; supports custom threshold via resistor divider network |
| 4 - GND | Ground Reference | Analog and digital ground return; must be low-impedance connection for accurate threshold stability |
| 5 - MR | Manual Reset Input | Active-low TTL/CMOS-compatible input with 20kΩ internal pullup; initiates RESET assertion on logic low |
| 6 - RESET | Reset Output | Active-low open-drain output asserting during VCC undervoltage or MR activation; holds for full timeout period |
| 7 - PFO1 | Power-Fail Output 1 | Active-low open-drain output tied to PFI1; asserts when PFI1 falls below 0.62V reference |
| 8 - PFO2 | Power-Fail Output 2 | Active-low open-drain output tied to PFI2; independent timing and assertion logic from PFO1/PFO3 |
| 9 - PFO3 | Power-Fail Output 3 | Active-low open-drain output tied to PFI3; enables discrete power-fail signaling per monitored rail |
| 10 - VCC | Supply Input | Primary power input (2.0V–5.5V); powers internal circuitry and serves as reference for internal pullups and UVLO |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 140ms reset timeout | Eliminates need for external RC timing components while guaranteeing µP reset hold time compliance |
| Three adjustable PFI inputs | Each references precise 0.62V internal bandgap, enabling accurate monitoring of any voltage ≥0.62V via resistor divider |
| High-accuracy ±2.0% threshold | Ensures reliable trip points across temperature (−40°C to +85°C) and supply voltage (2.0V–5.5V) |
| 10µA internal output pullup | Permits direct interface with 3.3V/5V logic without external resistors; supports overdrive to 5.5V logic supplies |
| Immunity to supply transients | Withstands fast VCC or PFI overdrives up to 100mV for ≤120µs without false triggering (per Fig. toc07/toc08) |
Applications
| Server Power Sequencing | Telecom Line Card Supervision |
|---|---|
Use Scenario: Monitoring 5V main supply, 3.3V I/O, 1.8V FPGA core, and backup battery voltage in modular server blades. IC Role / Device Role / Timing Role: MAX6714AUB+ provides VCC reset for host processor and three independent PFO signals for rail-specific fault reporting to baseboard management controller (BMC). Use Value: Enables deterministic power-up sequencing and early fault isolation without adding discrete comparators or timers. |
Use Scenario: Supervising multiple DC/DC rails (5V, 3.3V, 1.2V) and detecting AC power loss on telecom line cards with -48V input. IC Role / Device Role / Timing Role: MAX6714AUB+ uses PFI inputs to monitor derived rails and MR input to accept shelf-level reset commands; RESET output controls hot-swap controller enable. Use Value: Reduces BOM count by replacing four separate supervisors and eliminates timing skew between rail monitors. |
| Industrial PLC Backplane | Network Switch ASIC Power Management |
Use Scenario: Ensuring clean startup of 24V-to-5V/3.3V/1.8V conversion stages in programmable logic controller backplanes. IC Role / Device Role / Timing Role: MAX6714AUB+ monitors VCC (5V) for CPU reset and uses PFI1–PFI3 to track auxiliary rails feeding I/O modules, communication PHYs, and memory buffers. Use Value: Prevents firmware execution before all critical rails stabilize, avoiding undefined state in safety-critical control loops. |
Use Scenario: Validating power integrity for multi-core switch ASICs requiring strict sequencing of core, I/O, and SerDes supplies. IC Role / Device Role / Timing Role: MAX6714AUB+ asserts RESET only after 5V VCC exceeds 4.25V and maintains it for ≥140ms; PFO outputs feed ASIC power-good status registers. Use Value: Guarantees ASIC reset release aligns with vendor-specified voltage ramp requirements and avoids brownout-induced packet corruption. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad voltage monitor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6714CUB+ | VCC threshold set for 3.3V ±10% (2.85V–3.00V), not 5.0V; identical PFI architecture and timing | Designed for 3.3V-supplied systems where primary reset source is lower-voltage rail | Select MAX6714CUB+ only if main supply is 3.3V and 5.0V monitoring is not required |
| TPS3307-18DGNR | Triple voltage monitor (not quad); includes 1.8V fixed reset + two adjustable inputs; no integrated reset timeout | Lacks dedicated VCC reset timing and fourth monitor channel; requires external RC for reset delay | Choose only when system needs only three rails monitored and can implement external timing |
Compared with MAX6714CUB+, the MAX6714AUB+ provides higher VCC reset threshold suited for 5V domains; compared with TPS3307-18DGNR, it delivers guaranteed reset timing and an extra PFI channel - critical for complex multirail systems requiring deterministic fault response.
Availability
MAX6714AUB+ is available at Aetrix Electronics and suitable for servers, telecommunications infrastructure, and industrial PLCs requiring stable component supply, long-term lifecycle support, and guaranteed lead-free compliance.
Supply support for MAX6714AUB+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for industrial, communications, computing, and automotive markets, with emphasis on power management and system supervision.
The MAX67xx family was engineered specifically for multivoltage system supervision - delivering integrated reset timing, adjustable monitoring, and ultra-low power consumption in compact packages for space-constrained embedded platforms.
FAQ
What is the exact VCC reset threshold voltage for MAX6714AUB+?
The MAX6714AUB+ has a factory-trimmed VCC reset threshold of 4.25V (minimum), 4.38V (typical), and 4.50V (maximum) - corresponding to the 5.0V nominal supply with −10% tolerance. This threshold is internally referenced to a precision 0.62V bandgap and remains stable across −40°C to +85°C. The MAX6714AUB+ datasheet specifies these values in the ELECTRICAL CHARACTERISTICS table for MAX6714 under "VCC Reset Threshold".
Does MAX6714AUB+ support adjustable monitoring of voltages below 0.62V?
No, the MAX6714AUB+ does not support monitoring voltages below 0.62V. Its internal reference is fixed at 0.62V (±2.0%), and all PFI inputs compare the external signal to this reference. To monitor a voltage less than 0.62V, an external level-shifting amplifier would be required - which is not supported by the MAX6714AUB+ architecture. The lowest directly monitorable voltage is 0.62V, achieved when PFI is connected directly to the rail.
Can the RESET output of MAX6714AUB+ drive a microcontroller's reset pin directly?
Yes, the RESET output of MAX6714AUB+ can drive a microcontroller's reset pin directly. It is an active-low open-drain output with a 10µA internal pullup to VCC, compatible with standard CMOS/TTL reset inputs. For MCUs requiring stronger pullup or different voltage levels (e.g., 3.3V MCU with 5V VCC), an external pullup resistor to the MCU's VDD is recommended - the MAX6714AUB+ internal circuitry prevents reverse current flow.
How does the manual reset (MR) function interact with the VCC reset timeout in MAX6714AUB+?
In the MAX6714AUB+, asserting MR low forces RESET low immediately, regardless of VCC level. When MR is released (goes high), RESET remains low for the full reset timeout period (140ms minimum), independent of VCC recovery. If VCC drops below threshold during this period, RESET stays asserted. The timeout is not reset by subsequent MR toggles - each MR pulse initiates a new fixed-duration assertion window.
Is the MAX6714AUB+ pin-compatible with other MAX67xx variants like MAX6714BUB+?
No, the MAX6714AUB+ is not pin-compatible with MAX6714BUB+ in terms of electrical behavior - though both share identical pinout and package. The "A" and "B" suffixes denote different VCC reset tolerances (±10% vs. ±5%), resulting in distinct threshold voltages (4.25V–4.50V vs. 4.50V–4.75V). Swapping them without redesigning the power supply margin risks premature or delayed reset assertion. Physical pin alignment is identical, but functional compatibility requires matching tolerance specifications.
MAX6714AUB+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 4
- Voltage - Threshold:
- 4.38V, Adj, Adj, Adj
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-uMAX/uSOP
MAX6714AUB+ FAQ
1.How can I place an order for MAX6714AUB+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX6714AUB+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX6714AUB+ reliable?
The price and inventory of MAX6714AUB+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX6714AUB+ is usually 5 days.
3.What payment methods are accepted for MAX6714AUB+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX6714AUB+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX6714AUB+?
MAX6714AUB+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX6714AUB+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX6714AUB+?
For technical support, including MAX6714AUB+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX6714AUB+ requirements.
6.How does Aetrix verify that MAX6714AUB+ is sourced from the original manufacturer or authorized distributors?
All MAX6714AUB+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX6714AUB+ meets industry standards.
7.What is the process for return or replacement of MAX6714AUB+?
All MAX6714AUB+ units undergo pre-shipment inspection (PSI). If there is an issue with MAX6714AUB+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX6714AUB+ part is unused and in its original packaging.
Return procedure for MAX6714AUB+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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