Analog Devices Inc./Maxim Integrated MAX6717UKVDD3+T

Overview

MAX6717UKVDD3+T from Maxim Integrated is a dual-voltage microprocessor supervisory circuit in 5-pin SOT23 package, monitoring VCC1 (1.8V–5.0V) and VCC2 (0.9V–3.3V) with factory-trimmed reset thresholds, 210ms minimum reset timeout, and open-drain active-low RST output. It guarantees valid reset assertion down to VCC1 or VCC2 = 0.8V and draws only 14µA typical supply current at 3.6V - used in multivoltage embedded systems requiring reliable power-on reset and brownout detection.

For engineers reviewing the MAX6717UKVDD3+T datasheet, MAX6717UKVDD3+T pinout, MAX6717UKVDD3+T application, or MAX6717UKVDD3+T equivalent, key selection criteria include dual-supply threshold accuracy (±1.5% over temperature), immunity to sub-20µs VCC transients, manual reset input with internal 50kΩ pullup, and guaranteed operation across –40°C to +85°C industrial temperature range.

Technical Context

The MAX6717UKVDD3+T implements two independent voltage comparators with precision bandgap references, each feeding a shared reset timeout timer. Its reset logic asserts RST low when either VCC1 falls below its factory-set threshold (e.g., 3.075V for 'T' suffix) or VCC2 drops below its corresponding threshold (e.g., 3.075V for second 'T'), and holds RST low for ≥210ms after both supplies recover.

This device lacks RSTIN, WDI, PFI/PFO, and RST2 - confirmed by Selector Guide and Pin Configuration tables - and uses only pins 1 (RST), 2 (GND), 3 (MR), 4 (VCC2), and 5 (VCC1). Its open-drain RST output requires an external pullup and is referenced to VCC1, enabling direct interface with bidirectional µP reset pins without contention.

Key Specifications

Pinout & Package

MAX6717UKVDD3+T is housed in a 5-pin SOT23-5 package (2.9mm × 1.6mm × 1.1mm), surface-mount, lead-free (+T suffix), with gull-wing leads and standard JEDEC MO-178AC footprint.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-voltage supervisory applications.

Compared with MAX6717UKVDD3+T, MAX6316US31D3+T omits VCC2 monitoring entirely, while TPS3808G33DBVR offers tighter threshold accuracy and lower IQ but sacrifices dual-supply capability and manual reset - making MAX6717UKVDD3+T uniquely suited for cost-optimized dual-rail industrial control where both rails must be validated pre-boot.

Availability

MAX6717UKVDD3+T is available at Aetrix Electronics and suitable for industrial PLCs, network routers, medical handhelds, and smart energy meters requiring stable component supply across extended temperature and long production lifecycles.

Supply support for MAX6717UKVDD3+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for industrial, automotive, and communications markets, with emphasis on reliability, integration, and low-power operation.

The MAX6715–MAX6729 family delivers compact, ultra-low-current supervisory circuits optimized for multivoltage embedded systems where simultaneous monitoring of primary and secondary rails is essential for robust boot sequencing.

FAQ

What are the exact reset threshold voltages for MAX6717UKVDD3+T?

The 'T' suffix in MAX6717UKVDD3+T specifies both VCC1 and VCC2 reset thresholds at 3.075V (typical), with ±1.5% maximum tolerance over –40°C to +85°C. These factory-trimmed values are unadjustable and guaranteed per Electrical Characteristics table; no external components affect threshold accuracy.

Does MAX6717UKVDD3+T support manual reset, and how is it implemented?

Yes, MAX6717UKVDD3+T includes an active-low manual reset input (MR) on pin 3, featuring an internal 50kΩ pullup to VCC1. Driving MR low for ≥1µs forces RST assertion for the full 210ms timeout period. No external pullup is needed, and MR accepts TTL/CMOS logic levels or open-drain signals.

What is the function and electrical behavior of the RST pin on MAX6717UKVDD3+T?

The RST pin (pin 1) of MAX6717UKVDD3+T is an active-low, open-drain output referenced to VCC1. It requires an external pullup resistor (typically 10kΩ–100kΩ to VCC1) and sinks ≤3.2mA when asserted. VOL is ≤0.4V at ISINK = 3.2mA, ensuring clean logic-low signaling to µP reset inputs.

Can MAX6717UKVDD3+T monitor a 1.8V core supply and a 3.3V I/O supply simultaneously?

Yes - MAX6717UKVDD3+T is explicitly designed for this configuration: connect the 3.3V rail to VCC1 (pin 5) and the 1.8V rail to VCC2 (pin 4). With 'T' thresholds, both are monitored at 3.075V, so the 1.8V rail will assert reset immediately upon power loss, while the 3.3V rail provides primary supervision.

What is the minimum supply voltage at which MAX6717UKVDD3+T guarantees correct reset output logic?

MAX6717UKVDD3+T guarantees valid RST output logic state when either VCC1 or VCC2 remains ≥0.8V. Below this, reset behavior is unspecified. This 0.8V guarantee enables reliable operation during deep brownout conditions common in battery-backed systems and unregulated DC inputs.