Analog Devices Inc./Maxim Integrated MAX6725KAZGD3+T
- Part No.:
- MAX6725KAZGD3+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- SOT-23-8
- Datasheet:
-
MAX6725KAZGD3+T.pdf
- Description:
- IC SUPERVISOR 3 CHANNEL SOT23-8
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MAX6725KAZGD3+T from Maxim Integrated is a triple-voltage microprocessor supervisory circuit in an 8-pin SOT23 package, monitoring VCC1 (1.8V–5.0V), VCC2 (0.9V–3.3V), and an externally adjustable third supply via RSTIN (threshold = 626.5mV). It asserts active-low open-drain RST and RST2 outputs with 210ms minimum reset timeout, and includes manual reset (MR), watchdog input (WDI), and power-fail input/output (PFI/PFO) - deployed in multivoltage telecom and industrial systems requiring reliable brownout detection and orderly shutdown.
For engineers reviewing the MAX6725KAZGD3+T datasheet, MAX6725KAZGD3+T pinout, MAX6725KAZGD3+T application, or MAX6725KAZGD3+T equivalent, key selection criteria include dual independent reset outputs (RST/RST2), guaranteed reset validity down to VCC1 or VCC2 = 0.8V, 14µA typical supply current at 3.6V, and support for 35s startup + 1.12s normal watchdog timeout - critical for embedded systems with complex boot sequences and battery-backed operation.
Technical Context
The MAX6725KAZGD3+T integrates three independent voltage monitors: factory-trimmed VCC1 and VCC2 thresholds (suffix "ZG" = VTH1 = 2.313V, VTH2 = 2.313V), plus an adjustable RSTIN comparator referenced to a 626.5mV internal bandgap. Its dual-mode watchdog timer provides a 35s minimum initial timeout after reset and a 1.12s minimum normal timeout after first WDI transition - enabling robust firmware supervision during both boot and runtime.
This device features two separate open-drain reset outputs (RST and RST2), each with independent sourcing/sinking capability: RST referenced to VCC1, RST2 referenced to VCC2. The PFI/PFO pair operates with 2µs propagation delay and 3mV hysteresis, supporting early power-fail warning and orderly system shutdown without reset timeout dependency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC1 Reset Threshold | 2.250V to 2.375V (ZG suffix = 2.313V typ); ensures reliable detection of 2.5V rail brownout before logic corruption. |
| VCC2 Reset Threshold | 2.250V to 2.375V (ZG suffix = 2.313V typ); matches core supply rails like 2.3V FPGA I/O or DSP analog domains. |
| RSTIN Threshold | 611mV to 642mV (626.5mV typ); enables precise monitoring of auxiliary supplies ≥0.62V using external resistor divider. |
| Reset Timeout Period | 140ms to 280ms (D3 suffix = 210ms min); guarantees sufficient hold time for DDR initialization and flash programming. |
| Supply Current | 14µA typ at 3.6V; supports >10-year battery life in always-on IoT sensor nodes with periodic wake-up. |
| Watchdog Timeout | 35s min startup / 1.12s min normal mode; accommodates full bootloader execution then tight runtime fault detection. |
| Operating Temp | -40°C to +85°C; qualified for industrial control cabinets and telecom line cards without derating. |
Pinout & Package
MAX6725KAZGD3+T is housed in an 8-pin SOT23-8 package (2.0mm × 2.1mm × 1.25mm), optimized for space-constrained PCB layouts in portable and modular equipment.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | RST | Active-low open-drain reset output referenced to VCC1; requires external pullup for µP interface. |
| 2 | GND | Analog/digital ground reference common to all comparators and timers; must be low-impedance. |
| 3 | MR | Active-low manual reset input with 50kΩ internal pullup to VCC1; debounced by design, no external RC needed. |
| 4 | PFO | Active-low open-drain power-fail output; deasserts immediately on recovery, no timeout delay. |
| 5 | RSTIN/PFI | Shared pin: selectable as adjustable reset monitor (RSTIN) or power-fail input (PFI); 25nA max leakage. |
| 6 | VCC2 | Secondary supply input (0.9V–3.3V); powers internal VCC2 monitor and references RST2 output. |
| 7 | WDI | Watchdog input with 100ns glitch rejection; rising/falling edge clears timer; tolerant of CMOS/TTL levels. |
| 8 | VCC1 | Primary supply input (1.8V–5.0V); powers core logic, references RST output, and enables reset assertion. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent open-drain reset outputs | RST (VCC1-referenced) and RST2 (VCC2-referenced) enable simultaneous supervision of I/O and core rails without level-shifting. |
| Adjustable third-supply monitoring | RSTIN input with 626.5mV internal reference allows precise threshold setting for auxiliary supplies (e.g., 1.2V PLL, 0.9V GPU core). |
| Two-mode watchdog timer | 35s startup timeout prevents false triggers during boot; 1.12s normal timeout ensures rapid response to hung firmware. |
| Power-fail interrupt with zero-latency deassertion | PFO activates within 2µs of PFI crossing threshold and releases immediately on recovery - ideal for graceful shutdown. |
| Guaranteed reset validity down to 0.8V | Ensures clean reset assertion even during deep brownout conditions where VCC1 or VCC2 drops below 1.0V. |
Applications
| Telecom Line Card Power Management | Industrial PLC CPU Module |
|---|---|
Use Scenario: Monitoring primary 3.3V backplane supply, secondary 2.5V FPGA bank, and auxiliary 1.2V SerDes core in carrier-grade line cards. IC Role / Device Role / Timing Role: Triple-voltage supervisor asserting coordinated RST and RST2 to halt CPU, FPGA, and transceiver simultaneously during undervoltage events. Use Value: Prevents metastability in multi-rail SoCs by ensuring all domains reset synchronously before reinitialization. |
Use Scenario: Supervising 24V-to-5V DC/DC output (VCC1), isolated 3.3V logic rail (VCC2), and 1.8V microcontroller core (via RSTIN) in programmable logic controllers. IC Role / Device Role / Timing Role: Providing fail-safe reset with MR-triggered diagnostics and PFO-driven emergency I/O disable prior to full shutdown. Use Value: Enables deterministic state capture and safe actuator de-energization during power anomaly - meeting SIL-2 functional safety requirements. |
| Battery-Powered Edge Gateway | Set-Top Box Mainboard |
Use Scenario: Managing Li-ion battery (VCC1), buck-converted 1.8V SoC core (VCC2), and LDO-regulated 0.9V AI accelerator (RSTIN) in always-on gateways. IC Role / Device Role / Timing Role: Enabling ultra-low-power operation (14µA) while delivering 210ms reset hold and 35s watchdog startup for secure boot verification. Use Value: Extends battery life beyond 5 years in remote deployments while guaranteeing secure firmware integrity checks. |
Use Scenario: Coordinating 12V main supply (VCC1), 3.3V demodulator rail (VCC2), and 1.1V video processor core (RSTIN) in consumer STBs with HDMI CEC and USB host. IC Role / Device Role / Timing Role: Delivering fast, glitch-immune reset (20µs VCC-to-RST delay) and PFO-triggered EEPROM save before power loss. Use Value: Eliminates channel map corruption and HDMI handshake failures caused by unclean power cycling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-voltage supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6726KAZGD3+T | Push-pull RST output (vs. open-drain RST on MAX6725KAZGD3+T); same RST2, WDI, PFI/PFO features. | Eliminates need for external RST pullup resistor; better suited for high-noise environments where open-drain bus contention is a concern. | Select MAX6726KAZGD3+T when driving reset directly into push-pull-compatible µP pins without external biasing. |
| TPS3808G33DBVR | Dual-supply monitor only (no RSTIN/PFI); fixed 3.3V VDD threshold; 200ms timeout; no watchdog or PFO. | Lacks third-supply monitoring, power-fail alert, and watchdog - suitable only for simpler dual-rail systems without auxiliary domain supervision. | Choose TPS3808G33DBVR only if application requires only VDD/VIO supervision and cost is prioritized over feature depth. |
Compared with MAX6725KAZGD3+T, MAX6726KAZGD3+T offers direct-drive reset capability but sacrifices open-drain flexibility, while TPS3808G33DBVR reduces BOM count in basic dual-rail designs but omits critical triple-monitoring and fault-handling features required for complex SoC platforms.
Availability
MAX6725KAZGD3+T is available at Aetrix Electronics and suitable for telecom infrastructure, industrial PLCs, battery-powered edge gateways, and consumer set-top boxes requiring stable component supply across extended product lifecycles.
Supply support for MAX6725KAZGD3+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a leader in precision analog, mixed-signal, and power management ICs, serving industrial, automotive, communications, and computing markets since 1983.
The MAX6715–MAX6729 family was designed specifically for multivoltage embedded systems needing compact, low-power, triple-supply supervision with integrated watchdog and power-fail alert - targeting space- and reliability-critical applications from base stations to portable medical devices.
FAQ
What is the exact reset threshold voltage for VCC1 and VCC2 on MAX6725KAZGD3+T?
The "ZG" suffix in MAX6725KAZGD3+T specifies VCC1 and VCC2 reset thresholds of 2.250V (min), 2.313V (typ), and 2.375V (max). These factory-trimmed values ensure precise detection of 2.5V rail collapse while maintaining 5% hysteresis margin against noise-induced false resets.
Does MAX6725KAZGD3+T support monitoring a negative supply voltage?
Yes - MAX6725KAZGD3+T can monitor negative supplies using the PFI input with an external resistor divider configured per Figure 3b in the datasheet. When the negative rail drops, PFO transitions high, enabling interrupt-driven shutdown or reset assertion through external logic.
How does the watchdog timer behave after power-up on MAX6725KAZGD3+T?
Upon power-up or any reset event, MAX6725KAZGD3+T enters a 35s minimum startup watchdog mode. Only after the first valid WDI edge does it switch to the 1.12s minimum normal timeout period - preventing premature resets during lengthy bootloader execution.
Can MAX6725KAZGD3+T generate a reset pulse without holding the output low for the full timeout period?
No - MAX6725KAZGD3+T asserts RST and RST2 low for the full 210ms minimum timeout period (D3 suffix) after all monitored supplies recover. This fixed-duration hold ensures downstream logic completes initialization before release, eliminating race conditions in synchronous systems.
What is the maximum transient immunity of MAX6725KAZGD3+T against VCC glitches?
MAX6725KAZGD3+T tolerates negative-going VCC transients up to 200ns wide when the overdrive is 100mV below threshold, per the "Maximum VCC Transient Duration vs. Reset Threshold Overdrives" graph. A 0.1µF local bypass capacitor further enhances immunity in noisy power environments.
MAX6725KAZGD3+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- SOT-23-8
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 3
- Voltage - Threshold:
- 1.11V, 2.313V, Adj
- Output:
- Open Drain, Open Drain
- Reset:
- Active High/Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-8
MAX6725KAZGD3+T FAQ
1.How can I place an order for MAX6725KAZGD3+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX6725KAZGD3+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX6725KAZGD3+T reliable?
The price and inventory of MAX6725KAZGD3+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX6725KAZGD3+T is usually 5 days.
3.What payment methods are accepted for MAX6725KAZGD3+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX6725KAZGD3+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX6725KAZGD3+T?
MAX6725KAZGD3+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX6725KAZGD3+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX6725KAZGD3+T?
For technical support, including MAX6725KAZGD3+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX6725KAZGD3+T requirements.
6.How does Aetrix verify that MAX6725KAZGD3+T is sourced from the original manufacturer or authorized distributors?
All MAX6725KAZGD3+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX6725KAZGD3+T meets industry standards.
7.What is the process for return or replacement of MAX6725KAZGD3+T?
All MAX6725KAZGD3+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX6725KAZGD3+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX6725KAZGD3+T part is unused and in its original packaging.
Return procedure for MAX6725KAZGD3+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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