Analog Devices Inc./Maxim Integrated MAX6727KAZGD3+
- Part No.:
- MAX6727KAZGD3+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- SOT-23-8
- Datasheet:
-
MAX6727KAZGD3+.pdf
- Description:
- IC SUPERVISOR 3 CHANNEL SOT23-8
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MAX6727KAZGD3+ from Maxim Integrated is a triple-voltage microprocessor supervisory circuit in an 8-pin SOT23 package, monitoring VCC1 (1.62V threshold), VCC2 (2.313V threshold), and an externally adjustable RSTIN input (626.5mV reference) with 210ms minimum reset timeout. It features two open-drain active-low reset outputs (RST/RST2), manual reset input, watchdog timer (35s startup / 1.12s normal), and operates from -40°C to +85°C for multivoltage embedded power sequencing.
For engineers reviewing the MAX6727KAZGD3+ datasheet, MAX6727KAZGD3+ pinout, MAX6727KAZGD3+ application, or MAX6727KAZGD3+ equivalent, key selection criteria include dual independent reset outputs, factory-trimmed dual-threshold supervision down to 0.8V supply validity, RSTIN-adjustable third-voltage monitoring, and guaranteed watchdog behavior across industrial temperature range.
Technical Context
The MAX6727KAZGD3+ integrates three independent voltage comparators - one for VCC1 (primary supply), one for VCC2 (secondary supply), and one for RSTIN (auxiliary supply) - each with hysteresis and referenced to a precision 626.5mV internal bandgap. Its dual RST outputs are driven by identical logic but independently buffered, enabling separate reset signaling to core and I/O domains.
It implements a dual-mode watchdog: a 35s minimum initial timeout after any reset event (power-up, MR, or watchdog expiry), followed by a 1.12s minimum normal timeout triggered by the first WDI edge; reset assertion persists for 210ms minimum regardless of trigger source. All reset outputs remain valid while either VCC1 or VCC2 ≥ 0.8V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC1 Reset Threshold | 1.620V (typ), factory-trimmed Z-suffix; ensures reliable reset assertion when primary supply drops below 1.62V ±2.5% |
| VCC2 Reset Threshold | 2.313V (typ), factory-trimmed Z-suffix; enables precise secondary supply monitoring at 2.31V ±2.5% |
| RSTIN Threshold | 626.5mV (typ), internal reference; supports external resistor-divider for third-supply monitoring down to 0.62V |
| Reset Timeout Period | 210ms (min), D3-suffix; guarantees minimum system hold time after all supplies recover |
| Supply Current | 14µA (typ) at 3.6V; ultra-low quiescent current enables use in battery-backed or always-on systems |
| Operating Temperature | -40°C to +85°C; qualified for industrial-grade embedded applications without derating |
| Watchdog Timeout | 35s (min) startup, 1.12s (min) normal mode; prevents false resets during boot while ensuring rapid fault detection in runtime |
Pinout & Package
MAX6727KAZGD3+ uses an 8-pin SOT23-8 package (3.0mm × 1.7mm × 1.3mm), thermally enhanced with exposed pad, rated for -40°C to +85°C operation.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | RST | Active-low open-drain reset output referenced to VCC1; asserts when any monitored supply fails or MR/WDI triggers |
| 2 | GND | Analog/digital ground reference; must be low-impedance connection to system ground plane |
| 3 | MR | Active-low manual reset input with 50kΩ internal pullup to VCC1; debounced internally, no external RC required |
| 4 | PFO | Active-low open-drain power-fail output referenced to VCC1; asserts when PFI < 626.5mV, no timeout delay |
| 5 | VCC2 | Secondary supply input (0.9V–3.3V); powers internal comparator for VCC2 monitoring and RST2 output driver |
| 6 | VCC1 | Primary supply input (1.8V–5.0V); powers main circuitry, RST output driver, and internal reference |
| 7 | PFI | Power-fail monitor input; high-impedance node for resistor-divider network to set custom power-fail trip point |
| 8 | RST2 | Second active-low open-drain reset output referenced to VCC2; identical timing to RST but electrically isolated domain |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent open-drain RST outputs | Enables simultaneous reset signaling to separate voltage domains (e.g., core CPU and I/O peripherals) without contention |
| Factory-trimmed dual-threshold supervision | Z-suffix provides 1.62V/2.313V thresholds with ±2.5% accuracy over temperature, eliminating external resistor calibration |
| RSTIN-adjustable third-voltage monitoring | 626.5mV internal reference supports monitoring of auxiliary rails (e.g., 1.2V, 1.8V, 3.3V) via simple resistor divider with <25nA input bias |
| Dual-mode watchdog timer | 35s startup window accommodates complex boot sequences; 1.12s runtime timeout ensures rapid processor lockup detection |
| Valid reset down to 0.8V supply | Guaranteed RST assertion integrity even as VCC1 or VCC2 decays to 0.8V, critical for brownout-safe shutdown |
Applications
| Industrial PLC Power Sequencing | Telecom Line Card Voltage Monitoring |
|---|---|
Use Scenario: Programmable logic controller with separate 3.3V I/O, 2.5V FPGA core, and 1.2V memory rails requiring coordinated power-up/down sequencing and fault isolation. IC Role / Device Role / Timing Role: MAX6727KAZGD3+ monitors all three rails simultaneously, asserts RST on VCC1 (3.3V) and RST2 on VCC2 (2.5V) to isolate faults per domain, and uses RSTIN to supervise 1.2V memory rail. Use Value: Prevents partial initialization by holding both domains in reset until all supplies stabilize; dual RST outputs eliminate need for external OR-gating or level-shifting. |
Use Scenario: High-density telecom line card with multiple ASICs powered by different DC/DC converters, requiring early warning of input voltage sag before brownout. IC Role / Device Role / Timing Role: MAX6727KAZGD3+ uses PFI to monitor preregulated -48V bus via resistor divider, asserts PFO to trigger graceful shutdown, while VCC1/VCC2 supervise local 3.3V/1.8V supplies. Use Value: 2µs PFI-to-PFO propagation enables sub-microsecond power-fail response; open-drain PFO interfaces directly to ASIC interrupt pins without level translation. |
| Medical Imaging Sensor Module | Automotive Infotainment SoC Boot |
Use Scenario: Portable ultrasound sensor module with battery-backed 3.3V analog front-end and 1.8V digital processing, requiring ultra-low current supervision and fail-safe shutdown. IC Role / Device Role / Timing Role: MAX6727KAZGD3+ supervises battery voltage (via RSTIN), 3.3V analog rail (VCC1), and 1.8V digital rail (VCC2); 14µA supply current extends battery life during standby. Use Value: RSTIN monitoring enables direct battery voltage tracking without external op-amp; dual RST outputs allow independent reset control of analog and digital subsystems. |
Use Scenario: Automotive infotainment head unit with multi-core SoC requiring synchronized reset of CPU, GPU, and memory controllers during cold crank or load dump events. IC Role / Device Role / Timing Role: MAX6727KAZGD3+ monitors 5.0V main supply (VCC1), 3.3V I/O rail (VCC2), and 1.2V core rail (RSTIN); watchdog monitors SoC activity to detect firmware hangs. Use Value: 210ms reset timeout exceeds automotive cold-crank recovery time; watchdog's 35s startup mode avoids false triggers during extended boot sequences. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-voltage supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6725KAZGD3+ | Same pinout, same thresholds/timing, but includes RST (active-high) + RST (active-low) outputs instead of dual RST (active-low) | Required where µP accepts active-high reset signal alongside active-low; not suitable for dual-domain active-low reset needs | Select MAX6725KAZGD3+ only if active-high reset capability is explicitly needed; MAX6727KAZGD3+ is preferred for dual active-low domain isolation |
| TPS3808G33DBVR | Single-supply supervisor (3.3V fixed), no RSTIN/PFI/WDI, 200ms timeout, SOT23-6 package | Limited to single-rail monitoring; lacks triple-voltage capability, watchdog, or auxiliary inputs | Use only for basic 3.3V-only systems; cannot replace MAX6727KAZGD3+ in multivoltage or safety-critical designs requiring redundancy |
Compared with MAX6725KAZGD3+, MAX6727KAZGD3+ provides superior domain isolation via dual active-low RST outputs, while TPS3808G33DBVR lacks essential triple-monitoring, watchdog, and auxiliary input functionality required for complex embedded systems.
Availability
MAX6727KAZGD3+ is available at Aetrix Electronics and suitable for industrial PLCs, telecom line cards, medical imaging modules, and automotive infotainment systems requiring stable component supply, long-term lifecycle support, and guaranteed industrial temperature performance.
Supply support for MAX6727KAZGD3+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, communications, and computing applications.
The MAX6715–MAX6729 family delivers ultra-low-voltage, multirail supervisory circuits optimized for space-constrained embedded systems requiring reliable power sequencing, brownout protection, and watchdog safety monitoring.
FAQ
What is the function of the RST2 pin on the MAX6727KAZGD3+?
The RST2 pin on the MAX6727KAZGD3+ is an active-low open-drain reset output referenced to VCC2. It asserts simultaneously with RST when any monitored supply (VCC1, VCC2, or RSTIN) falls below its threshold, MR is pulled low, or the watchdog times out. Its VCC2 reference allows safe reset signaling to peripherals powered by the secondary supply, enabling domain-isolated reset control without level shifters.
How does the MAX6727KAZGD3+ handle power-fail detection without a dedicated PFI pin?
The MAX6727KAZGD3+ does include a dedicated PFI pin (Pin 7), which serves as the noninverting input to an internal comparator with a 626.5mV threshold. When PFI voltage drops below this reference-typically set via an external resistor divider monitoring a preregulated supply-the PFO output (Pin 4) asserts low within 2µs. This provides fast, deterministic power-fail signaling independent of the main reset timeout period.
Can the MAX6727KAZGD3+ monitor a 1.2V supply using the RSTIN input?
Yes, the MAX6727KAZGD3+ can monitor a 1.2V supply using the RSTIN input. With its internal 626.5mV reference, a resistor divider (e.g., R1 = 100kΩ, R2 = 110kΩ) sets the trip point at 1.2V. The RSTIN input draws only ±25nA, enabling high-value resistors that minimize power loss. The resulting reset assertion is synchronized with VCC1/VCC2 monitoring and subject to the same 210ms timeout.
What is the significance of the 'D3' suffix in MAX6727KAZGD3+?
The 'D3' suffix in MAX6727KAZGD3+ specifies a minimum reset timeout period of 210ms. This value is factory-programmed and guarantees the RST and RST2 outputs remain asserted for at least 210ms after all monitored supplies (VCC1, VCC2, RSTIN) rise above their thresholds, MR returns high, or the watchdog clears. It ensures sufficient hold time for complex processors to complete initialization before release.
Does the MAX6727KAZGD3+ require external components for manual reset functionality?
No, the MAX6727KAZGD3+ includes an internal 50kΩ pullup resistor on the MR pin (Pin 3) to VCC1, so no external components are required for basic manual reset operation. A normally open momentary switch from MR to GND suffices. In noisy environments or with long PCB traces, a 0.1µF capacitor from MR to GND is recommended for additional noise immunity-but this remains optional, not mandatory.
MAX6727KAZGD3+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- SOT-23-8
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 3
- Voltage - Threshold:
- 1.11V, 2.313V, Adj
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-8
MAX6727KAZGD3+ FAQ
1.How can I place an order for MAX6727KAZGD3+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX6727KAZGD3+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX6727KAZGD3+ reliable?
The price and inventory of MAX6727KAZGD3+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX6727KAZGD3+ is usually 5 days.
3.What payment methods are accepted for MAX6727KAZGD3+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX6727KAZGD3+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX6727KAZGD3+?
MAX6727KAZGD3+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX6727KAZGD3+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX6727KAZGD3+?
For technical support, including MAX6727KAZGD3+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX6727KAZGD3+ requirements.
6.How does Aetrix verify that MAX6727KAZGD3+ is sourced from the original manufacturer or authorized distributors?
All MAX6727KAZGD3+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX6727KAZGD3+ meets industry standards.
7.What is the process for return or replacement of MAX6727KAZGD3+?
All MAX6727KAZGD3+ units undergo pre-shipment inspection (PSI). If there is an issue with MAX6727KAZGD3+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX6727KAZGD3+ part is unused and in its original packaging.
Return procedure for MAX6727KAZGD3+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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