Analog Devices Inc./Maxim Integrated MAX6728KALTD3
- Part No.:
- MAX6728KALTD3
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- SOT-23-8
- Datasheet:
-
MAX6728KALTD3.pdf
- Description:
- IC SUPERVISOR MPU
- Quantity:
- Payment:

- Shipping:

Inventory:1,317
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MAX6728KALTD3 from Maxim Integrated is a dual-voltage microprocessor supervisory IC monitoring VCC1 (primary supply) and VCC2 (secondary supply), with power-fail input (PFI)/output (PFO), manual-reset (MR), and watchdog timer (WDI) functions. It asserts an active-low open-drain RST output when either supply drops below factory-trimmed thresholds (VTH1 = 4.625 V, VTH2 = 3.075 V), maintains reset for 210 ms (min), and operates from -40°C to +125°C in an 8-pin SOT23 package. Used in telecom power systems to ensure clean boot and brownout recovery.
For engineers reviewing the MAX6728KALTD3 datasheet, MAX6728KALTD3 pinout, MAX6728KALTD3 application, or MAX6728KALTD3 equivalent, key selection criteria include dual-supply threshold accuracy (±1.5% over temperature), guaranteed reset validity down to VCC1/VCC2 = 0.8 V, PFI/PFO power-fail signaling with 2 µs delay, 1.12 s (min) normal watchdog timeout, and 14 µA typical supply current at 3.6 V.
Technical Context
The MAX6728KALTD3 integrates two independent voltage comparators for VCC1 and VCC2, each with factory-trimmed thresholds (4.625 V and 3.075 V respectively), 20 ppm/°C tempco, and 0.5% hysteresis. Its internal reset timeout timer is fixed at 210 ms (min), and it features a dual-mode watchdog with 35 s (min) startup period and 1.12 s (min) normal timeout.
It includes a dedicated PFI comparator referenced to 626.5 mV, driving an open-drain PFO output with 2 µs propagation delay, and supports manual reset via MR (internal 50 kΩ pullup to VCC1). All logic inputs (MR, WDI, PFI, RSTIN) accept CMOS-compatible levels, and outputs are guaranteed functional down to VCC = 0.8 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC1 Reset Threshold | 4.625 V (factory-trimmed, ±1.5% over -40°C to +125°C) |
| VCC2 Reset Threshold | 3.075 V (factory-trimmed, ±1.5% over -40°C to +125°C) |
| Reset Timeout Period | 210 ms (minimum duration RST remains asserted after fault clearance) |
| Watchdog Timeout (Normal) | 1.12 s (minimum interval between valid WDI transitions before reset assertion) |
| PFI Threshold Voltage | 626.5 mV (internal reference for power-fail detection) |
| Supply Current (ICC) | 14 µA (typical at 3.6 V, enabling ultra-low-power system monitoring) |
| Operating Temperature | -40°C to +125°C (AEC-Q100–qualified grade for automotive/industrial use) |
Pinout & Package
MAX6728KALTD3 is housed in an 8-pin SOT23 package (JEDEC MO-178AA), with 0.65 mm pitch, 2.9 mm × 1.6 mm footprint, and 1.1 mm max height. Pin 1 is marked with a dot; device orientation follows standard SOT23 pin 1 indicator.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | RST / RST1 | Active-low open-drain reset output; asserted when VCC1/VCC2 drop below threshold, MR pulled low, or watchdog times out; requires external pullup |
| 2 | GND | Analog/digital ground reference for all internal comparators and logic |
| 3 | MR | Active-low manual-reset input; internal 50 kΩ pullup to VCC1; reset persists for full timeout after MR release |
| 4 | VCC2 | Secondary supply input (0.8 V to 5.5 V); powers internal VCC2 comparator and sets RST2 reference if used |
| 5 | VCC1 | Primary supply input (0.8 V to 5.5 V); powers core logic, VCC1 comparator, and references RST/PFO outputs |
| 6 | PFI | Power-fail input; high-impedance node comparing against 626.5 mV reference; triggers PFO when voltage falls below threshold |
| 7 | PFO | Active-low open-drain power-fail output; deasserts immediately on PFI recovery (no timeout); requires external pullup |
| 8 | WDI | Watchdog input; rising/falling edge clears timer; unconnected disables watchdog (200 nA internal detector) |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent supply monitoring | Simultaneous VCC1 (4.625 V) and VCC2 (3.075 V) supervision with separate comparators and hysteresis |
| Power-fail detection with fast response | PFI-to-PFO propagation delay ≤ 2 µs enables early warning of supply collapse before brownout |
| Guaranteed reset validity at low VCC | Reset logic remains functional and correctly asserted even when VCC1 or VCC2 drops to 0.8 V |
| Low-quiescent-current operation | 14 µA typical ICC at 3.6 V reduces standby power in battery-backed or energy-sensitive systems |
| Dual-mode watchdog timer | 35 s (min) startup window allows full system boot; 1.12 s (min) normal mode ensures rapid fault detection during runtime |
Applications
| Telecom Power Management | Industrial PLC I/O Modules |
|---|---|
Use Scenario: Monitoring primary 4.8 V DC-DC output and secondary 3.3 V FPGA core rail in a 48 V-powered base station card. IC Role / Device Role / Timing Role: Dual-supply supervisor asserting RST to halt processor execution during undervoltage, while PFO signals power-fail interrupt to firmware for graceful shutdown. Use Value: Prevents corrupted configuration writes during brownout by guaranteeing 210 ms minimum reset hold time and validating reset state down to 0.8 V on either rail. | Use Scenario: Supervising 24 V field bus supply (VCC1) and isolated 5 V logic supply (VCC2) in a modular I/O terminal block. IC Role / Device Role / Timing Role: Provides fail-safe reset coordination across multiple isolated domains using MR for field-service-initiated reboot and PFI to monitor upstream 24 V feed. Use Value: Enables deterministic recovery from transient line faults without requiring MCU intervention, reducing MTTR in harsh industrial environments. |
| Automotive ADAS Camera ECU | Network Equipment Line Cards |
Use Scenario: Ensuring reliable boot of image signal processor (ISP) powered by 1.2 V core and 3.3 V I/O supplies in a rear-view camera module. IC Role / Device Role / Timing Role: Monitors both rails with factory-trimmed thresholds matching ASIC requirements; uses WDI to detect ISP firmware hangs during video streaming. Use Value: AEC-Q100 qualified operation over -40°C to +125°C and 14 µA quiescent current extend battery life in always-on vision systems. | Use Scenario: Managing power sequencing and fault response for redundant 12 V and 3.3 V supplies feeding switch fabric and PHY ICs on a 10G Ethernet line card. IC Role / Device Role / Timing Role: Generates synchronized reset pulses via RST and provides independent PFO alert for predictive maintenance of AC/DC front-end supplies. Use Value: Eliminates need for discrete comparators and RC timers, reducing BOM count and PCB area while improving timing accuracy vs. discrete solutions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-supply supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6729KALTD3 | Same pinout and thresholds, but includes push-pull RST output instead of open-drain | Eliminates need for external pullup resistor; better suited for direct connection to CMOS inputs without level-shifting | Select MAX6729KALTD3 when driving high-capacitance loads or when board space prohibits adding pullup resistors |
| TPS3808G33DBVR | Single-supply supervisor (3.3 V only); no PFI/PFO or WDI; 200 ms timeout; SOT23-6 package | Lacks triple-monitoring capability and power-fail signaling; suitable only for simpler single-rail systems | Choose TPS3808G33DBVR only if monitoring only one supply and cost reduction outweighs loss of PFI/WDI functionality |
Compared with MAX6728KALTD3, MAX6729KALTD3 offers identical supervision logic but simplifies interface design with push-pull RST, while TPS3808G33DBVR reduces feature set and package size at the expense of dual-supply and power-fail capability - making it viable only in constrained single-rail applications.
Availability
MAX6728KALTD3 is available at Aetrix Electronics and suitable for telecom infrastructure, industrial control, and automotive ADAS applications requiring stable component supply, extended temperature operation, and AEC-Q100–qualified reliability.
Supply support for MAX6728KALTD3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for demanding industrial, automotive, and communications applications.
The MAX6715A–MAX6729A family delivers ultra-low-voltage, multi-rail supervision with integrated watchdog and power-fail detection - engineered specifically for high-reliability embedded systems where supply integrity directly impacts functional safety.
FAQ
What is the exact reset timeout period of the MAX6728KALTD3?
The MAX6728KALTD3 has a guaranteed minimum reset timeout period of 210 ms. This is the minimum duration the RST output remains asserted after all monitored supplies (VCC1 and VCC2) rise above their respective thresholds, MR returns high, or the watchdog is cleared. The actual timeout may vary slightly due to process and temperature, but never falls below 210 ms across the full -40°C to +125°C operating range. This value is fixed by the "D3" suffix in the MAX6728KALTD3 part number.
Does the MAX6728KALTD3 support monitoring a third voltage rail?
No, the MAX6728KALTD3 does not support a third monitored voltage. Unlike variants such as MAX6723A–MAX6727A, it lacks the RSTIN input pin required for externally adjustable auxiliary voltage monitoring. Its supervision is strictly limited to VCC1 (4.625 V threshold) and VCC2 (3.075 V threshold), plus PFI-based power-fail detection. For triple-voltage monitoring, consider MAX6723KALTD3 or MAX6727KALTD3 instead of MAX6728KALTD3.
What is the function of the PFI and PFO pins on the MAX6728KALTD3?
The PFI (Power-Fail Input) pin on the MAX6728KALTD3 is a high-impedance comparator input referenced to an internal 626.5 mV threshold. When the voltage at PFI falls below this level - typically set via an external resistor divider from a monitored supply - the PFO (Power-Fail Output) pin is driven low. PFO is an open-drain output that deasserts immediately upon PFI recovery, with no timeout delay. This enables real-time power-fail alerts for firmware-driven shutdown sequences, distinct from the timed RST assertion.
Can the watchdog timer in the MAX6728KALTD3 be disabled?
Yes, the watchdog timer in the MAX6728KALTD3 is disabled by leaving the WDI pin unconnected. An internal 200 nA current source detects the floating state and disables watchdog functionality. If WDI must be routed on the PCB, it should be tied directly to GND or VCC1 through a ≥1 MΩ resistor to avoid unintended activation. Driving WDI with logic signals enables the dual-mode watchdog: 35 s (min) startup period followed by 1.12 s (min) normal timeout - both fully supported in MAX6728KALTD3.
What package type and pin count does the MAX6728KALTD3 use?
The MAX6728KALTD3 uses an 8-pin SOT23 package (JEDEC MO-178AA), measuring 2.9 mm × 1.6 mm with 0.65 mm lead pitch. It is RoHS-compliant and lead(Pb)-free. This 8-pin variant accommodates dual reset outputs (RST and RST2), PFI/PFO, WDI, MR, VCC1, VCC2, and GND - unlike the 5- or 6-pin versions of the MAX67xxA family. The "KA" in the part number explicitly denotes the 8-pin SOT23 package for MAX6728KALTD3.
MAX6728KALTD3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- SOT-23-8
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Power Supply Monitor
- Number of Voltages Monitored:
- 2
- Voltage - Threshold:
- 3.075V, 4.625V, Adj
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-8
MAX6728KALTD3 FAQ
1.How can I place an order for MAX6728KALTD3 through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX6728KALTD3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX6728KALTD3 reliable?
The price and inventory of MAX6728KALTD3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX6728KALTD3 is usually 5 days.
3.What payment methods are accepted for MAX6728KALTD3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX6728KALTD3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX6728KALTD3?
MAX6728KALTD3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX6728KALTD3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX6728KALTD3?
For technical support, including MAX6728KALTD3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX6728KALTD3 requirements.
6.How does Aetrix verify that MAX6728KALTD3 is sourced from the original manufacturer or authorized distributors?
All MAX6728KALTD3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX6728KALTD3 meets industry standards.
7.What is the process for return or replacement of MAX6728KALTD3?
All MAX6728KALTD3 units undergo pre-shipment inspection (PSI). If there is an issue with MAX6728KALTD3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX6728KALTD3 part is unused and in its original packaging.
Return procedure for MAX6728KALTD3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX6728KALTD3 Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

