Analog Devices Inc./Maxim Integrated MAX6728KAWGD3+T

Overview

MAX6728KAWGD3+T from Maxim Integrated is a triple-voltage microprocessor supervisory circuit in an 8-pin SOT23 package, monitoring VCC1 (4.625V threshold), VCC2 (3.075V threshold), and PFI (626.5mV internal reference) with 210ms reset timeout, push-pull RST and open-drain PFO outputs, and power-fail detection - used in telecom power systems to ensure orderly shutdown during brownout.

For engineers reviewing the MAX6728KAWGD3+T datasheet, MAX6728KAWGD3+T pinout, MAX6728KAWGD3+T application, or MAX6728KAWGD3+T equivalent, key selection criteria include dual-supply monitoring range (1.8–5.0V / 0.9–3.3V), guaranteed reset validity down to VCC = 0.8V, low 14µA supply current at 3.6V, and integrated power-fail comparator with 2µs propagation delay.

Technical Context

The MAX6728KAWGD3+T implements a triple-monitoring architecture: primary supply (VCC1) and secondary supply (VCC2) are factory-trimmed for precise reset thresholds (4.625V and 3.075V respectively), while the PFI input uses a 626.5mV internal reference to detect auxiliary supply collapse. Reset assertion is latched for a guaranteed minimum 210ms timeout after all monitored voltages recover.

It integrates a power-fail comparator with dedicated PFI/PFO pins, delivering active-low open-drain PFO output that deasserts without timeout - enabling real-time power-fail interrupt generation. The device operates across -40°C to +85°C and maintains valid reset logic state as long as either VCC1 or VCC2 exceeds 0.8V.

Key Specifications

Pinout & Package

Package: 8-pin SOT23 (SOT23-8), surface-mount, lead-free (+T suffix), footprint compatible with JEDEC MO-203AB.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar triple-voltage supervisory applications.

Compared with MAX6728KAWGD3+T, MAX6729KA+T offers identical supervision with push-pull PFO output (simplifying interface to CMOS loads), while TPS3808G33DBVR provides lower-cost dual monitoring but omits PFI/PFO functionality entirely - making it unsuitable for applications requiring auxiliary supply tracking or power-fail interrupts.

Availability

MAX6728KAWGD3+T is available at Aetrix Electronics and suitable for telecom infrastructure, industrial PLCs, server BMCs, and medical diagnostic equipment requiring stable component supply with guaranteed long-term availability and traceable sourcing.

Supply support for MAX6728KAWGD3+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for power, sensing, and connectivity applications, with leadership in supervisory, PMIC, and interface solutions.

The MAX6715–MAX6729 family delivers ultra-low-voltage, multi-rail supervision in miniature SOT23 packages - engineered specifically for space-constrained, multivoltage systems in telecom, computing, and industrial equipment.

FAQ

What is the exact reset timeout period for MAX6728KAWGD3+T?

The MAX6728KAWGD3+T has a guaranteed minimum reset timeout period of 210ms, corresponding to the "D3" suffix in its part number. This timeout begins when all monitored supplies (VCC1, VCC2, and PFI) rise above their respective thresholds and ensures the reset signal remains asserted long enough for microprocessor initialization and peripheral stabilization. Typical value is 210ms, with maximum specified at 280ms over temperature.

Does MAX6728KAWGD3+T support monitoring a negative supply voltage?

Yes, MAX6728KAWGD3+T can monitor a negative supply using the PFI input with an appropriate resistor-divider network as shown in Figure 3b of the datasheet. When the negative supply is valid, PFO asserts low; as the supply collapses, PFO deasserts. Accuracy depends on PFI threshold tolerance (±1.5%), resistor matching, and VCC stability - design requires verification against actual board-level noise and load conditions.

What is the function of Pin 8 (NC) on MAX6728KAWGD3+T?

Pin 8 on MAX6728KAWGD3+T is a no-connect (NC) terminal - it is internally unused and must be left floating or tied to GND per Maxim's layout recommendations. Connecting it to any active signal or voltage violates the device's absolute maximum ratings and may cause unpredictable behavior or damage. The NC designation is confirmed in the official pin description table for MAX6728/MAX6729 variants.

Can MAX6728KAWGD3+T operate with VCC1 = 1.8V and VCC2 = 1.2V simultaneously?

Yes, MAX6728KAWGD3+T supports VCC1 as low as 1.8V and VCC2 as low as 0.9V, so operation at VCC1 = 1.8V and VCC2 = 1.2V is fully specified. The device guarantees valid reset output logic state as long as either supply remains ≥0.8V. Supply current in this configuration is typically 10µA (ICC1) + 4µA (ICC2) = 14µA total, matching the datasheet's 3.6V typical value due to BiCMOS process efficiency.

How does the power-fail comparator in MAX6728KAWGD3+T differ from the main reset comparators?

The power-fail comparator in MAX6728KAWGD3+T uses the same 626.5mV internal reference as the RSTIN input but drives the PFO output without reset timeout - it asserts/deasserts immediately upon PFI crossing threshold (2µs typical delay). Unlike VCC1/VCC2 reset paths, PFO does not latch or interact with the reset timer, enabling real-time interrupt generation for firmware-controlled shutdown, whereas main reset outputs enforce mandatory 210ms hold time.