Analog Devices Inc./Maxim Integrated MAX6760TATID3+T
- Part No.:
- MAX6760TATID3+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 8-WDFN Exposed Pad
- Datasheet:
-
MAX6760TATID3+T.pdf
- Description:
- IC DETECT VOLT WINDOW 8-TDFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,711
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MAX6760TATID3+T from Analog Devices is a dual-voltage window detector IC that monitors both VCC (3.3V nominal) and VCC2 (1.5V nominal) supplies with ±10% factory-trimmed thresholds, 100ms minimum reset timeout, latched overvoltage output, manual reset input, and operation from -40°C to +125°C. It asserts independent UV/OV outputs when either supply violates its threshold, supporting fault-tolerant power sequencing in telecom DC-DC modules.
For engineers reviewing the MAX6760TATID3+T datasheet, MAX6760TATID3+T pinout, MAX6760TATID3+T application, or MAX6760TATID3+T equivalent, key selection criteria include dual-supply monitoring capability, latched OV output behavior, 100ms D3 timeout option, TDFN-8 package compatibility, and AEC-Q100 qualification for automotive-grade designs.
Technical Context
The MAX6760TATID3+T implements two independent voltage comparators-one for VCC (3.3V nominal) and one for VCC2 (1.5V nominal)-each with programmable ±10% window via SET pin tied to VCC. Its latched OV output remains asserted until cleared by OVLATCH, unlike non-latching variants. The device uses an internal bandgap reference and supports manual reset assertion with 4µs minimum pulse width.
It operates across VCC = 1.0V–6.0V and VCC2 = 0–6.0V, with guaranteed output validity down to VCC ≥ 1.0V. Threshold hysteresis is fixed at 0.7%, and propagation delays for UV/OV detection are 20µs typ, while MR-to-output delay is 300ns falling and 100–320ms rising depending on timeout option.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Nominal Voltage | 3.3V - primary monitored supply; factory-trimmed for ±10% window (TA suffix) |
| VCC2 Nominal Voltage | 1.5V - secondary monitored supply; factory-trimmed for ±10% window (I suffix) |
| Timeout Period Option | D3 - 100ms minimum reset timeout ensures stable system recovery after brownout |
| Supply Current (ICC) | 13–30µA at VCC = 3.6V - enables ultra-low-power monitoring in always-on subsystems |
| Operating Temperature | -40°C to +125°C - qualified for under-hood automotive and industrial embedded use |
| Output Configuration | Separate push-pull UV and open-drain OV outputs - allows flexible logic interfacing and latch control |
| Threshold Hysteresis | 0.7% - prevents chatter during slow-rising/falling supply transitions |
Pinout & Package
MAX6760TATID3+T is housed in an 8-pin TDFN package (package code T833+2, outline 21-0137) with exposed pad (EP) internally connected to GND. Thermal resistance θJA is 41°C/W on multilayer board, enabling high-reliability operation in compact power management layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - MR | Active-low manual reset input | Asserts UV output and holds it for 100–320ms after release; internal 26kΩ pullup to VCC |
| 2 - OVLATCH | Overvoltage latch control | High = latch OV output; low = clear latch; high-impedance input requiring external pullup/pulldown |
| 3 - UV | Undervoltage output | Active-low push-pull output; asserts when VCC or VCC2 falls below UVTH; deasserts after timeout |
| 4 - OV | Overvoltage output | Active-low open-drain output; asserts immediately on OV condition and latches until OVLATCH cleared |
| 5 - SET | Window select input | Tied to VCC for ±10% window; determines UVTH/OVTH offset relative to nominal voltages |
| 6 - VCC2 | Secondary monitored supply | Input for second voltage monitor; also powers device if VCC2 > VCC; valid down to 0V |
| 7 - GND | Ground reference | Common return for all analog and digital circuitry; EP must be connected to GND for thermal performance |
| 8 - VCC | Primary monitored supply | Power input and primary voltage monitor; outputs remain valid down to VCC = 1.0V |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent voltage monitoring | Simultaneously supervises 3.3V (VCC) and 1.5V (VCC2) rails with separate UV/OV outputs-enables precise multi-rail sequencing in SoC power domains |
| Latched overvoltage output | OVLATCH-controlled latch retains OV assertion until explicitly cleared-prevents transient-induced false resets in noisy automotive environments |
| Factory-trimmed ±10% window | TA/I suffix guarantees 3.3V/1.5V nominal thresholds with ±10% tolerance-eliminates external resistor networks for standard supply rails |
| 100ms minimum reset timeout (D3) | Ensures microprocessor reset duration exceeds boot-time requirements for reliable firmware initialization |
| AEC-Q100 qualified | Qualified for automotive applications per AEC-Q100 Rev H-validates reliability under extended temperature and stress conditions |
Applications
| Telecom DC-DC Modules | Automotive ADAS Power Management |
|---|---|
Use Scenario: Monitoring core and I/O rails in 48V-to-12V/5V/3.3V/1.5V telecom DC-DC converters with fast transient immunity. IC Role / Device Role / Timing Role: Dual-supply window detector asserting UV/OV flags to enable SCR-based fuse blow or PMIC shutdown sequencing. Use Value: Prevents data corruption during rail collapse by triggering immediate fault response with 20µs detection latency and latched OV state. | Use Scenario: Supervising 3.3V MCU core and 1.5V SerDes supply in radar ECU under engine compartment thermal stress. IC Role / Device Role / Timing Role: AEC-Q100-qualified dual monitor providing latched OV signal to safety controller for ASIL-B fault logging and graceful shutdown. Use Value: Guarantees correct output state down to VCC = 1.0V and operates reliably across -40°C to +125°C-meets ISO 16750-4 requirements. |
| Industrial PLC I/O Power Sequencing | Server Baseboard Management |
Use Scenario: Coordinating power-up of isolated 3.3V logic and 1.5V FPGA configuration rails in modular PLC backplanes. IC Role / Device Role / Timing Role: Dual-window detector generating synchronized UV assertions to gate enable signals for downstream LDOs and isolators. Use Value: Factory-trimmed TA/I thresholds eliminate calibration overhead; 100ms D3 timeout ensures robust reset hold time during cold-start ramp. | Use Scenario: Validating 3.3V BMC and 1.5V memory interface rails in server baseboard controllers during hot-swap events. IC Role / Device Role / Timing Role: Independent UV/OV outputs feed BMS logic for real-time rail health reporting and predictive maintenance alerts. Use Value: Low 13–30µA ICC enables continuous monitoring without impacting standby power budget; TDFN-8 footprint saves space on dense BOM layouts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-voltage window monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6761TATID3+T | Identical pinout, electrical specs, and package; differs only in UV output polarity (active-high push-pull vs. active-low) | Requires inverted logic handling in host MCU GPIO or level-shifting for UV signal path | Select when system design expects active-high undervoltage signaling or requires direct connection to interrupt inputs without inversion |
| TLV809E33DBZR | Single 3.3V supervisor only; no VCC2 monitoring, no OV latch, no SET pin, SOT-23-3 package | Lacks dual-rail capability and latched fault reporting-suitable only for basic single-rail reset generation | Choose only for cost-sensitive, single-supply applications where dual monitoring and latch functionality are unnecessary |
Compared with MAX6761TATID3+T and TLV809E33DBZR, the MAX6760TATID3+T uniquely delivers dual-rail supervision with latched OV response in a thermally optimized TDFN-8 package-making it the sole choice for automotive and telecom systems requiring coordinated multi-rail fault detection and persistent fault flagging.
Availability
MAX6760TATID3+T is available at Aetrix Electronics and suitable for telecom DC-DC modules, automotive ADAS ECUs, and industrial PLC power sequencing requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant reliability.
Supply support for MAX6760TATID3+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The MAX6760TATID3+T belongs to the MAX6754–MAX6764 family of low-power window detectors designed specifically for robust, multi-rail power supply monitoring in harsh environments including automotive under-hood and telecom infrastructure.
FAQ
What is the function of the OVLATCH pin on the MAX6760TATID3+T?
The OVLATCH pin on the MAX6760TATID3+T controls latching behavior of the overvoltage output. When driven high, it latches the OV output in asserted state during any VCC or VCC2 overvoltage event; driving it low clears the latch once the overvoltage condition is removed. This enables persistent fault indication without continuous polling. The MAX6760TATID3+T requires external pullup or pulldown since OVLATCH is a high-impedance input.
Does the MAX6760TATID3+T support monitoring of both 3.3V and 1.5V supplies simultaneously?
Yes, the MAX6760TATID3+T monitors VCC (3.3V nominal, TA suffix) and VCC2 (1.5V nominal, I suffix) independently using dedicated comparators. Each supply has its own undervoltage and overvoltage thresholds with ±10% window set by the SET pin. The MAX6760TATID3+T asserts separate UV and OV outputs for each rail, enabling granular fault diagnosis in multi-voltage systems.
What does the 'D3' suffix indicate in MAX6760TATID3+T?
The 'D3' suffix in MAX6760TATID3+T specifies the 100ms minimum reset timeout period. After VCC or VCC2 recovers above its UV threshold, the UV output remains asserted for at least 100ms before deasserting-ensuring sufficient reset hold time for microprocessors and FPGAs during power-up. This contrasts with the 'D0' option, which provides only 20µs propagation delay without timeout.
Is the MAX6760TATID3+T qualified for automotive applications?
Yes, the MAX6760TATID3+T is AEC-Q100 qualified for automotive applications. It is rated for operation from -40°C to +125°C, features guaranteed output validity down to VCC = 1.0V, and meets stringent reliability and stress-test requirements defined in AEC-Q100 Rev H. This qualification makes the MAX6760TATID3+T suitable for ADAS, infotainment, and body control modules.
How is the window threshold configured on the MAX6760TATID3+T?
The window threshold on the MAX6760TATID3+T is configured via the SET pin: tying SET to VCC selects ±10% (TA/I suffix), to GND selects ±5%, and biasing to VCC/2 selects ±15%. The MAX6760TATID3+T uses factory-trimmed internal dividers for its 3.3V/1.5V nominal thresholds-no external resistors are needed. This configuration applies identically to both VCC and VCC2 monitoring paths.
MAX6760TATID3+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 8-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 2
- Voltage - Threshold:
- 1.5V, 3.3V
- Output:
- Push-Pull, Totem Pole
- Reset:
- Active Low
- Reset Timeout:
- 100ms Minimum
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TDFN (3x3)
MAX6760TATID3+T FAQ
1.How can I place an order for MAX6760TATID3+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX6760TATID3+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX6760TATID3+T reliable?
The price and inventory of MAX6760TATID3+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX6760TATID3+T is usually 5 days.
3.What payment methods are accepted for MAX6760TATID3+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX6760TATID3+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX6760TATID3+T?
MAX6760TATID3+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX6760TATID3+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX6760TATID3+T?
For technical support, including MAX6760TATID3+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX6760TATID3+T requirements.
6.How does Aetrix verify that MAX6760TATID3+T is sourced from the original manufacturer or authorized distributors?
All MAX6760TATID3+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX6760TATID3+T meets industry standards.
7.What is the process for return or replacement of MAX6760TATID3+T?
All MAX6760TATID3+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX6760TATID3+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX6760TATID3+T part is unused and in its original packaging.
Return procedure for MAX6760TATID3+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX6760TATID3+T Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

