Analog Devices Inc./Maxim Integrated MAX6760TAWAD3+
- Part No.:
- MAX6760TAWAD3+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 8-WDFN Exposed Pad
- Datasheet:
-
MAX6760TAWAD3+.pdf
- Description:
- IC SUPERVISOR 2 CHANNEL 8TDFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,682
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
The MAX6760TAWAD3+ from Maxim Integrated is a dual-voltage window detector IC that monitors both VCC (1.8V nominal) and VCC2 (0.9V nominal) with ±15% factory-trimmed thresholds, 100ms minimum reset timeout, latched overvoltage output, manual reset input, and operates from -40°C to +125°C in automotive-grade TDFN-8 package. It delivers precise power-supply supervision for microprocessor core/I/O rail monitoring in DC-DC converter modules.
For engineers reviewing the MAX6760TAWAD3+ datasheet, MAX6760TAWAD3+ pinout, MAX6760TAWAD3+ application, or MAX6760TAWAD3+ equivalent, key selection criteria include dual-rail voltage monitoring capability, latched OV output behavior, SET-pin programmable ±15% window, MR input timing (4µs min pulse), and AEC-Q100 qualification status for automotive use.
Technical Context
The MAX6760TAWAD3+ implements two independent window detectors-one for VCC (1.8V nominal) and one for VCC2 (0.9V nominal)-each with selectable ±5%/±10%/±15% threshold windows via the SET pin. It features separate push-pull UV and open-drain OV outputs, with OV latch control via OVLATCH pin.
It supports dual-supply operation where VCC2 can serve as both monitored rail and auxiliary power source when VCC2 > VCC. The device asserts UV when either supply falls below its undervoltage threshold or MR is asserted low, and asserts OV when either supply exceeds its overvoltage threshold-with latch persistence until cleared by OVLATCH.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Nominal Voltage | 1.8V - factory-trimmed primary supply monitor rail |
| VCC2 Nominal Voltage | 0.9V - factory-trimmed secondary supply monitor rail |
| Threshold Window | ±15% - set by biasing SET pin to VCC/2; enables robust noise margin for 0.9V–1.8V systems |
| Reset Timeout Period | 100ms (min) - ensures stable processor reset hold time after brownout recovery |
| Supply Current (ICC) | 13µA (typ) at VCC = 3.6V - ultra-low quiescent current for always-on monitoring |
| Operating Temperature | -40°C to +125°C - qualified for under-hood automotive and industrial environments |
| Output Types | UV: push-pull; OV: open-drain with latch - enables flexible system-level fault signaling and recovery control |
Pinout & Package
MAX6760TAWAD3+ is housed in an 8-pin TDFN package (3mm × 3mm, 0.75mm height) with exposed pad (EP) internally connected to GND. Pin 1 is MR; Pin 2 is OVLATCH; Pin 3 is UV; Pin 4 is OV; Pin 5 is SET; Pin 6 is VCC2; Pin 7 is GND; Pin 8 is VCC.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - MR | Active-low manual reset input | Asserts UV output immediately; internal 26kΩ pullup enables button-only reset without external resistor |
| 2 - OVLATCH | Overvoltage latch control | High = latch OV output on overvoltage event; low = clear latch; high-impedance input requires external pullup/pulldown |
| 3 - UV | Undervoltage output | Push-pull active-low signal; deasserts after 100ms timeout once VCC/VCC2 recovers above UVTH |
| 4 - OV | Overvoltage output | Open-drain active-low; latched state persists until OVLATCH is driven low-critical for fault logging and safety shutdown |
| 5 - SET | Window threshold select | Bias to VCC/2 → ±15% window; enables precise tolerance matching for low-voltage rails like 0.9V core supplies |
| 6 - VCC2 | Secondary monitored supply | Monitored rail and optional auxiliary power source; supports 0.9V nominal with ±15% window (0.765V–1.035V) |
| 7 - GND | Ground reference | Common return for all analog and digital circuitry; EP must be soldered to PCB ground plane for thermal and EMI performance |
| 8 - VCC | Primary monitored supply | Monitored rail and main power source; 1.8V nominal with ±15% window (1.53V–2.07V) |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent voltage monitoring | Simultaneously supervises 1.8V (VCC) and 0.9V (VCC2) rails-enables complete SoC/core+I/O power integrity coverage |
| Latched overvoltage output | OVLATCH pin allows persistent fault flagging until system firmware explicitly clears, supporting ASIL-B diagnostic requirements |
| Manual reset with propagation delay | MR input guarantees UV assertion within 300ns and holds for ≥4µs pulse-ensures reliable reset initiation across temperature |
| ±15% window via SET bias | SET pin biased to VCC/2 configures widest tolerance window, accommodating aging and load-regulation drift in low-voltage rails |
| AEC-Q100 qualified | Qualified to Grade 0 (-40°C to +125°C) per AEC-Q100 Rev H-validates reliability for automotive powertrain and ADAS applications |
Applications
| Microprocessor Core/I/O Supervision | Automotive ADAS Power Monitoring |
|---|---|
Use Scenario: Monitoring 1.8V I/O and 0.9V core supplies of an automotive SoC during cold cranking and load dump events. IC Role / Device Role / Timing Role: Dual-rail window detector asserting UV on either rail drop and latching OV on overvoltage, with MR enabling hardware-initiated safe state entry. Use Value: Prevents undefined processor behavior by guaranteeing reset assertion during 0.765V–1.035V (VCC2) and 1.53V–2.07V (VCC) excursions-meeting ISO 16750-2 pulse 4a/b immunity requirements. | Use Scenario: Supervising dual-output DC-DC converters powering radar sensor modules in engine bay environments. IC Role / Device Role / Timing Role: Real-time detection of overvoltage transients on 1.8V bias rail and undervoltage on 0.9V logic rail, with latched OV output triggering fuse blow via SCR gate control. Use Value: Enables fail-safe disconnection before transient-induced latch-up occurs-leveraging 300ns MR-to-UV propagation and 100ms timeout for controlled shutdown sequencing. |
| Industrial PLC Power Integrity | Server CPU VRM Health Monitoring |
Use Scenario: Ensuring clean startup and brownout recovery of 1.8V FPGA configuration and 0.9V DSP core in programmable logic controllers. IC Role / Device Role / Timing Role: Dual-threshold supervision with SET-configured ±15% window compensating for board-level IR drop and temperature drift across -40°C to +85°C operating range. Use Value: Eliminates false resets during thermal cycling by maintaining valid UV/OV detection down to VCC = 1.0V-critical for unattended 24/7 operation. | Use Scenario: Monitoring 1.8V VDDQ and 0.9V VDD of server CPU voltage regulator modules during dynamic load steps and phase loss events. IC Role / Device Role / Timing Role: Independent UV/OV detection on both rails with latched OV output feeding BMC fault register, while MR supports hardware-based warm reset. Use Value: Provides deterministic fault isolation-OV latch prevents premature re-enabling after transient overvoltage, ensuring VRM stabilization before retry. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-voltage window detector applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6761TAWAD3+ | Same pinout, package, and electrical specs; differs only in UV output polarity (active-high push-pull vs. active-low) | Suitable where system logic requires active-high reset assertion without external inverter | Select MAX6761TAWAD3+ when interfacing directly with processors requiring active-high RESET input |
| TLV809E33DBZR | Single 3.3V supervisor (not dual-rail); no OV latch, no SET-adjustable window, no OVLATCH pin | Limited to single-rail monitoring; lacks fault persistence and programmable tolerance | Use TLV809E33DBZR only for cost-sensitive, non-automotive single-supply applications without latch or dual-rail needs |
Compared with MAX6761TAWAD3+, the MAX6760TAWAD3+ provides active-low UV output compatible with legacy µP NMI inputs, while TLV809E33DBZR offers lower cost but sacrifices dual-rail supervision, latch functionality, and AEC-Q100 qualification-making it unsuitable for automotive or safety-critical dual-rail designs.
Availability
MAX6760TAWAD3+ is available at Aetrix Electronics and suitable for automotive ADAS modules, industrial PLCs, and server CPU VRM health monitoring requiring stable component supply, AEC-Q100 compliance, and dual-rail supervision with latched fault reporting.
Supply support for MAX6760TAWAD3+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated, now part of Analog Devices, designs precision analog and mixed-signal ICs for automotive, industrial, communications, and computing markets.
The MAX6754–MAX6764 family was engineered specifically for high-reliability power-supply supervision in harsh environments-featuring ultra-low ICC, wide temperature operation, and configurable window detection for multi-rail SoCs and DC-DC systems.
FAQ
What is the function of the SET pin on the MAX6760TAWAD3+?
The SET pin on the MAX6760TAWAD3+ selects the undervoltage/overvoltage window tolerance: grounded for ±5%, tied to VCC for ±10%, or biased to VCC/2 for ±15%. For MAX6760TAWAD3+, SET is biased to VCC/2 to configure the ±15% window required for 0.9V and 1.8V rails. This setting directly determines the UVTH and OVTH boundaries used in real-time monitoring.
Does the MAX6760TAWAD3+ support latched overvoltage reporting?
Yes, the MAX6760TAWAD3+ supports latched overvoltage reporting via the OVLATCH pin. When OVLATCH is driven high, the OV output remains asserted even after the overvoltage condition clears-enabling fault capture for diagnostics. The latch is cleared only when OVLATCH is driven low. This behavior is confirmed in the functional diagram and Electrical Characteristics table for MAX6760/MAX6761/MAX6762 devices.
What are the exact voltage thresholds monitored by the MAX6760TAWAD3+?
The MAX6760TAWAD3+ monitors VCC at 1.8V nominal (W suffix) and VCC2 at 0.9V nominal (E suffix), both with ±15% window. At 25°C, this yields UVTH = 1.53V / 0.765V and OVTH = 2.07V / 1.035V. Thresholds vary with temperature per the normalized curves in the datasheet, with typical hysteresis of 0.7% of threshold voltage.
Is the MAX6760TAWAD3+ qualified for automotive applications?
Yes, the MAX6760TAWAD3+ is AEC-Q100 qualified (Grade 0, -40°C to +125°C) as indicated by the "/V" designation in Maxim's ordering information and confirmed in the Benefits and Features section. This qualification covers stress testing for temperature cycling, humidity, and ESD-making it suitable for engine control units, ADAS sensors, and body electronics.
What package type and pin count does the MAX6760TAWAD3+ use?
The MAX6760TAWAD3+ uses an 8-pin TDFN package (3mm × 3mm, 0.75mm height) with exposed pad (EP). Pinout is fixed per the datasheet: Pin 1 = MR, Pin 2 = OVLATCH, Pin 3 = UV, Pin 4 = OV, Pin 5 = SET, Pin 6 = VCC2, Pin 7 = GND, Pin 8 = VCC. The EP is internally connected to GND and must be soldered to PCB ground for thermal and EMI performance.
MAX6760TAWAD3+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 8-WDFN Exposed Pad
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 2
- Voltage - Threshold:
- 1.8V, Adj
- Output:
- Push-Pull, Totem Pole
- Reset:
- Active Low
- Reset Timeout:
- 100ms Minimum
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TDFN (3x3)
MAX6760TAWAD3+ FAQ
1.How can I place an order for MAX6760TAWAD3+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX6760TAWAD3+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX6760TAWAD3+ reliable?
The price and inventory of MAX6760TAWAD3+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX6760TAWAD3+ is usually 5 days.
3.What payment methods are accepted for MAX6760TAWAD3+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX6760TAWAD3+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX6760TAWAD3+?
MAX6760TAWAD3+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX6760TAWAD3+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX6760TAWAD3+?
For technical support, including MAX6760TAWAD3+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX6760TAWAD3+ requirements.
6.How does Aetrix verify that MAX6760TAWAD3+ is sourced from the original manufacturer or authorized distributors?
All MAX6760TAWAD3+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX6760TAWAD3+ meets industry standards.
7.What is the process for return or replacement of MAX6760TAWAD3+?
All MAX6760TAWAD3+ units undergo pre-shipment inspection (PSI). If there is an issue with MAX6760TAWAD3+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX6760TAWAD3+ part is unused and in its original packaging.
Return procedure for MAX6760TAWAD3+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX6760TAWAD3+ Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

