Analog Devices Inc./Maxim Integrated MAX6819UT+T

Overview

MAX6819UT+T from Maxim Integrated is a 6-pin SOT23 power-supply sequencer for dual-voltage microprocessors, monitoring primary supply voltage (VCC1) down to 0.618V threshold and enabling an external n-channel MOSFET to control secondary supply (VCC2) with factory-fixed 200ms delay. It features logic-driven EN input, internal charge pump delivering +5.5V gate drive relative to VCC2, and operates across -40°C to +125°C for automotive-grade reliability in multivoltage board sequencing.

For engineers reviewing the MAX6819UT+T datasheet, MAX6819UT+T pinout, MAX6819UT+T application, or MAX6819UT+T equivalent, key selection criteria include primary supply undervoltage lockout (1.875V), SETV input current (10nA typ), GATE turn-on time (0.5–10ms), UVLO hysteresis, and compatibility with n-channel MOSFETs requiring ≥4.5V VGS for full enhancement.

Technical Context

The MAX6819UT+T implements a comparator-based voltage monitor with adjustable threshold via external resistor divider on SETV, coupled to a charge-pump-driven GATE output that delivers VCC2 + 5.5V (typ) to fully enhance external n-channel MOSFETs. Its EN input provides TTL/CMOS-compatible logic control over sequencing enablement.

It enforces strict sequencing priority-VCC1 must exceed 0.618V (with hysteresis) and EN must be high before GATE activates after fixed 200ms delay; both conditions must hold continuously for sustained operation. Neither VCC1 nor VCC2 alone suffices-either must exceed 2.125V UVLO to permit GATE drive activation.

Key Specifications

Pinout & Package

MAX6819UT+T is housed in a space-saving 6-pin SOT23-6 package (JEDEC MO-178AA), with exposed pad not electrically connected. Pin 1 marked by dot; top-mark "AARF" confirms MAX6819 variant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar power-supply sequencing applications.

Compared with MAX6820UT+T, MAX6819UT+T offers lower BOM cost and simpler layout due to fixed timing, while TPS3808G125DBVR lacks gate-drive capability entirely-making MAX6819UT+T the sole option when active secondary-rail enablement via n-MOSFET is required.

Availability

MAX6819UT+T is available at Aetrix Electronics and suitable for automotive infotainment systems, industrial PLCs, and embedded computing platforms requiring stable component supply with guaranteed long-term availability and AEC-Q100-aligned temperature performance.

Supply support for MAX6819UT+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power-management ICs for demanding industrial, automotive, and communications applications.

The MAX6819UT+T belongs to Maxim's power-supply sequencer product line, engineered specifically for local, reliable voltage sequencing in multirail systems where centralized PMICs are unavailable or insufficient.

FAQ

What is the function of the EN pin on the MAX6819UT+T?

The EN pin on the MAX6819UT+T is an active-high logic input that gates the sequencing function: GATE output activates only after both SETV exceeds its 0.618V threshold AND EN is held ≥2.0V for the full 200ms delay period. Driving EN low immediately disables GATE, providing digital override capability independent of voltage conditions - a key feature distinguishing MAX6819UT+T from the capacitor-timed MAX6820UT+T.

Can the MAX6819UT+T monitor a 1.2V supply as VCC1?

Yes, the MAX6819UT+T can monitor a 1.2V supply as VCC1 by connecting a resistor divider to SETV such that the divided voltage equals 0.618V when VCC1 reaches 1.2V. With SETV input current of only 10nA (typ), high-value resistors (e.g., 1MΩ/1.2MΩ) introduce negligible loading. This configuration ensures GATE enables precisely when the 1.2V rail crosses regulation, making MAX6819UT+T suitable for modern low-voltage SoCs.

What n-channel MOSFET specifications are required for use with the MAX6819UT+T?

The MAX6819UT+T drives external n-channel MOSFETs with a gate voltage of VCC2 + 5.5V (typ), so the MOSFET must be rated for ≥6V VGS and exhibit RDS(ON) ≤50mΩ at VGS = 4.5V to 6.0V. Logic-level or "hot-swap" MOSFETs (e.g., Si7157DP, DMN3025LSD) are recommended. The device does not support depletion-mode or p-channel devices, and gate resistors >5MΩ to VCC2 are required to maintain full charge-pump output voltage.

Does the MAX6819UT+T require external timing capacitors?

No, the MAX6819UT+T does not require external timing capacitors. Its 200ms enable delay is internally fixed and factory-trimmed - unlike the MAX6820UT+T, which uses an external capacitor on SETD for adjustable delay. This makes MAX6819UT+T ideal for space-constrained layouts and cost-sensitive designs where consistent, repeatable sequencing timing is required without component variation or aging effects.

How does the MAX6819UT+T handle undervoltage conditions on VCC1 or VCC2?

The MAX6819UT+T incorporates a 1.875V to 2.125V undervoltage lockout (UVLO) circuit: if neither VCC1 nor VCC2 exceeds this threshold, GATE is forced low and internal circuitry (including charge pump) is disabled - preventing partial or unstable operation. If VCC1 drops below the SETV threshold (e.g., 0.618V) during operation, GATE turns off within microseconds. This dual-layer protection ensures fail-safe behavior during brownouts or supply collapse, a critical requirement in automotive and industrial applications using MAX6819UT+T.