Analog Devices Inc./Maxim Integrated MAX6820UT

Overview

MAX6820UT from Maxim Integrated is a dual-voltage power-supply sequencer IC that monitors a primary supply (e.g., 3.3V) and enables an external n-channel MOSFET to connect a secondary supply (e.g., 1.8V) only after the primary exceeds a user-adjustable 0.618V threshold; features capacitor-adjustable enable delay (t_DELAY), internal charge pump delivering +5.5V gate drive relative to V_CC2, and operates across –40°C to +125°C in automotive systems.

For engineers reviewing the MAX6820UT datasheet, MAX6820UT pinout, MAX6820UT application, or MAX6820UT equivalent, this device is selected for precise local voltage sequencing where primary/secondary supply order (VI/O before VCORE or vice versa) must be enforced without relying on system-level power management - especially in multivoltage boards with externally sourced rails.

Technical Context

The MAX6820UT implements a comparator-based monitoring architecture with an internal 0.618V reference applied to the SETV input, enabling threshold setting via external resistor dividers. Its charge pump generates a regulated +5.5V gate drive above V_CC2 to fully enhance external n-channel MOSFETs, ensuring operation outside the linear region and minimizing R_DS(ON)-dependent voltage drop.

Sequencing timing is defined by an external capacitor at SETD, yielding t_DELAY = 2.48 × 10⁶ × C_SET (seconds); UVLO disables all functions if both V_CC1 and V_CC2 fall below 1.875V. Either supply can serve as primary, provided ≥2.125V is present on at least one rail.

Key Specifications

Pinout & Package

MAX6820UT is housed in a 6-pin SOT23-6 package with exposed pad (not thermally enhanced), footprint compatible with JEDEC MO-178AA. Pin 1 is marked with a dot; pin numbering follows standard SOT23 top-view orientation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar power-supply sequencing applications.

Compared with MAX6819UT-T and TPS3808G33, the MAX6820UT uniquely combines capacitor-adjustable sequencing delay, integrated charge-pump gate drive, and dual-rail flexibility - making it the only option among the three capable of autonomous, hardware-based dual-supply sequencing without external drivers or firmware.

Availability

MAX6820UT is available at Aetrix Electronics and suitable for automotive ECUs, industrial PLCs, and telecom baseband boards requiring stable component supply with guaranteed long-term availability and AEC-Q100-aligned qualification.

Supply support for MAX6820UT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for automotive, industrial, and communications markets.

The MAX6819/MAX6820 product line delivers compact, temperature-hardened power-supply sequencers for systems where multivoltage rail ordering must be enforced locally - eliminating dependency on complex PMICs or software-controlled sequencing.

FAQ

What is the function of the SETD pin on the MAX6820UT?

The SETD pin on the MAX6820UT accepts an external capacitor connected to GND to set the delay time between primary supply validation and secondary supply enable. The relationship is t_DELAY (seconds) = 2.48 × 10⁶ × C_SET (farads). This allows precise, passive tuning of sequencing timing without microcontroller involvement - a key differentiator from the fixed-delay MAX6819UT-T. The MAX6820UT uses this pin exclusively; it has no EN input.

Can the MAX6820UT monitor a 1.0V primary supply?

Yes, the MAX6820UT can monitor a 1.0V primary supply using a resistor divider at the SETV pin. With its internal 0.618V reference, a 1.0V rail requires R1/R2 ≈ 0.62 to set the trip point. Since SETV input current is only 10nA typical, high-value resistors (e.g., 1MΩ/620kΩ) introduce negligible loading. This capability is confirmed in the MAX6820UT datasheet Figure 2 and Applications Information section.

Does the MAX6820UT require external capacitors for its charge pump?

No, the MAX6820UT internal charge pump requires no external capacitors. It self-generates the +5.5V gate drive above V_CC2 using on-chip switched-capacitor circuitry. This eliminates the need for external flying or reservoir capacitors - simplifying layout and reducing BOM count. The charge pump activates only when V_CC1 or V_CC2 exceeds UVLO and SETV > V_TH, and drives the GATE pin directly.

How does the MAX6820UT handle undervoltage conditions on both supplies?

When both V_CC1 and V_CC2 fall below the UVLO threshold (1.875V–2.125V), the MAX6820UT disables the charge pump and forces GATE low, turning off the external MOSFET. This hard-disable behavior prevents partial enable during brown-out events. The device remains latched off until at least one supply rises above UVLO and SETV exceeds V_TH - a safety feature explicitly documented in the Absolute Maximum Ratings and Detailed Description sections of the MAX6820UT datasheet.

Is the MAX6820UT pin-compatible with the MAX6819UT-T?

No, the MAX6820UT is not pin-compatible with the MAX6819UT-T. While both use the SOT23-6 package, the pin functions differ: MAX6819UT-T uses Pin 4 as EN (enable input), whereas MAX6820UT uses Pin 4 as SETD (delay capacitor input). Swapping them would disconnect critical functionality - the MAX6820UT lacks an EN input entirely. This difference is clearly shown in the Pin Configurations diagrams and Pin Description table of the MAX6820UT datasheet.