Analog Devices Inc./Maxim Integrated MAX6820UT+T

Overview

MAX6820UT+T from Maxim Integrated is a 6-pin SOT23 power-supply sequencer for dual-voltage microprocessors and multivoltage systems. It monitors a primary supply (VCC1 or VCC2 ≥ 2.125V), enables an external n-channel MOSFET via charge-pump-driven GATE output, and provides capacitor-adjustable sequencing delay (tDELAY = 2.48×10⁶ × CSET). Designed for automotive (-40°C to +125°C) operation, it ensures VI/O-before-VCORE or VCORE-before-VI/O sequencing in digital signal processors and PowerPC™ systems.

For engineers reviewing the MAX6820UT+T datasheet, MAX6820UT+T pinout, MAX6820UT+T application, or MAX6820UT+T equivalent, key selection criteria include adjustable sequencing delay via SETD capacitor, 0.618V internal SETV threshold with ±1% hysteresis, charge-pump-enhanced GATE drive (VCC2 + 5.5V typ), UVLO at 2.0V, and immunity to short negative transients.

Technical Context

The MAX6820UT+T implements a voltage-monitoring sequencer architecture where either VCC1 or VCC2 serves as the primary monitored rail, provided ≥2.125V. Its SETV input compares against a precision 0.618V internal reference to trigger sequencing, while SETD accepts an external capacitor to set tDELAY per tDELAY(s) = 2.48×10⁶ × CSET(F).

GATE output uses an integrated charge pump to deliver VCC2 + 5.5V (typ) to fully enhance external n-channel MOSFETs, ensuring low RDS(ON) and avoiding linear-region operation. The device disables GATE immediately upon SETV falling below threshold or loss of valid supply, and remains inactive if both VCC1 and VCC2 fall below 1.875V UVLO.

Key Specifications

Pinout & Package

MAX6820UT+T is housed in a space-saving 6-pin SOT23-6 package (JEDEC MO-178AA), with 1.0mm pitch, 2.9mm × 1.6mm footprint, and 1.1mm height.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar power-supply sequencing applications.

Compared with MAX6819UT+T and TPS3808G33DBVR, the MAX6820UT+T uniquely delivers capacitor-adjustable sequencing delay and integrated charge-pump GATE drive-enabling robust, hardware-controlled dual-rail sequencing without external components or firmware intervention.

Availability

MAX6820UT+T is available at Aetrix Electronics and suitable for automotive ECUs, industrial PLCs, and DSP-based communication equipment requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for MAX6820UT+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for automotive, industrial, and communications markets.

The MAX6819/MAX6820 product line delivers compact, temperature-hardened power-supply sequencers targeting dual-rail microprocessor and DSP platforms where reliable hardware-enforced sequencing is critical.

FAQ

What is the function of the SETD pin on the MAX6820UT+T?

The SETD pin on the MAX6820UT+T accepts an external capacitor connected to GND to program the delay from primary supply valid (SETV > 0.618V) to GATE activation. The relationship is tDELAY(s) = 2.48×10⁶ × CSET(F), enabling precise, component-based timing without software or additional ICs. This function is exclusive to MAX6820UT+T and not present on MAX6819UT+T.

Can MAX6820UT+T monitor VCC2 as the primary supply instead of VCC1?

Yes, MAX6820UT+T supports bidirectional monitoring: either VCC1 or VCC2 may serve as the primary supply, provided that the chosen rail exceeds 2.125V (UVLO threshold). The SETV input monitors the selected primary rail, and GATE controls the secondary rail. This flexibility allows MAX6820UT+T to implement VCORE-before-VI/O or VI/O-before-VCORE sequencing on the same PCB layout.

What is the maximum gate capacitance the MAX6820UT+T GATE output can drive reliably?

The MAX6820UT+T GATE output is characterized with a 1500pF capacitive load, showing 0.5–10ms turn-on time and 30µs turn-off time. While not explicitly rated for higher capacitance, its internal charge pump drives high-impedance MOSFET gates without external components. For loads exceeding 2000pF, verify timing margins using actual FET gate charge (Qg) and the 5.5V gate drive swing specified in the MAX6820UT+T datasheet.

Does MAX6820UT+T require external components to operate?

MAX6820UT+T requires minimal external components: only a capacitor from SETD to GND for delay adjustment and a resistor divider from VCC1 (or VCC2) to SETV to set the primary supply threshold. No external charge pump capacitors, pull-ups, or bypass components beyond standard 0.1µF VCC decoupling are needed-making it a true "single-chip" sequencing solution.

How does MAX6820UT+T handle supply brown-out conditions?

During brown-out, MAX6820UT+T disables GATE immediately when SETV falls below the 0.618V threshold or when both VCC1 and VCC2 drop below the 1.875V UVLO level. The internal charge pump shuts down, and GATE discharges through its internal path. This ensures the external MOSFET turns off cleanly, preventing partial conduction and uncontrolled voltage droop on the secondary rail-critical for safe system shutdown.