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Analog Devices Inc./Maxim Integrated MAX6870ETJ+T
- Part No.:
- MAX6870ETJ+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 32-WQFN Exposed Pad
- Datasheet:
-
MAX6870ETJ+T.pdf
- Description:
- IC SUPERVISOR 6 CHANNEL 32TQFN
- Quantity:
- Payment:
- Shipping:
Inventory:2,314
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Product details
Overview
The MAX6870ETJ+T from Maxim Integrated is an EEPROM-configurable, multi-voltage power-supply sequencer/supervisor with six voltage detector inputs, eight programmable outputs, a 10-bit internal ADC, ±1% threshold accuracy, and I²C/SMBus-compatible configuration interface. It monitors up to six supply rails (including high-voltage +1.25V–+13.2V and bipolar ±1.25V–±15.25V), sequences power using timing delays from 25µs to 1600ms, and logs fault conditions in nonvolatile registers - deployed in telecom base stations and multimicroprocessor server systems.
For engineers reviewing the MAX6870ETJ+T datasheet, MAX6870ETJ+T pinout, MAX6870ETJ+T application, or MAX6870ETJ+T equivalent, key selection considerations include its six configurable voltage detectors, eight output types (charge-pump, push-pull, open-drain), dual watchdog timers, 4kb user EEPROM, and support for margining control and manual reset assertion in high-reliability power management designs.
Technical Context
The MAX6870ETJ+T implements a hierarchical digital logic network that maps voltage detector states, GPI inputs, watchdog events, and manual reset signals to eight independently timed output stages. Each output supports conditional assertion based on undervoltage/overvoltage detection, GPI edge events, or cascaded PO_ dependencies, with programmable deassertion delays controlled by 3-bit timing registers (25µs–1600ms).
Its analog front-end integrates six dedicated voltage comparators (IN1–IN6) with dual-threshold programming per input, a 10-bit sigma-delta ADC multiplexed across all six detector inputs plus two auxiliary channels (AUXIN1/AUXIN2), and internal reference switching between 1.25V bandgap and external REFIN (1.225V–1.275V), all operating under a diode-OR power architecture selecting IN1 (>6.5V) or highest IN3–IN6 (>2.7V) as primary supply.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Voltage Inputs | Six detector inputs: IN1 (+1.25V–+13.2V), IN2 (±1.25V–±15.25V), IN3–IN6 (+0.5V–+5.5V); each supports dual thresholds for UV/OV or dual-UV detection. |
| Output Count & Types | Eight programmable outputs (PO1–PO8): active-high/low, open-drain, weak pullup, push-pull, or charge-pump (PO1–PO4 only); swing to VABP + 5V in charge-pump mode. |
| Timing Resolution | Configurable output deassertion delay per channel: 25µs to 1600ms via 3-bit register (8 discrete steps, e.g., 6.25ms, 22.5ms, 45ms, 180ms, 1440ms). |
| ADC Performance | 10-bit internal ADC monitors all six voltage inputs and two auxiliary channels every 200ms; ±1% FSR total unadjusted error over –40°C to +85°C. |
| Threshold Accuracy | ±1% over temperature for IN1–IN6 positive thresholds; ±1.5% for IN2 negative thresholds; hysteresis = 0.3% of VTH. |
| Interface & Memory | I²C/SMBus-compatible serial interface (400kHz max); 4kb user EEPROM (100k write cycles, 10-year retention); configuration EEPROM + fault logging registers. |
Pinout & Package
MAX6870ETJ+T is housed in a 32-pin, 7mm × 7mm × 0.8mm thin QFN package (T3277-2) with exposed paddle (EP) internally connected to GND. Pin functions are electrically validated per Maxim's official pin description table for the MAX6870 variant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PO1–PO8 | Programmable output drivers | Eight independent outputs supporting charge-pump (PO1–PO4), push-pull (PO5–PO8), open-drain, or weak pullup; each asserts/deasserts based on programmed logic and timing. |
| IN1–IN6 | Voltage detector inputs | IN1 accepts +1.25V–+13.2V; IN2 handles ±1.25V–±15.25V; IN3–IN6 cover +0.5V–+5.5V; all support dual-threshold configuration and noise filtering via 0.1µF bypass caps. |
| GPI1–GPI4 | General-purpose logic inputs | Four CMOS inputs with internal 10µA pulldown; used to trigger watchdogs, override outputs, or enable sequencing states. |
| MR / MARGIN | Control inputs | Manual reset (MR) and margin disable (MARGIN) both assert outputs into programmed states; MARGIN overrides MR when both active. |
| SDA / SCL / A0 / A1 | I²C/SMBus interface | Open-drain bidirectional data (SDA) and clock (SCL); A0/A1 set device address (up to four on one bus); require external pullups. |
| AUXIN1 / AUXIN2 | Auxiliary ADC inputs | High-impedance (≥500kΩ) analog monitoring inputs; range limited to VREFIN (1.225V–1.275V); no effect on sequencing or reset logic. |
| ABP / DBP | Internal power rails | ABP supplies core logic and charge pumps; DBP powers EEPROM and digital logic; both require 1µF ceramic bypass to GND; not for external use. |
| REFIN | Reference input | Selects external 1.225V–1.275V reference; leaves internal 1.25V bandgap active when floating. |
Key Features
| Feature | Design Value |
|---|---|
| EEPROM-based configuration | Nonvolatile storage of detector thresholds, output logic, timing delays, and watchdog settings enables field reprogramming without hardware change. |
| Charge-pump output stage | PO1–PO4 generate up to VABP + 5V to directly drive n-channel FET gates in high-side power-switching applications without external boost circuitry. |
| Dual watchdog timers | Independent watchdogs with programmable timeout (6.25ms–102.4s) and flexible clear conditions (GPI-only, PO-only, or GPI+PO combo) enhance system reliability. |
| Fault event logging | Dedicated fault register records cause of each output assertion (e.g., IN3 undervoltage, MR activation, GPI2 edge), enabling post-failure diagnostics. |
| Multi-rail voltage supervision | Six detector inputs with overlapping ranges and fine resolution (10mV/20mV/25mV/50mV steps) support precise margining and sequencing across mixed-voltage ASIC/FPGA systems. |
Applications
| Telecom Base Station Power Management | Server CPU Voltage Sequencing |
|---|---|
Use Scenario: Sequencing 12V, 5V, 3.3V, 1.8V, and 1.2V rails for multicore processor, FPGA, and memory subsystems in LTE/5G macro base stations. IC Role / Device Role / Timing Role: Centralized sequencer supervising six supply domains, asserting PO1–PO8 with millisecond-scale delays to meet ASIC power-up timing requirements. Use Value: Eliminates discrete RC networks and multiple supervisors; reduces BOM count by 60% while enabling dynamic reconfiguration via I²C during firmware updates. | Use Scenario: Coordinating power-up of CPU core, I/O, memory controller, and PCIe PHY rails in dual-socket x86 servers with strict tPU and tPD windows. IC Role / Device Role / Timing Role: Supervisor enforcing voltage monotonicity and inter-rail timing constraints (e.g., VCCIO before VDDQ, VDDQ before VDD) using programmable PO_ delays and fault-triggered shutdown. Use Value: Guarantees compliance with Intel VRD/AMD SVI2 specifications; prevents latch-up and boot failure caused by out-of-sequence rail activation. |
| Industrial PLC Backplane Power Control | Medical Imaging System Subsystem Supervision |
Use Scenario: Managing isolated 24V, ±15V, 5V, and 3.3V supplies powering analog signal chains, microcontrollers, and communication modules in programmable logic controllers. IC Role / Device Role / Timing Role: Bipolar IN2 input monitors –15V rail; IN1 tracks 24V; PO5–PO8 control MOSFET switches with charge-pump drive for fast turn-on and low RDS(on) conduction. Use Value: Enables single-chip supervision of both positive and negative rails; eliminates need for separate ±15V supervisor ICs and discrete level shifters. | Use Scenario: Monitoring critical analog supplies (±5V, +3.3V, +1.8V) and bias voltages for CT/MRI detector front-ends, where nanosecond-level glitch immunity and precision threshold stability are mandatory. IC Role / Device Role / Timing Role: High-accuracy (±1%) voltage detection on IN3–IN6 with 10mV step resolution; ADC continuously samples AUXIN1/AUXIN2 for real-time thermal drift compensation. Use Value: Maintains diagnostic image fidelity by preventing false resets during transient load steps; supports FDA-required traceability via fault register timestamping. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power-supply sequencing and supervision applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6871ETJ+T | Four voltage inputs (IN1–IN4), five programmable outputs (PO1–PO5), no IN5/IN6 or PO6–PO8; identical pinout and interface. | Suitable for simpler 4-rail systems; lacks capacity for complex multimicroprocessor sequencing requiring six monitored rails and eight outputs. | Select MAX6871ETJ+T when BOM cost reduction and reduced feature set align with 4-input/5-output system architecture. |
| TPS659122ZQV | Integrated PMIC with buck/boost regulators; only two dedicated voltage supervisors; no bipolar input or charge-pump outputs; different 64-pin BGA package. | Targets SoC power delivery (e.g., TI Sitara), not standalone sequencing; lacks fine-grained threshold programming and fault logging depth of MAX6870ETJ+T. | Choose TPS659122ZQV only if system requires integrated regulation + basic supervision; MAX6870ETJ+T remains superior for pure sequencing/logic control in discrete power architectures. |
Compared with MAX6871ETJ+T and TPS659122ZQV, the MAX6870ETJ+T delivers unmatched flexibility for high-channel-count, mixed-voltage, and bipolar-rail systems - its six detector inputs, eight programmable outputs (including charge-pump), and comprehensive fault logging make it the only option capable of replacing multiple legacy supervisors in telecom and server platforms without compromising timing precision or diagnostic capability.
Availability
MAX6870ETJ+T is available at Aetrix Electronics and suitable for telecommunications base stations, server/workstation power management, industrial PLC backplanes, and medical imaging subsystems requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for MAX6870ETJ+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for demanding industrial, communications, and computing applications.
The MAX6870ETJ+T belongs to Maxim's EEPROM-programmable power-supply sequencer/supervisor product line, engineered specifically for high-density, multi-rail systems requiring field-upgradable sequencing logic, fine-resolution voltage monitoring, and robust fault diagnostics in extended temperature environments.
FAQ
What is the maximum number of voltage rails the MAX6870ETJ+T can monitor simultaneously?
The MAX6870ETJ+T monitors six independent voltage rails via dedicated inputs IN1 through IN6. IN1 supports high-voltage rails (+1.25V to +13.2V), IN2 handles bipolar rails (±1.25V to ±15.25V), and IN3–IN6 cover standard positive rails (+0.5V to +5.5V). All six inputs operate concurrently with independent threshold programming and fault logging - a capability confirmed in the device's block diagram, pin description, and electrical characteristics tables.
Does the MAX6870ETJ+T support both undervoltage and overvoltage detection on the same input?
Yes, the MAX6870ETJ+T supports dual-threshold configuration per voltage input (IN1–IN6), enabling simultaneous undervoltage and overvoltage detection or dual undervoltage detection. This is implemented via two independent comparator thresholds per input, as explicitly stated in the General Description, Detailed Description, and Features sections of the datasheet - allowing a single input to trigger different outputs based on rising or falling voltage crossings.
Can the MAX6870ETJ+T drive n-channel MOSFETs directly without external level-shifting components?
Yes, the MAX6870ETJ+T can directly drive n-channel MOSFET gates using its charge-pump output feature on PO1–PO4. When configured in charge-pump mode, these outputs swing up to VABP + 5V, sufficient to fully enhance common logic-level n-channel FETs (e.g., IRF7811W) - a capability verified in the Typical Operating Characteristics (Figure 15) and Pin Description sections, which confirm charge-pump operation and gate-drive validation.
What is the resolution and accuracy of the internal ADC in the MAX6870ETJ+T?
The MAX6870ETJ+T integrates a 10-bit sigma-delta ADC with ±1% full-scale range (FSR) total unadjusted error over –40°C to +85°C, as specified in the Electrical Characteristics table (Note 5). It monitors all six voltage detector inputs and two auxiliary channels (AUXIN1/AUXIN2) in sequence every 200ms, with LSB sizes ranging from 3.66mV (IN3–IN6, 10mV-step mode) to 1.2mV (AUXIN_, 1.249V range), all confirmed in the ADC Range and TUE parameters.
How does the MAX6870ETJ+T handle power supply redundancy and source selection?
The MAX6870ETJ+T uses a virtual diode-ORing scheme to autonomously select its power source: it draws power from IN1 if VIN1 > +6.5V, or from the highest voltage among IN3–IN6 if VIN1 < +2.7V. Operation is guaranteed when at least one of IN3–IN6 exceeds +2.7V or IN1 exceeds +4V. This behavior is documented in the Absolute Maximum Ratings note, Detailed Description, and Electrical Characteristics (VIN1P, VUVLO parameters), ensuring seamless fallback between primary and backup rails.
MAX6870ETJ+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 32-WQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Sequencer
- Number of Voltages Monitored:
- 6
- Voltage - Threshold:
- 8 Selectable Threshold Combinations
- Output:
- Open Drain, Push-Pull
- Reset:
- Active High/Active Low
- Reset Timeout:
- Adjustable/Selectable
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-TQFN (7x7)
MAX6870ETJ+T FAQ
1.How can I place an order for MAX6870ETJ+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX6870ETJ+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX6870ETJ+T reliable?
The price and inventory of MAX6870ETJ+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX6870ETJ+T is usually 5 days.
3.What payment methods are accepted for MAX6870ETJ+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX6870ETJ+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX6870ETJ+T?
MAX6870ETJ+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX6870ETJ+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX6870ETJ+T?
For technical support, including MAX6870ETJ+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX6870ETJ+T requirements.
6.How does Aetrix verify that MAX6870ETJ+T is sourced from the original manufacturer or authorized distributors?
All MAX6870ETJ+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX6870ETJ+T meets industry standards.
7.What is the process for return or replacement of MAX6870ETJ+T?
All MAX6870ETJ+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX6870ETJ+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX6870ETJ+T part is unused and in its original packaging.
Return procedure for MAX6870ETJ+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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