Analog Devices Inc./Maxim Integrated MAX6878ETG+
- Part No.:
- MAX6878ETG+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
MAX6878ETG+.pdf
- Description:
- IC SUPERVISOR 2 CHANNEL 24TQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MAX6878ETG+ from Maxim Integrated is a triple-voltage power-supply tracker/sequencer/supervisor that monitors IN1, IN2, and IN3 (0.5V–5.5V), controls three external n-channel FETs via GATE1–GATE3, enforces ±125mV tracking accuracy during ramp-up/down, supports capacitor-adjustable slew rate (via SLEW pin), and delivers a programmable power-good timeout (via TIMEOUT pin) for system reset coordination in multivoltage server and telecom power rails.
For engineers reviewing the MAX6878ETG+ datasheet, MAX6878ETG+ pinout, MAX6878ETG+ application, or MAX6878ETG+ equivalent, this device is selected when precise voltage tracking across three supplies-such as 3.3V, 1.8V, and 0.7V-is required with fault detection, autoretry/latch-off mode selection, and internal charge-pump-driven gate drive for low RDS(on) enhancement of external FETs.
Technical Context
The MAX6878ETG+ implements independent comparator-based tracking control per channel, comparing each OUT_ against a shared internal ramp generator while simultaneously monitoring differential deviation (±125mV tracking window, ±250mV fault threshold). Its TRK/SEQ pin selects between simultaneous tracking (low) or sequential turn-on (high/unconnected), with DELAY and SLEW pins enabling capacitor-programmed startup delay and slew-rate control respectively.
It integrates three independent charge pumps (one per GATE output) to boost GATE voltage to VINx + 5V, ensuring full enhancement of low-threshold n-channel FETs even at sub-1V input rails. The FAULT output asserts low on tracking violation or supply collapse, activating internal 100Ω pulldowns on all OUT_ pins to rapidly discharge capacitive loads.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Range | 2.7V to 5.5V on VCC or any IN_; enables operation across wide-input multirail systems |
| Tracking Accuracy | ±125mV max differential between each OUT_ and reference ramp during power-up/down |
| Fault Detection Threshold | ±250mV differential violation triggers immediate FAULT assertion and simultaneous 100Ω pulldown on all OUT_ |
| GATE Drive Voltage | VINx + 5V (via internal charge pump), ensuring full n-FET enhancement down to 0.5V IN_ rails |
| Power-Good Timeout | Capacitor-adjustable (200µs + 500kΩ × CTIMEOUT); used for synchronized system reset after successful sequencing |
| SET Input Threshold | 0.5V ±1.25% over -40°C to +85°C; sets undervoltage lockout for each IN_ via resistor divider |
| EN/UV Threshold | 1.22V to 1.28V (rising/falling); enables logic-enable or external UVLO monitoring with hysteresis |
Pinout & Package
MAX6878ETG+ uses a 4mm × 4mm 24-pin thin QFN package with exposed paddle (EP) connected to GND. Pin count and layout match the MAX6877/MAX6879 family but differ functionally at PIN 10 (TIMEOUT present), PIN 14 (PG/RST present), and absence of SET3 (PIN 3), confirming MAX6878-specific dual-tracking + PG/RST capability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC (PIN 1) | Optional auxiliary supply input | Enables tracking of IN_ voltages below 2.7V by powering internal circuitry independently |
| ABP (PIN 2) | Analog supply bypass | Maintains stable internal bias during rapid power transitions; requires 1µF ceramic to GND |
| SET2 (PIN 4), SET1 (PIN 5) | Undervoltage threshold programming inputs | Set IN2/IN1 UVLO thresholds via resistor dividers; must exceed 0.5V to enable respective channel |
| EN/UV (PIN 6) | Enable or UVLO monitor input | Starts tracking/sequencing when >1.25V; initiates controlled shutdown when <1.22V |
| DELAY (PIN 8) | Startup/inter-sequence delay timing | Capacitor-to-GND sets delay: 200µs + 500kΩ × CDELAY; default = 200µs if unconnected |
| SLEW (PIN 9) | Ramp slew-rate control | Capacitor-to-GND sets slew rate accuracy: ±15% base, ±50% over full ABP range |
| TIMEOUT (PIN 10) | PG/RST timeout period adjustment | Capacitor-to-GND sets timeout: 200µs + 500kΩ × CTIMEOUT; default = 200µs if unconnected |
| LTCH/RTR (PIN 11) | Latch-off vs. autoretry mode select | Low = latch-off on fault; open/ABP = autoretry with capacitor-timed retry interval |
| TRK/SEQ (PIN 12) | Tracking vs. sequencing mode select | Low = simultaneous tracking; open/ABP = sequential turn-on (OUT1→OUT2→OUT3) |
| MARGIN (PIN 13) | Active-low margin test enable | Pulls OUT_ down to test supply regulation margin without disabling supervision |
| PG/RST (PIN 14) | Open-drain power-good/reset output | Asserts high after TIMEOUT only when all OUT_ exceed 92.5% of respective IN_ |
| FAULT (PIN 15) | Open-drain fault alert output | Asserts low on tracking violation (>±250mV), supply collapse, or timeout failure |
| OUT3 (PIN 16) | Channel 3 monitored output voltage | Connected to source of external n-FET; pulled to GND via 100Ω on FAULT |
| GATE3 (PIN 17) | Gate drive for external n-FET (channel 3) | Charge-pumped to VIN3 + 5V; drives FET gate to ensure low RDS(on) |
| OUT2 (PIN 18) | Channel 2 monitored output voltage | Connected to source of external n-FET; pulled to GND via 100Ω on FAULT |
| GATE2 (PIN 19) | Gate drive for external n-FET (channel 2) | Charge-pumped to VIN2 + 5V; ensures full enhancement at low input voltages |
| OUT1 (PIN 20) | Channel 1 monitored output voltage | Connected to source of external n-FET; pulled to GND via 100Ω on FAULT |
| GATE1 (PIN 21) | Gate drive for external n-FET (channel 1) | Charge-pumped to VIN1 + 5V; supports sub-1V rail tracking with minimal dropout |
| IN2 (PIN 23) | Input voltage monitor (channel 2) | Monitored against SET2; must be ≥2.7V or powered via VCC for full functionality |
| IN1 (PIN 24) | Input voltage monitor (channel 1) | Primary enable path; highest of IN1/IN2/IN3/VCC powers internal circuitry |
| EP | Exposed thermal paddle | Must be soldered to PCB GND plane for thermal dissipation and EMI reduction |
Key Features
| Feature | Design Value |
|---|---|
| Capacitor-adjustable slew rate | Enables precise control of voltage ramp time across all three outputs using single SLEW pin capacitor |
| Independent per-channel charge pumps | Delivers VINx + 5V gate drive to fully enhance low-VTH n-channel FETs, minimizing conduction loss |
| Programmable power-good timeout | Allows system designers to align reset assertion timing with downstream load stabilization requirements |
| 100Ω internal pulldown on all OUT_ pins | Ensures rapid discharge of large capacitive loads during fault or shutdown, preventing hold-up voltage issues |
| Adjustable undervoltage lockout per input | Supports custom UVLO thresholds for each rail via SET1/SET2 resistive dividers, enabling mixed-voltage flexibility |
Applications
| Server Power Sequencing | Telecom Line Card Supervision |
|---|---|
|
Use Scenario: Coordinating power-up of CPU core (0.85V), I/O (1.8V), and memory (1.2V) rails in enterprise servers. IC Role / Device Role / Timing Role: Acts as master sequencer enforcing strict voltage ordering and ramp alignment to prevent latch-up or inrush damage. Use Value: Eliminates need for discrete RC timing networks and manual firmware sequencing, reducing BOM count and boot-time variability. |
Use Scenario: Managing dual 3.3V and 12V supplies powering DSPs, PHYs, and analog front-ends in carrier-grade line cards. IC Role / Device Role / Timing Role: Provides simultaneous tracking of 3.3V rails while sequencing 12V bias before analog sections activate. Use Value: Guarantees ±125mV tracking tolerance during hot-swap events, preventing data corruption during field upgrades. |
| Network Switch ASIC Power Management | Industrial PLC Multirail Control |
|
Use Scenario: Controlling 0.7V core, 1.0V I/O, and 2.5V SerDes supplies for high-speed switch ASICs with tight voltage margins. IC Role / Device Role / Timing Role: Functions as precision tracker with fault-triggered 100Ω pulldown to safely collapse all rails within 10µs on brownout detection. Use Value: Prevents ASIC latch-up by maintaining <125mV inter-rail skew during dynamic load transients up to 10A/µs. |
Use Scenario: Supervising isolated 24V, 5V, and 3.3V rails powering microcontrollers, analog sensors, and relay drivers in factory automation PLCs. IC Role / Device Role / Timing Role: Serves as robust supervisor with latch-off mode (LTCH/RTR = low) to prevent uncontrolled retries during persistent overvoltage faults. Use Value: Meets IEC 61000-4-4 immunity requirements by rejecting >300ns transients on EN/UV and SET inputs without false triggering. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power-supply tracking and sequencing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6877ETG+ | Lacks TIMEOUT pin and PG/RST output; no programmable power-good timeout or reset assertion | Suitable only where system reset timing is handled externally or not required | Select MAX6877ETG+ only when PG/RST functionality is unnecessary and cost minimization is critical |
| MAX6879ETG+ | Includes SET3 pin and supports full triple-input tracking; lacks PG/RST and TIMEOUT pins | Required when all three rails (IN1/IN2/IN3) must be actively supervised with individual UVLO thresholds | Choose MAX6879ETG+ when third rail tracking is mandatory and power-good signaling is managed elsewhere |
Compared with MAX6877ETG+ and MAX6879ETG+, the MAX6878ETG+ uniquely balances dual-input tracking capability (SET1/SET2) with integrated PG/RST and TIMEOUT programmability-making it optimal for systems needing reliable reset coordination without third-rail complexity.
Availability
MAX6878ETG+ is available at Aetrix Electronics and suitable for server power sequencing, telecom line card supervision, network switch ASIC power management, and industrial PLC multirail control requiring stable component supply and long-term lifecycle support.
Supply support for MAX6878ETG+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for power management, sensing, and interface applications in industrial, communications, and computing markets.
The MAX6877/MAX6878/MAX6879 product line targets multivoltage digital systems requiring deterministic power-up/down behavior-specifically engineered for servers, storage, and telecom infrastructure where rail coordination prevents functional failure.
FAQ
What is the maximum number of voltage rails the MAX6878ETG+ can supervise?
The MAX6878ETG+ supervises up to two primary input rails (IN1 and IN2) with dedicated SET1 and SET2 pins for independent undervoltage threshold configuration. While IN3 is physically present on the 24-pin QFN package, the MAX6878ETG+ does not include a SET3 pin or associated internal circuitry-confirming its design as a dual-input tracker/sequencer. This distinguishes it from the MAX6879ETG+, which supports full triple-input operation.
Does the MAX6878ETG+ support both tracking and sequencing modes?
Yes, the MAX6878ETG+ supports both modes via the TRK/SEQ pin: driving it low enables simultaneous voltage tracking across all enabled outputs, while connecting it to ABP (or leaving it open) configures the device for sequential power-up (OUT1 → OUT2 → OUT3) with capacitor-adjustable inter-step delay via the DELAY pin. Power-down always follows tracking behavior regardless of mode selection.
How does the MAX6878ETG+ handle fault conditions during power-up?
During power-up, the MAX6878ETG+ continuously compares each OUT_ voltage against an internal reference ramp. If any OUT_ deviates by more than ±250mV from the ramp, the FAULT pin asserts low, all GATE outputs are disabled, and internal 100Ω pulldowns on OUT1–OUT3 rapidly discharge connected capacitance. This action terminates the power-up sequence and prevents downstream damage from uncontrolled rail collapse.
What is the role of the ABP pin on the MAX6878ETG+?
The ABP pin on the MAX6878ETG+ serves as the internal analog supply bypass node, powered by the highest voltage among IN1, IN2, IN3, or VCC. It must be decoupled to GND with a 1µF ceramic capacitor placed adjacent to the package. ABP maintains stable internal bias during fast power transitions and enables tracking of IN_ voltages below 2.7V when VCC is used-but it must never be used to power external circuitry.
Can the MAX6878ETG+ drive n-channel MOSFETs with input rails below 1V?
Yes, the MAX6878ETG+ can drive n-channel MOSFETs with input rails as low as 0.5V thanks to its integrated charge pumps. Each GATE output (GATE1–GATE3) is boosted to VINx + 5V, ensuring sufficient gate-source voltage (VGS) to fully enhance low-threshold n-FETs-even when IN1, IN2, or IN3 operate near 0.7V. This capability enables efficient, low-dropout regulation in modern sub-1V digital systems.
MAX6878ETG+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Sequencer
- Number of Voltages Monitored:
- 2
- Voltage - Threshold:
- Adjustable/Selectable
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- Adjustable/Selectable
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TQFN (4x4)
MAX6878ETG+ FAQ
1.How can I place an order for MAX6878ETG+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX6878ETG+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX6878ETG+ reliable?
The price and inventory of MAX6878ETG+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX6878ETG+ is usually 5 days.
3.What payment methods are accepted for MAX6878ETG+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX6878ETG+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX6878ETG+?
MAX6878ETG+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX6878ETG+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX6878ETG+?
For technical support, including MAX6878ETG+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX6878ETG+ requirements.
6.How does Aetrix verify that MAX6878ETG+ is sourced from the original manufacturer or authorized distributors?
All MAX6878ETG+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX6878ETG+ meets industry standards.
7.What is the process for return or replacement of MAX6878ETG+?
All MAX6878ETG+ units undergo pre-shipment inspection (PSI). If there is an issue with MAX6878ETG+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX6878ETG+ part is unused and in its original packaging.
Return procedure for MAX6878ETG+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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