My Inquiry
My Account
Analog Devices Inc./Maxim Integrated MAX6885ETP+
- Part No.:
- MAX6885ETP+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 20-WQFN Exposed Pad
- Datasheet:
-
MAX6885ETP+.pdf
- Description:
- IC SUPERVISOR 6 CHANNEL 20TQFN
- Quantity:
- Payment:
- Shipping:
Inventory:440
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
The MAX6885ETP+ from Maxim Integrated is an EEPROM-configurable hex power-supply supervisory IC that monitors six voltage-detector inputs (IN1–IN6), one watchdog input (WDI), and features three programmable active-low outputs (RESET, UV/OV, WDO) with 25µs–1600ms timing delays. It supports programmable undervoltage/overvoltage thresholds from 0.5V to 3.05V (10mV steps) or 1V to 5.8V (20mV steps), ±1% threshold accuracy, and operates over –40°C to +85°C in a 20-pin thin QFN package. It is used in multimicroprocessor server power monitoring systems requiring flexible fault logging and SMBus/I²C reconfiguration.
For engineers reviewing the MAX6885ETP+ datasheet, MAX6885ETP+ pinout, MAX6885ETP+ application, or MAX6885ETP+ equivalent, this page delivers verified technical context, confirmed pin functions, real-world use cases in telecom and storage equipment, and validated alternative parts - all grounded in Maxim's official documentation for reliable selection and integration.
Technical Context
The MAX6885ETP+ implements six independent voltage comparators with dual-threshold (primary UV + secondary UV/OV) per input, each configurable via internal EEPROM. Its digital logic block processes assertion events from IN1–IN6, MR, and WDI, then routes them through programmable timing delay blocks before driving RESET, UV/OV, or WDO outputs in open-drain or weak-pullup mode.
It uses an SMBus/I²C-compatible serial interface (SDA/SCL/A0) for configuration, fault register readback, and user EEPROM access. Unlike the MAX6884ETP+, it omits the 10-bit ADC, auxiliary input (AUXIN), external reference input (REFIN), and internal 1.25V reference - confirming its role as a pure supervisory controller without analog telemetry capability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Input Range | Powered from highest of IN1–IN4 (2.7V–5.8V) or VCC (2.7V–5.5V); no internal ADC or AUXIN support |
| Voltage-Detector Inputs | 6 independent inputs (IN1–IN6); each supports primary UV + secondary UV/OV thresholds |
| Threshold Ranges | 0.5V–3.05V (10mV steps) or 1V–5.8V (20mV steps); ±1% accuracy over –40°C to +85°C |
| Programmable Outputs | 3 active-low outputs (RESET, UV/OV, WDO); configurable as open-drain or weak pullup (6.6–15kΩ) |
| Timing Delay Range | 25µs to 1600ms per output; selectable via EEPROM programming of timeout registers |
| Watchdog Timeout | Configurable initial/normal periods: 6.25ms, 25ms, 100ms, 400ms, 1.6s, 6.4s, 25.6s, or 102.4s |
| Operating Temperature | –40°C to +85°C; qualified for industrial and telecom infrastructure environments |
Pinout & Package
MAX6885ETP+ is housed in a 5mm × 5mm × 0.8mm 20-pin thin QFN package (T2055-5) with exposed paddle (EP) internally connected to GND. Pin assignments are identical to MAX6884ETP+ except pins 11 (REFIN) and 12 (AUXIN) are No Connect (N.C.) - confirmed by Maxim's Pin Description table and Selector Guide.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (RESET) | Programmable reset output | Active-low; open-drain or weak pullup; asserts on INx/MR/WDO faults with configurable delay |
| 2 (WDO) | Watchdog timer output | Asserts if WDI not toggled within programmed timeout; drives system reset or interrupt |
| 3 (UV/OV) | Undervoltage/overvoltage indicator | Active-low output triggered by any INx threshold violation; independently delay-programmable |
| 4 (GND) | Ground reference | Primary return path for analog/digital circuitry and bypass capacitors (VCC/DBP) |
| 5 (WDI) | Watchdog input | Logic input requiring periodic high/low transition; internally pulled down (10µA) |
| 6 (MR) | Manual reset input | Active-low; asserts RESET/UV/OV when driven low; internally pulled up to DBP (10µA) |
| 7 (MARGIN) | Margin disable control | Holds outputs in current state when low; overrides MR if both asserted; internally pulled up |
| 8 (SDA) | SMBus/I²C data line | Open-drain bidirectional serial interface; requires external pullup resistor |
| 9 (SCL) | SMBus/I²C clock | Input-only clock line; requires external pullup resistor; supports 400kHz max frequency |
| 10 (A0) | Device address bit | Allows two devices on same bus; connect to GND or VDD to set LSB of 7-bit address |
| 11, 12 (N.C.) | No connection | Not internally bonded; must be left floating or tied to GND per layout best practice |
| 13 (VCC) | Analog supply input | Bypassed with 1µF ceramic; powered from highest IN1–IN4 or external source; not for external loads |
| 14 (DBP) | Digital supply output | 2.55V LDO output powering logic/EEPROM; bypassed with 1µF ceramic; not for external loads |
| 15–20 (IN6–IN1) | Voltage-monitoring inputs | High-impedance (≥130kΩ) detector inputs; each supports dual-threshold programming |
| EP | Exposed thermal pad | Internally connected to GND; improves thermal performance and EMI; recommended soldered to PCB ground plane |
Key Features
| Feature | Design Value |
|---|---|
| 6 independent voltage detectors | Each with programmable primary undervoltage and secondary undervoltage/overvoltage thresholds - enables simultaneous monitoring of multiple rails in complex power systems |
| Three fully configurable outputs | RESET, UV/OV, and WDO each support open-drain or weak pullup drive and 25µs–1600ms deassertion delay - eliminates need for external RC timing networks |
| SMBus/I²C configuration interface | 7-bit address (A0-selectable), 400kHz operation, and EEPROM-based nonvolatile setup - allows field updates and BOM consolidation across variants |
| Fault event logging | Dedicated fault register records cause of each RESET/UV/OV/WDO assertion (e.g., IN3 UV, MR, WDI timeout) - accelerates root-cause analysis during system debug |
| Margin disable and manual reset | MARGIN pin holds outputs stable during voltage margining tests; MR provides hardware-initiated reset independent of monitored rails - supports production test and recovery workflows |
Applications
| Telecom Power Monitoring | Server Voltage Sequencing |
|---|---|
Use Scenario: Real-time supervision of +3.3V, +5V, +12V, and -48V DC distribution in central-office line cards and optical transport units. IC Role / Device Role / Timing Role: Supervisory controller detecting undervoltage/overvoltage faults across six independent rails and triggering system-level resets or alarms via RESET/UV/OV outputs. Use Value: Prevents catastrophic failure in carrier-grade equipment by asserting reset before downstream logic operates outside spec - enabled by ±1% threshold accuracy and 20mV resolution. | Use Scenario: Coordinating power-up/down sequencing and health validation across CPU, memory, and I/O voltage rails in dual-socket servers. IC Role / Device Role / Timing Role: Centralized supervisor using IN1–IN6 to monitor VRM outputs and WDI to confirm firmware liveness; generates timed RESET pulses to synchronize boot. Use Value: Eliminates discrete supervisor ICs per rail - reduces BOM count and PCB area while enabling dynamic reconfiguration via SMBus during BIOS updates. |
| Storage Controller Health | Industrial Multimicroprocessor Systems |
Use Scenario: Monitoring +1.8V, +3.3V, +5V, and +12V supplies feeding SAS/SATA controllers, NVMe SSDs, and RAID ASICs in enterprise storage enclosures. IC Role / Device Role / Timing Role: Fault-detection hub logging undervoltage events per rail into internal fault register and signaling critical failures via UV/OV to baseboard management controller (BMC). Use Value: Enables predictive maintenance by correlating repeated INx threshold violations with drive failure logs - supported by nonvolatile fault history and I²C accessibility. | Use Scenario: Ensuring coordinated reset behavior across ARM Cortex-A, FPGA, and DSP subsystems in programmable logic controllers (PLCs) and motor drives. IC Role / Device Role / Timing Role: Single-point reset arbiter using MR for emergency halt, MARGIN for safe-mode entry, and programmable delays to stagger subsystem initialization. Use Value: Guarantees deterministic startup order and fail-safe shutdown - achieved via independent timing blocks per output and priority-based MARGIN override of MR. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power-supply supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6884ETP+ | Includes 10-bit ADC, AUXIN, REFIN, and internal 1.25V reference; identical pinout and supervisory core | Required where analog telemetry (e.g., rail voltage logging) is needed alongside supervision | Select MAX6884ETP+ only if ADC functionality is essential; MAX6885ETP+ offers lower cost and reduced feature set for pure supervision |
| TPS386000RGPT | 6-input supervisor with 0.5% threshold accuracy, fixed 200ms reset timeout, no EEPROM or I²C interface | Suitable for cost-sensitive, static-configuration designs without reprogrammability or fault logging | Choose TPS386000RGPT for simpler, lower-risk deployments; MAX6885ETP+ preferred when field updates or detailed fault diagnostics are required |
Compared with MAX6884ETP+, the MAX6885ETP+ removes ADC telemetry but retains full EEPROM configurability, SMBus interface, and fault logging - making it optimal for supervision-dominant systems. Versus TPS386000RGPT, it trades fixed timing for programmable delays and adds nonvolatile fault history, justifying its use in complex, serviceable infrastructure.
Availability
MAX6885ETP+ is available at Aetrix Electronics and suitable for telecommunications infrastructure, enterprise storage equipment, and industrial multimicroprocessor systems requiring stable component supply, long-term lifecycle support, and field-reconfigurable supervision logic.
Supply support for MAX6885ETP+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power-management ICs for demanding industrial, automotive, and communications applications.
The MAX6885ETP+ belongs to Maxim's EEPROM-programmable supervisory product line, engineered specifically for complex, multi-rail power monitoring in telecom and server platforms where flexibility, reliability, and diagnostic capability are critical.
FAQ
What is the primary function of the MAX6885ETP+ in a power system?
The MAX6885ETP+ serves as a configurable hex voltage supervisor that monitors six independent power rails for undervoltage and overvoltage conditions, triggers programmable reset or interrupt signals (RESET, UV/OV, WDO), and logs fault causes in a nonvolatile register. Its core function is ensuring system reliability by enforcing precise voltage thresholds and providing deterministic response timing - all without requiring external components for configuration or timing.
Does the MAX6885ETP+ include an analog-to-digital converter (ADC)?
No, the MAX6885ETP+ does not include an ADC. The ADC is exclusive to the MAX6884ETP+ variant, as confirmed in Maxim's Selector Guide and Pin Description tables - where pins 11 (REFIN) and 12 (AUXIN) are designated N.C. for MAX6885ETP+. This omission simplifies the device for pure supervision tasks and reduces cost versus the ADC-equipped sibling.
How are the voltage thresholds programmed on the MAX6885ETP+?
Voltage thresholds on the MAX6885ETP+ are programmed nonvolatively via its SMBus/I²C interface into internal EEPROM registers. Each of the six inputs (IN1–IN6) supports two thresholds - primary undervoltage and secondary undervoltage/overvoltage - selectable in either 0.5V–3.05V range (10mV steps) or 1V–5.8V range (20mV steps), with ±1% accuracy guaranteed over temperature.
What is the purpose of the MARGIN pin on the MAX6885ETP+?
The MARGIN pin on the MAX6885ETP+ forces RESET, UV/OV, and WDO outputs to hold their current asserted or deasserted state when driven low - effectively freezing supervision behavior during voltage margining tests. It overrides the MR input if both are active simultaneously, and is internally pulled up to DBP (2.55V) with a 10µA current source when unused.
Can the MAX6885ETP+ be powered from multiple input rails simultaneously?
Yes, the MAX6885ETP+ can be powered from the highest of IN1–IN4 inputs using an internal virtual diode-ORing architecture. One of IN1–IN4 must be ≥2.7V for full operation. Alternatively, it can be powered externally via VCC (2.7V–5.5V), provided VCC is brought up first and is ≥200mV higher than any IN1–IN4 voltage - as specified in the "Powering the MAX6884/MAX6885" section.
MAX6885ETP+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 20-WQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 6
- Voltage - Threshold:
- 6 Selectable Threshold Combinations
- Output:
- Open Drain, Push-Pull
- Reset:
- Active High/Active Low
- Reset Timeout:
- Adjustable/Selectable
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-TQFN (5x5)
MAX6885ETP+ FAQ
1.How can I place an order for MAX6885ETP+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX6885ETP+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX6885ETP+ reliable?
The price and inventory of MAX6885ETP+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX6885ETP+ is usually 5 days.
3.What payment methods are accepted for MAX6885ETP+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX6885ETP+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX6885ETP+?
MAX6885ETP+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX6885ETP+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX6885ETP+?
For technical support, including MAX6885ETP+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX6885ETP+ requirements.
6.How does Aetrix verify that MAX6885ETP+ is sourced from the original manufacturer or authorized distributors?
All MAX6885ETP+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX6885ETP+ meets industry standards.
7.What is the process for return or replacement of MAX6885ETP+?
All MAX6885ETP+ units undergo pre-shipment inspection (PSI). If there is an issue with MAX6885ETP+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX6885ETP+ part is unused and in its original packaging.
Return procedure for MAX6885ETP+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX6885ETP+ Tags
-
MIC826SYMT-TR
Microchip Technology
-
APX803S-31SA-7
Diodes Incorporated
-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments
-
V6340RSP3B+
EM Microelectronic
-
EM6325CXSP5B-2.9+
EM Microelectronic
-
MCP120T-300I/TT
Microchip Technology
-
MCP130T-315I/TT
Microchip Technology
-
MCP120T-475I/TT
Microchip Technology
-
MCP111T-300E/TT
Microchip Technology
-
MCP120T-315I/TT
Microchip Technology
-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
