Analog Devices Inc./Maxim Integrated MAX6887FETE+T
- Part No.:
- MAX6887FETE+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 16-WQFN Exposed Pad
- Datasheet:
-
MAX6887FETE+T.pdf
- Description:
- IC SUPERVISOR 6 CHANNEL 16TQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MAX6887FETE+T from Maxim Integrated is a hex-voltage supervisory IC with six factory-set undervoltage/overvoltage detector inputs, active-low open-drain RESET/OV/WDO outputs, 1% threshold accuracy, and dual-mode watchdog timer (102.4s initial / 1.6s normal timeout). It monitors 3.3V, 2.5V, and 1.5V supplies in multivoltage telecom and server power systems.
For engineers reviewing the MAX6887FETE+T datasheet, MAX6887FETE+T pinout, MAX6887FETE+T application, or MAX6887FETE+T equivalent, key selection factors include its 16-pin thin QFN package, -40°C to +85°C operation, 200ms reset timeout, adjustable input support via external dividers, and integrated margin disable functionality for system-level testing.
Technical Context
The MAX6887FETE+T implements six independent voltage detectors with matched undervoltage and overvoltage thresholds-factory-set to 3.060V UV / 3.540V OV on IN1, 2.310V UV / 2.680V OV on IN2, and 1.390V UV / 1.610V OV on IN3-with remaining inputs (IN4–IN6) configured as adjustable (0.557V UV / 0.643V OV base). Its virtual diode-OR power architecture selects the highest of IN1–IN4 (≥2.7V) to supply internal circuitry.
It integrates a dual-phase watchdog timer with 102.4s initial timeout for µP initialization and 1.6s normal timeout for runtime monitoring, where WDO assertion triggers RESET when connected to MR. All three outputs (RESET, OV, WDO) are active-low open-drain with 0.4V max VOL at 4mA sink and 1µA max leakage in high-Z state.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2.7V to 5.8V on any IN1–IN4 or VCC; powers internal logic via highest monitored rail |
| Threshold Accuracy | ±1% over -40°C to +85°C; ensures precise trip points for 3.3V/2.5V/1.5V supply validation |
| Reset Timeout Period | 180–220ms; guarantees stable processor reset hold time after fault clearance |
| Watchdog Timeout | 102.4s (initial), 1.6s (normal); supports boot-time initialization and runtime stall detection |
| Output Drive Strength | 4mA sink capability at RESET/OV/WDO; enables direct interface to standard logic pullups |
| Input Impedance | 130–300kΩ on IN1–IN4; minimizes loading on monitored power rails |
| Operating Temperature | -40°C to +85°C; qualified for industrial-grade telecom and server environments |
Pinout & Package
MAX6887FETE+T is housed in a 5mm × 5mm × 0.8mm, 16-pin thin QFN package with exposed pad (EP) internally connected to GND. The package supports high-density PCB layouts and efficient thermal dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: RESET | Active-low open-drain reset output | Asserts when any input falls below UV threshold or MR is pulled low; remains low 200ms after fault clearance |
| 2: WDO | Active-low open-drain watchdog output | Asserts if WDI lacks valid edge within timeout; connects to MR to auto-generate resets on µP stall |
| 3: OV | Active-low open-drain overvoltage output | Asserts when any input exceeds OV threshold; stays low 25µs after all OV conditions clear |
| 4: GND | Ground reference | Primary return path for analog/digital circuitry and EP connection point |
| 5: MR | Manual reset input | Pull low to force RESET; internally pulled up to BP (10µA); rejects <100ns glitches |
| 6: MARGIN | Margin disable control | Pull low to freeze RESET/OV/WDO state during supply margining tests; overrides MR if both asserted |
| 7: WDI | Watchdog timer input | Edge-triggered (H→L or L→H); internal 10µA pulldown ensures safe default on startup |
| 8: I.C. | Internal connection | No external connection required; unused internal node |
| 9: VCC | Internal power-supply voltage | Internally derived from highest IN1–IN4; bypass with 1µF ceramic cap; not for external powering |
| 10: BP | Bypass voltage reference | +2.55V internal supply for logic; bypass with 1µF ceramic cap; not for external powering |
| 11: IN6 | Voltage detector input 6 | Adjustable UV/OV threshold (0.557V/0.643V base); requires 0.1µF bypass to GND |
| 12: IN5 | Voltage detector input 5 | Adjustable UV/OV threshold (0.557V/0.643V base); requires 0.1µF bypass to GND |
| 13: IN4 | Voltage detector input 4 | Adjustable UV/OV threshold (0.557V/0.643V base); powers device if ≥2.7V |
| 14: IN3 | Voltage detector input 3 | Factory-set to 1.390V UV / 1.610V OV; monitors 1.5V rail; requires 0.1µF bypass |
| 15: IN2 | Voltage detector input 2 | Factory-set to 2.310V UV / 2.680V OV; monitors 2.5V rail; requires 0.1µF bypass |
| 16: IN1 | Voltage detector input 1 | Factory-set to 3.060V UV / 3.540V OV; monitors 3.3V rail; powers device if ≥2.7V |
Key Features
| Feature | Design Value |
|---|---|
| Hex voltage detection | Simultaneously monitors six rails-including three factory-set (3.3V/2.5V/1.5V) and three adjustable-reducing component count in complex power systems |
| ±1% threshold accuracy | Ensures reliable trip points across temperature, eliminating need for calibration in telecom/server BOMs |
| Dual-mode watchdog timer | 102.4s initial timeout accommodates µP boot sequences; 1.6s normal timeout detects runtime hangs without false triggers |
| Margin disable input | Freezes supervisor outputs during supply stress testing, enabling safe validation of over/under-voltage margins |
| Open-drain outputs with 4mA sink | Directly interfaces with standard 3.3V/5V logic pullups and supports wired-OR configurations for system-level reset arbitration |
Applications
| Telecom Power Management | Server PSU Monitoring |
|---|---|
Use Scenario: Monitoring multiple DC-DC outputs (12V, 5V, 3.3V, 2.5V, 1.5V) in carrier-grade line cards with strict fault response timing. IC Role / Device Role / Timing Role: Centralized supervisory controller asserting RESET within 20µs of undervoltage detection and holding for 200ms to ensure clean µP reboot. Use Value: Eliminates discrete supervisors per rail, reducing board area by >40% while guaranteeing coordinated reset sequencing across mixed-voltage domains. | Use Scenario: Validating redundant 12V/5V/3.3V/1.8V/1.5V supplies in enterprise storage controllers under thermal stress. IC Role / Device Role / Timing Role: Simultaneous UV/OV detection on six rails with independent thresholds, plus watchdog supervision of host controller firmware execution. Use Value: Detects partial supply failures (e.g., 1.5V sag while 3.3V remains nominal) that would evade single-rail monitors, preventing data corruption. |
| Networking Switch Fabric | Industrial Edge Gateway |
Use Scenario: Ensuring power integrity across FPGA core (1.2V), I/O (2.5V), PHY (3.3V), and auxiliary (5V, 12V) rails in 10G Ethernet switches. IC Role / Device Role / Timing Role: Active-low open-drain RESET/OV/WDO outputs tied to FPGA configuration reset, interrupt, and system fault lines with programmable timing. Use Value: Prevents FPGA configuration lockup due to marginal 1.2V supply by triggering hard reset before configuration errors propagate. | Use Scenario: Supervising isolated 24V-to-5V/3.3V/1.5V conversion stages in DIN-rail mounted IoT gateways operating at -40°C. IC Role / Device Role / Timing Role: Hex-detector with -40°C to +85°C rating and 1% threshold stability, using MARGIN input to validate supply headroom during field calibration. Use Value: Enables in-situ margin testing without hardware modification-pulling MARGIN low freezes outputs while varying input voltage to verify trip margins. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power-supply supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6888FETE+T | Quad-input version (IN1–IN4 only); identical thresholds, watchdog, and timing specs; lacks IN5/IN6 pins | Suitable for designs with ≤4 monitored rails; smaller footprint not required since same 16-pin QFN package | Select when system has only four critical supplies to monitor-reduces pin count complexity without sacrificing timing or accuracy |
| TPS3808G33DBVR | Single-channel 3.3V supervisor; no watchdog; 200ms reset timeout; SOT-23-6 package; ±2% threshold accuracy | Limited to one rail; no multi-rail coordination or watchdog capability; lower integration level | Choose only for simple 3.3V-only monitoring where cost-per-rail is prioritized over system-level supervision features |
Compared with MAX6888FETE+T, the MAX6887FETE+T adds two adjustable detector inputs for expanded rail coverage, while TPS3808G33DBVR offers lower cost for single-rail use but lacks coordinated multi-rail response, watchdog, and margin disable-making it unsuitable for telecom/server applications requiring holistic power health assessment.
Availability
MAX6887FETE+T is available at Aetrix Electronics and suitable for telecom infrastructure, server power management, and networking equipment requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for MAX6887FETE+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for demanding industrial, communications, and computing applications.
The MAX6887/MAX6888 product line delivers multivoltage supervisory solutions with integrated watchdog and margining for high-reliability power systems in telecom, servers, and networking gear.
FAQ
What are the factory-set undervoltage and overvoltage thresholds for MAX6887FETE+T?
The MAX6887FETE+T has factory-set thresholds of 3.060V UV / 3.540V OV on IN1 (3.3V rail), 2.310V UV / 2.680V OV on IN2 (2.5V rail), and 1.390V UV / 1.610V OV on IN3 (1.5V rail). Inputs IN4–IN6 are adjustable with base thresholds of 0.557V UV / 0.643V OV, configurable via external resistor dividers. These values are specified in Table 1 of the MAX6887 datasheet and confirmed for the FETE variant.
How does the watchdog timer function in MAX6887FETE+T, and what are its timeout periods?
The MAX6887FETE+T watchdog timer features an initial timeout of 102.4s for µP initialization and a normal timeout of 1.6s for runtime monitoring. It triggers WDO assertion if WDI lacks a valid edge transition within the active period. WDO can be connected to MR to automatically generate a RESET pulse (~5µs), which clears the watchdog and initiates the 200ms reset timeout. This dual-mode behavior is intrinsic to the MAX6887FETE+T design.
Can MAX6887FETE+T monitor more than three fixed-voltage rails?
Yes-the MAX6887FETE+T monitors six voltage inputs: IN1–IN3 are factory-set to 3.3V/2.5V/1.5V rails, while IN4–IN6 are adjustable inputs supporting user-defined thresholds down to 0.557V UV. Each input independently detects both undervoltage and overvoltage conditions, enabling comprehensive coverage of complex multirail systems without external components beyond optional bypass capacitors.
What is the purpose of the MARGIN input on MAX6887FETE+T, and how does it interact with MR?
The MARGIN input on MAX6887FETE+T holds RESET, OV, and WDO in their current state during system-level supply margining tests-allowing engineers to deliberately stress voltages while observing supervisor behavior. When MARGIN is pulled low, it overrides MR if both are asserted simultaneously, ensuring test mode takes precedence. This function is explicitly documented for the MAX6887FETE+T in the "Margin Output Disable" section of the datasheet.
What package type and thermal characteristics does MAX6887FETE+T use?
MAX6887FETE+T uses a 5mm × 5mm × 0.8mm, 16-pin thin QFN package with exposed pad (EP) connected to GND. Its continuous power dissipation is 1667mW at +70°C, derating by 20.8mW/°C above that temperature. The maximum junction temperature is +150°C, and it operates across -40°C to +85°C-fully compliant with industrial and telecom thermal requirements as specified in the MAX6887 datasheet.
MAX6887FETE+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 16-WQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 6
- Voltage - Threshold:
- 6 Selectable Threshold Combinations
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 180ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TQFN (5x5)
MAX6887FETE+T FAQ
1.How can I place an order for MAX6887FETE+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX6887FETE+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX6887FETE+T reliable?
The price and inventory of MAX6887FETE+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX6887FETE+T is usually 5 days.
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Once your MAX6887FETE+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX6887FETE+T?
For technical support, including MAX6887FETE+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX6887FETE+T requirements.
6.How does Aetrix verify that MAX6887FETE+T is sourced from the original manufacturer or authorized distributors?
All MAX6887FETE+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX6887FETE+T meets industry standards.
7.What is the process for return or replacement of MAX6887FETE+T?
All MAX6887FETE+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX6887FETE+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX6887FETE+T part is unused and in its original packaging.
Return procedure for MAX6887FETE+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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