Analog Devices Inc./Maxim Integrated MAX6892ETJ+

Overview

The MAX6892ETJ+ from Maxim Integrated is an octal voltage supervisor and power-supply sequencer with eight independent voltage detector inputs (IN1–IN8), ten open-drain outputs (PG1–PG8, RESET, WDO), ±1% threshold accuracy, 6.25ms PG timeout, and -40°C to +85°C operation. It monitors multivoltage rails in complex systems and asserts outputs when thresholds are violated, enabling controlled power-up sequencing for telecom and server applications.

For engineers reviewing the MAX6892ETJ+ datasheet, MAX6892ETJ+ pinout, MAX6892ETJ+ application, or MAX6892ETJ+ equivalent, key selection criteria include its 32-pin Thin QFN package, factory-set or capacitor-adjustable reset/watchdog timeouts, pin-selectable 5%/10% supply tolerances, and support for up to eight independent power-good signals with manual reset and margin disable control.

Technical Context

The MAX6892ETJ+ implements a logic-array-based supervision architecture with eight independent undervoltage detectors, each configurable via five TH0–TH4 inputs to select among 32 factory-set thresholds (e.g., 1.39V, 1.67V, 2.31V, 2.78V, 3.06V, 4.38V, 4.62V) with ±1% accuracy and 0.3% hysteresis. Threshold tolerance (5% or 10%) is determined by TH4 state.

It integrates dual timeout paths: a dedicated SRT pin for reset timeout adjustment (135–280ms with 47nF) and SWT for watchdog timeout (0.93–1.94s with 0.33µF), both supporting factory-default or capacitor-tuned operation. All PG outputs deassert after a fixed 6.25ms timeout, while RESET remains asserted for its full timeout period after fault clearance.

Key Specifications

Pinout & Package

MAX6892ETJ+ uses a 32-pin, 5mm × 5mm × 0.8mm Thin QFN package with exposed pad internally connected to GND. Pin 1 is PG2; pin 32 is PG1; pins 13–17 are TH0–TH4; pins 18–19 are SWT and SRT; pins 20–22 are ENABLE, VCC, DBP; pins 23–31 are IN8 through WDI; pins 4, 9, 10, 11, 12 are GND, RESET, WDO, MARGIN, MR.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar power-supply supervision applications.

Compared with MAX6893ETI+ and TPS3808G33DBVR, the MAX6892ETJ+ uniquely delivers eight independent voltage monitoring channels, capacitor-adjustable dual timeouts, and pin-selectable thresholds in a single 32-pin package - making it the only option for compact, high-channel-count power sequencing in telecom and server platforms.

Availability

MAX6892ETJ+ is available at Aetrix Electronics and suitable for telecom central office systems, server power sequencing, and base station RF front-end applications requiring stable component supply, long-term lifecycle support, and guaranteed industrial temperature range (-40°C to +85°C).

Supply support for MAX6892ETJ+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for demanding industrial, communications, and computing applications.

The MAX6892ETJ+ belongs to Maxim's power-supply sequencer/supervisor product line, engineered specifically for multivoltage system initialization, rail monitoring, and hardware-based fault recovery in high-reliability infrastructure equipment.

FAQ

What is the function of the TH0–TH4 pins on the MAX6892ETJ+?

The TH0–TH4 pins on the MAX6892ETJ+ are binary-coded logic inputs that select one of 32 factory-set voltage thresholds (e.g., 1.39V, 1.67V, 2.31V, 3.06V) and determine supply tolerance (5% or 10%, set by TH4). They must be tied to GND or DBP (2.55V) at power-up; no internal pullups or pulldowns exist. These pins define the trip points for all eight INx inputs simultaneously, enabling hardware-configurable supervision without firmware or external resistors.

How does the MAX6892ETJ+ handle power supply sourcing?

The MAX6892ETJ+ autonomously selects its power source from the highest voltage among IN2–IN5 (2.7V–5.5V) or an external VCC supply, using an internal virtual diode-ORing scheme. VCC is internally generated from that source and powers analog circuitry; DBP (2.55V) is separately regulated for digital logic and output stages. This eliminates need for external regulators and allows flexible powering - e.g., from a 3.3V rail or 5V bus - while maintaining operation across the full -40°C to +85°C range.

Can the MAX6892ETJ+ monitor voltages above 5.5V?

No, the MAX6892ETJ+ cannot directly monitor voltages above 5.5V on any INx pin, as its absolute maximum rating is +6V and operating range is limited to 2.7V–5.5V for IN2–IN5. To supervise higher rails (e.g., 12V or 48V), use an external resistor divider to scale the voltage down to within the 0.6V–5.5V detectable range - for example, a 10kΩ/1.5kΩ divider reduces 12V to ~1.57V, compatible with the 1.5V threshold option (selection #16 in Table 2).

What is the role of the DBP pin on the MAX6892ETJ+?

The DBP (Digital Bypass Voltage) pin on the MAX6892ETJ+ provides a regulated 2.55V supply for internal digital logic and open-drain output stages. It must be bypassed with a 1µF ceramic capacitor to GND. DBP is not intended to power external circuitry; doing so may destabilize internal logic timing and degrade PG/RESET/WDO output performance. Its internal current source also pulls up MR and MARGIN inputs, eliminating need for external bias resistors.

How does the watchdog timer operate on the MAX6892ETJ+?

The MAX6892ETJ+ watchdog timer has two modes: a long initial timeout (≥92.16s) after reset, and a short normal timeout (≥1.44s) after first valid WDI edge. It triggers WDO assertion if WDI remains static beyond the timeout. The timeout is selectable via SWT: connect to VCC for factory default, to GND to disable, or to GND via capacitor (e.g., 0.33µF) for adjustable period (0.93–1.94s). WDO can be connected to MR to auto-generate a system reset upon timeout.