Analog Devices Inc./Maxim Integrated MAX693ACSE+T
- Part No.:
- MAX693ACSE+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
MAX693ACSE+T.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MAX693ACSE+T from Maxim Integrated is a microprocessor supervisory circuit with 4.4V reset threshold, 200ms power-up reset timeout, 30μA operating supply current, and integrated chip-enable gating. It monitors VCC for brownout detection, asserts active-low RESET during undervoltage, and supports battery switchover down to VBATT = 2.0V - used in industrial controllers and embedded systems requiring reliable power sequencing and watchdog supervision.
For engineers reviewing the MAX693ACSE+T datasheet, MAX693ACSE+T pinout, MAX693ACSE+T application, or MAX693ACSE+T equivalent, this page delivers verified technical context, exact pin functions, real-world timing behavior (e.g., 6ns CE propagation delay), battery-backup mode operation, and validated alternatives for μP reset and watchdog system design.
Technical Context
The MAX693ACSE+T implements dual-reset outputs (RESET and RESET), a programmable watchdog timer with selectable 100ms/1.6s timeout periods via OSC SEL/OSC IN, and on-chip CE signal gating using a 75Ω transmission gate. Its reset generator uses an internal oscillator with 200ms typical assertion time after VCC rise above 4.4V.
Battery switchover occurs when VCC falls below VBATT − 0.3V (hysteresis 60mV), enabling VOUT sourcing from VBATT while asserting RESET; the BATT ON output signals switchover status, and PFI/PFO provide independent ±2% accurate power-fail monitoring at 1.25V threshold.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Threshold | 4.4V typical (guaranteed 4.25V–4.50V); ensures reliable μP reset initiation during 5V rail brownout. |
| Reset Timeout Period | 200ms typical (140–280ms); holds RESET low long enough to guarantee full μP initialization after power-up. |
| Supply Current | 30μA typical in normal operation; enables low-power always-on supervision without burdening system budget. |
| CE Propagation Delay | 6–10ns (50Ω source, 50pF load); preserves high-speed memory access integrity during CE gating. |
| VCC-to-VOUT On-Resistance | 0.8–1.2Ω (MAX69_AC); sustains ≤250mA load with <200mV dropout at full current. |
| VBATT-to-VOUT On-Resistance | 15–30Ω (VBATT = 2.0–4.5V); supports 25mA continuous backup supply with controlled voltage drop. |
| Watchdog Timeout | 100ms (short) / 1.6s (long); configurable via OSC SEL/OSC IN for flexible firmware supervision granularity. |
Pinout & Package
MAX693ACSE+T is housed in a 16-pin narrow SOIC (SO) package with 1.27mm pitch, JEDEC MS-012AC compliant, lead-free (+T suffix), and rated for 0°C to +70°C operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VBATT | Battery-Backup Input | Connects to backup capacitor or battery; enables VOUT sourcing when VCC drops below reset threshold. |
| 2 VOUT | Output Supply Voltage | Main system supply output; switches between VCC and VBATT based on switchover comparator state. |
| 3 VCC | Main Supply Input | 5V regulated input; powers internal circuitry and sources VOUT when above reset threshold. |
| 4 GND | Ground Reference | 0V reference for all analog and digital functions; must be low-impedance connection. |
| 5 BATT ON | Battery-On Indicator | Open-drain logic-high output when VOUT sourced from VBATT; drives external PNP base or status LED. |
| 6 LOW LINE | Reset Comparator Output | Buffered inverted reset signal; sinks 3.2mA at 0.1V, valid down to VCC = 1V. |
| 7 OSC IN | Oscillator Timing Input | Accepts external clock or timing capacitor; sets watchdog/reset timeout periods when OSC SEL = GND. |
| 8 OSC SEL | Oscillator Mode Select | Drives internal oscillator (floating/high) or enables external timing (low); has 10μA internal pull-up. |
| 9 PFI | Power-Fail Input | Noninverting input to uncommitted comparator; triggers PFO low when voltage falls below 1.25V. |
| 10 PFO | Power-Fail Output | Open-drain comparator output; provides early warning of supply decay or low-battery condition. |
| 11 WDI | Watchdog Input | Three-level input (high/low/floating); resets watchdog timer on edge or pulse ≥100ns; floating disables function. |
| 12 CE OUT | Chip-Enable Output | Gated CE signal; goes low only when CE IN is low AND VCC > reset threshold; prevents RAM corruption. |
| 13 CE IN | Chip-Enable Input | High-impedance during reset; series 75Ω resistance in enabled mode; leakage ±0.005μA max. |
| 14 WDO | Watchdog Output | Asserts low on watchdog timeout; remains low until next WDI transition; TTL-compatible output. |
| 15 RESET | Active-Low Reset Output | Open-drain output; sinks 3.2mA at 0.1V; guaranteed valid down to VCC = 1V; requires external pull-up. |
| 16 RESET | Active-High Reset Output | Open-drain inverse of RESET; high-impedance when inactive; same timing and assertion conditions. |
Key Features
| Feature | Design Value |
|---|---|
| Guaranteed RESET assertion to VCC = 1V | Enables robust reset signaling even during deep brownout, eliminating need for external supervisor fallback. |
| On-board CE gating with 6ns propagation delay | Prevents spurious writes to CMOS RAM during power transitions without adding external logic or layout complexity. |
| MaxCap®/SuperCap compatible battery switchover | Supports large-value backup capacitors (e.g., 0.47F) with controlled 15–30Ω VBATT path resistance. |
| ±2% power-fail accuracy (MAX800L/M variant) | Provides precise low-battery or early power-loss detection without calibration or trimming components. |
| Configurable watchdog timeout (100ms / 1.6s) | Allows matching firmware watchdog service interval to application criticality-fast response or long grace period. |
Applications
| Industrial Controller Power Monitoring | Embedded Data Logger with Backup RAM |
|---|---|
|
Use Scenario: PLC or RTU maintains real-time process data during AC mains interruption. IC Role / Device Role / Timing Role: MAX693ACSE+T monitors 5V rail, asserts RESET to halt CPU, switches VOUT to supercap, and gates CE to freeze RAM writes. Use Value: Ensures deterministic shutdown and seamless backup power handover with no data loss or memory corruption. |
Use Scenario: Remote environmental sensor node logs temperature/humidity to nonvolatile RAM during grid outage. IC Role / Device Role / Timing Role: MAX693ACSE+T detects VCC collapse, enables VBATT supply, asserts RESET to suspend firmware, and holds CE IN disabled. Use Value: Guarantees RAM retention for ≥24 hours on 0.47F MaxCap with no software intervention or external circuitry. |
| Medical Diagnostic Equipment Supervision | Point-of-Sale Terminal with Secure Boot |
|
Use Scenario: Ultrasound or ECG device performs self-test and safe shutdown before power loss. IC Role / Device Role / Timing Role: MAX693ACSE+T triggers hardware reset at 4.4V, activates LOW LINE for status LED, and pulses WDO to log fault event. Use Value: Meets IEC 60601-1 requirements for fail-safe power monitoring with sub-200ms deterministic response. |
Use Scenario: Retail terminal validates firmware signature before boot and locks memory during brownout. IC Role / Device Role / Timing Role: MAX693ACSE+T gates CE to prevent unauthorized flash writes, asserts RESET on undervoltage, and monitors PFI for tamper detection. Use Value: Enforces secure boot integrity and prevents memory corruption during unstable AC or battery swap events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX691ACSE+T | 4.65V reset threshold (vs. 4.4V); identical pinout, timing, and feature set. | Suitable for systems with tighter 5V rail tolerance where earlier reset assertion is required. | Select MAX691ACSE+T when VCC nominal is 5.0V ±2% and reset must trigger before crossing 4.6V. |
| MAX800MCSE+T | Same 4.4V reset threshold; guarantees ±2% power-fail accuracy (PFI/PFO), while MAX693A does not specify accuracy. | Required where certified low-battery warning or precise power-fail threshold is mandated (e.g., energy metering). | Choose MAX800MCSE+T when PFI comparator accuracy is critical; otherwise MAX693ACSE+T offers cost-optimized supervision. |
Compared with MAX691ACSE+T and MAX800MCSE+T, the MAX693ACSE+T provides optimal balance of early reset response (4.4V), low quiescent current (30μA), and proven CE gating reliability - making it ideal for cost-sensitive industrial controllers where PFI accuracy is secondary to robust reset timing.
Availability
MAX693ACSE+T is available at Aetrix Electronics and suitable for industrial controllers, embedded data loggers, medical diagnostic equipment, and point-of-sale terminals requiring stable component supply across extended production lifecycles.
Supply support for MAX693ACSE+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, automotive, and communications applications.
The MAX693A belongs to Maxim's microprocessor supervisory product line, engineered to ensure deterministic reset behavior, battery-backed memory protection, and watchdog supervision in mission-critical embedded systems.
FAQ
What is the reset threshold voltage of the MAX693ACSE+T?
The MAX693ACSE+T has a typical reset threshold voltage of 4.4V, with guaranteed minimum and maximum values of 4.25V and 4.50V respectively over temperature and supply variation. This threshold applies to both RESET and RESET outputs and is fixed for the MAX693A variant - distinct from the 4.65V threshold of the MAX691A family.
Does the MAX693ACSE+T support battery backup operation, and what are the voltage limits?
Yes, the MAX693ACSE+T supports battery backup mode when VCC falls below VBATT − 0.3V and below the 4.4V reset threshold. It operates with VBATT from 2.0V to 5.5V, delivering up to 25mA continuous current through the VBATT-to-VOUT path with on-resistance of 15–30Ω depending on VBATT level.
How does the watchdog function work on the MAX693ACSE+T, and how is it configured?
The MAX693ACSE+T watchdog monitors the WDI pin: if WDI remains static (high or low) longer than the timeout period (100ms or 1.6s), WDO and RESET go low for 200ms. Timeout is selected via OSC SEL and OSC IN - floating OSC SEL gives 1.6s, grounding OSC SEL enables external capacitor or clock configuration.
Can the MAX693ACSE+T be used with a 3.3V microprocessor system?
No - the MAX693ACSE+T is specified for VCC = +4.5V to +5.5V operation and generates VOUT from either VCC or VBATT within that range. Its reset comparator, CE gating, and output drive levels are optimized for 5V systems; interfacing with 3.3V logic requires level-shifting circuitry and is not supported per datasheet specifications.
What is the purpose of the CE IN and CE OUT pins on the MAX693ACSE+T?
The CE IN and CE OUT pins implement hardware-enforced chip-enable gating: CE OUT passes CE IN only when VCC is above 4.4V and RESET is deasserted. During power failure or reset, CE OUT is disabled to prevent spurious writes to CMOS RAM or EEPROM - a key reliability feature confirmed in the MAX693ACSE+T functional description and timing diagrams.
MAX693ACSE+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Battery Backup Circuit
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.4V
- Output:
- Push-Pull, Push-Pull
- Reset:
- Active High/Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
MAX693ACSE+T FAQ
1.How can I place an order for MAX693ACSE+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX693ACSE+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX693ACSE+T reliable?
The price and inventory of MAX693ACSE+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX693ACSE+T is usually 5 days.
3.What payment methods are accepted for MAX693ACSE+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX693ACSE+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX693ACSE+T?
MAX693ACSE+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX693ACSE+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX693ACSE+T?
For technical support, including MAX693ACSE+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX693ACSE+T requirements.
6.How does Aetrix verify that MAX693ACSE+T is sourced from the original manufacturer or authorized distributors?
All MAX693ACSE+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX693ACSE+T meets industry standards.
7.What is the process for return or replacement of MAX693ACSE+T?
All MAX693ACSE+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX693ACSE+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX693ACSE+T part is unused and in its original packaging.
Return procedure for MAX693ACSE+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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