Analog Devices Inc./Maxim Integrated MAX696CPE+

Overview

MAX696CPE+ from Maxim Integrated is a microprocessor supervisory circuit in 16-pin PDIP packaging, providing six integrated functions: adjustable low-line reset (1.25V–1.35V threshold), watchdog timer (100ms/1.6s selectable), power-fail warning (1.3V PFI threshold), battery-backup switching (VOUT switchover at VCC–VBATT differential ≥50mV), RESET timeout (50ms default), and separate LOW LINE/WDO fault outputs. It is used in industrial controllers for reliable μP reset and RAM backup during brownout.

For engineers reviewing the MAX696CPE+ datasheet, MAX696CPE+ pinout, MAX696CPE+ application, or MAX696CPE+ equivalent, key selection considerations include its 1μA battery-standby current, 50mA VOUT output capability, dual-mode watchdog timing control via OSC SEL/OSC IN, and precise 1.3V internal reference for both LLIN and PFI comparators.

Technical Context

The MAX696CPE+ integrates a precision 1.3V bandgap reference shared by the LLIN comparator and PFI comparator, with independent hysteresis (12mV on LLIN, programmable on PFI). Its battery-switchover logic uses a 200Ω MOSFET and pnp switch to route VCC or VBATT to VOUT, with 70mV turn-on/50mV turn-off thresholds and 20mV hysteresis.

Watchdog operation supports three timing modes: internal oscillator (100ms or 1.6s), external clock (4096/1024 cycles), or external capacitor (e.g., 47pF → 1.6s). The RESET pulse generator is synchronized to the timebase and holds RESET low for 50ms after LLIN rises above 1.312V - not just threshold crossing - ensuring immunity to supply ripple.

Key Specifications

Pinout & Package

MAX696CPE+ is supplied in a 16-pin plastic DIP (PDIP) package with 0.3-inch width, through-hole mounting, and RoHS-compliant lead-free finish (indicated by '+' suffix).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with MAX697CPE+, MAX696CPE+ provides essential battery-backup infrastructure but lacks RAM write gating; compared with TPS3823-50DBVR, it delivers comprehensive supervision (watchdog, PFI, switchover) at the cost of larger PDIP footprint and higher active current.

Availability

MAX696CPE+ is available at Aetrix Electronics and suitable for industrial controllers, embedded data loggers, medical diagnostic equipment, and point-of-sale terminals requiring stable component supply across extended product lifecycles.

Supply support for MAX696CPE+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for demanding industrial, automotive, and computing applications.

The MAX696CPE+ belongs to Maxim's microprocessor supervisory product line, engineered specifically to consolidate reset, watchdog, power-fail warning, and battery backup into a single 16-pin IC for μP-based systems with stringent reliability requirements.

FAQ

What is the function of the BATT ON pin on the MAX696CPE+?

The BATT ON pin on the MAX696CPE+ is an active-low open-drain output that goes low when VOUT is internally switched to VBATT (i.e., during battery backup mode). It sinks up to 7mA and is designed to directly drive the base of an external PNP transistor, enabling higher VOUT current delivery beyond the internal 50mA limit. This pin is absent on the MAX697CPE+ and is unique to the MAX696CPE+ battery-switchover functionality.

Does the MAX696CPE+ support adjustable reset timeout delay?

Yes, the MAX696CPE+ supports adjustable reset timeout delay. The default is 50ms, but it can be modified using an external capacitor on the OSC IN pin (e.g., 47pF yields ~1.6s) or by applying external clock pulses. The timing is controlled jointly by OSC SEL and OSC IN states per Table 1 in the datasheet. This adjustability allows designers to match reset duration to specific μP oscillator startup requirements.

Can the MAX696CPE+ monitor a 3.3V supply rail?

Yes, the MAX696CPE+ can monitor a 3.3V supply rail. Its LLIN input accepts any voltage referenced to GND, and the internal 1.3V comparator threshold remains fixed regardless of VCC. For 3.3V systems, an external resistor divider scales the rail down to ~1.3V at LLIN. The PFI input similarly supports 3.3V monitoring via divider, and the device operates correctly with VCC as low as 3.0V per its specified operating range.

How does the MAX696CPE+ handle watchdog timeout after a power-on reset?

The MAX696CPE+ implements a two-phase watchdog timeout: immediately after power-on reset, the timeout period defaults to 1.6s to allow μP initialization; only after the first WDI transition while RESET is high does the selected timeout (100ms or 1.6s) become active. This prevents false resets during boot. If WDI remains static, RESET pulses recur every 1.6s until activity resumes - a behavior confirmed in Figure 6 and the "Detailed Description" section of the MAX696CPE+ datasheet.

Is the 1.3V reference used for both LLIN and PFI inputs identical and matched?

Yes, the MAX696CPE+ uses a single, shared 1.3V precision bandgap reference for both the LLIN and PFI comparators. Electrical Characteristics specify PFI–LLIN threshold difference as ±15mV (typ) and ±50mV (max), confirming tight matching. This design ensures coordinated timing: PFI can be set to trip ~1–2ms before LLIN by adjusting the external divider ratio, enabling reliable early-warning interrupt before reset assertion.