Analog Devices Inc./Maxim Integrated MAX742CPP
- Part No.:
- MAX742CPP
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Special Purpose Regulators
- Package:
- 20-DIP (0.300", 7.62mm)
- Datasheet:
-
MAX742CPP.pdf
- Description:
- IC REG LINEAR SWITCH MODE REG
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
The MAX742CPP from Maxim Integrated is a dual-output switch-mode DC-DC controller IC designed to drive external N- and P-channel MOSFETs for generating ±12V or ±15V from a +4.2V to +10V input. It delivers up to ±250mA at ±12V or ±200mA at ±15V with ±4% output tolerance over line, load, and temperature, and supports 100kHz/200kHz operation for compact magnetics in distributed power systems.
For engineers reviewing the MAX742CPP datasheet, MAX742CPP pinout, MAX742CPP application, or MAX742CPP equivalent, key selection considerations include independent current-mode PWM regulation per output, cycle-by-cycle overcurrent protection, programmable soft-start via external capacitor, undervoltage lockout (4.2V threshold), and compatibility with simple two-terminal inductors-enabling high-efficiency (up to 92%), low-noise dual-rail supplies without transformers.
Technical Context
The MAX742CPP implements two independent current-mode PWM controllers-one for the step-up (+VO) and one for the inverting (–VO) output-each using summing amplifier-based error detection with internal ramp compensation to prevent subharmonic oscillation above 50% duty cycle. Both loops share a single oscillator but operate asynchronously in current-limit mode.
It integrates a charge-pump driver (PUMP) that generates a rail-to-rail square wave at half the oscillator frequency to bias the P-channel MOSFET gate driver (PDRV), enabling high-side drive without external bootstrap circuitry. Pin-strapped configuration (100/200 and 12/15 pins) selects switching frequency and output voltage mode, while FB+ and FB– provide separate feedback paths for precise regulation of each rail.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | +4.2V to +10V - supports direct connection to 5V logic rails or higher-voltage intermediate buses with optional zener clamping |
| Output Voltage Options | ±12V or ±15V - selected by strapping 12/15 pin to GND or V+, enabling single-BOM flexibility across voltage requirements |
| Regulation Accuracy | ±4% max over line, load, and temperature - ensures stable analog supply rails for precision op-amps, ADCs, and DACs |
| Switching Frequency | 100kHz or 200kHz - selectable via 100/200 pin; lower frequency improves light-load efficiency, higher frequency reduces component size |
| Current-Limit Threshold | +150mV / –150mV - sets peak inductor current limit per output, enabling robust cycle-by-cycle protection of external MOSFETs |
| Reference Voltage | +2.00V (VREF) - provides stable bias for external resistor dividers and enables chip disable when shorted to GND or V+ |
| Soft-Start Control | 5µA internal current source into SS pin - allows controlled ramp-up of current limits using 1µF–10µF capacitor to suppress inrush |
Pinout & Package
MAX742CPP is housed in a 20-pin plastic DIP package (0°C to +70°C operating range), with through-hole mounting and standard 0.3" wide body. Pin numbering follows standard DIP convention (pin 1 at top-left corner, counterclockwise).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (FB+) | Step-up output feedback input | Connects to resistive divider from +VO to set regulated +12V/+15V output; open-circuit disables regulation |
| 2 (CC+) | Step-up compensation capacitor | Stabilizes +VO loop by canceling ESR zero of output filter capacitor; typical value 1000pF minimum |
| 3 (AGND) | Analog ground reference | Separate ground for analog circuitry; must tie directly to filter capacitor ground to minimize noise coupling |
| 4 (AV+) | Analog supply input | +5V analog rail; bypass with ≥150µF at AV+ to GND for low-noise operation |
| 5 (100/200) | Oscillator frequency select | Ground = 200kHz; tie to V+ = 100kHz - determines switching speed and component sizing trade-offs |
| 6 (12/15) | Output voltage mode select | Ground = ±15V; tie to V+ = ±12V - configures internal reference scaling without external components |
| 7 (VREF) | +2.00V reference output | Provides precision bias for feedback dividers; shorting to GND or V+ disables device |
| 8 (SS) | Soft-start timing node | 5µA internal current source charges external capacitor to ramp current limits and prevent startup surge |
| 9 (CC–) | Inverting output compensation | Stabilizes –VO loop; matches CC+ value to maintain symmetry between outputs |
| 10 (FB–) | Inverting output feedback input | Connects to resistive divider from –VO; open-circuit disables negative rail regulation |
| 11 (CSL–) | Inverting section current-sense low | Low-side sense input for –VO path; used with CSH– to detect peak inductor current |
| 12 (CSH–) | Inverting section current-sense high | High-side sense input for –VO path; differential pair with CSL– sets –150mV current-limit threshold |
| 13 (V+) | Main supply input | +4.2V to +10V digital/analog supply; absolute max +12V; requires local 10µF ceramic + 150µF bulk bypass |
| 14 (EXT–) | P-channel MOSFET gate driver output | Push-pull driver for external P-FET; driven by charge-pump biased PDRV rail |
| 15 (PDRV) | Negative supply input for EXT– driver | Accepts –5V to –8V external bias or charge-pump output; ground if input >8V to avoid overvoltage |
| 16 (PUMP) | Charge-pump clock output | Rail-to-rail square wave at fOSC/2; drives external diode-capacitor network to generate PDRV bias |
| 17 (EXT+) | N-channel MOSFET gate driver output | Push-pull driver for external N-FET; operates from V+ rail with fast rise/fall times (70ns typical) |
| 18 (GND) | High-current ground return | Power ground for switching currents; must be tied to AGND at single point near input capacitors |
| 19 (CSL+) | Step-up section current-sense low | Low-side sense input for +VO path; differential pair with CSH+ sets +150mV current-limit threshold |
| 20 (CSH+) | Step-up section current-sense high | High-side sense input for +VO path; completes current-sense loop for positive output regulation |
Key Features
| Feature | Design Value |
|---|---|
| Independent current-mode PWM control | Enables tight regulation (±4%) of both +VO and –VO rails under varying load, line, and temperature without cross-regulation drift |
| Programmable 100kHz/200kHz operation | Allows optimization of magnetic size vs. efficiency: 100kHz improves light-load efficiency; 200kHz reduces inductor/capacitor footprint |
| Integrated charge-pump driver (PUMP) | Generates gate-drive bias for P-channel FET without external bootstrap components, ensuring reliable start-up even under heavy loads |
| Cycle-by-cycle overcurrent protection | Detects peak inductor current on both outputs using dedicated CSH+/CSL+ and CSH–/CSL– pairs, limiting fault energy per switching cycle |
| Undervoltage lockout with hysteresis | Disables operation below +4.2V (with +0.2V hysteresis) to prevent erratic behavior during brownout or weak supply conditions |
| Soft-start with external capacitor control | 5µA internal current source into SS pin enables user-defined ramp time (1–10µF typical) to eliminate inrush current and overshoot |
Applications
| Industrial Data Acquisition Systems | Test & Measurement Equipment |
|---|---|
Use Scenario: Powering dual-rail op-amps and precision ADCs in portable DAQ modules requiring clean ±12V or ±15V analog supplies. IC Role / Device Role / Timing Role: Dual-output DC-DC controller generating isolated ±12V/±15V rails from a single 5V battery or USB input. Use Value: ±4% regulation and low-noise design (≤150mV p-p ripple) ensure accurate signal conditioning and <1 LSB ADC error over full temperature range. |
Use Scenario: Supplying bipolar rails for oscilloscope front-end amplifiers and arbitrary waveform generator output stages. IC Role / Device Role / Timing Role: High-efficiency (90% typ) switch-mode controller driving external MOSFETs to deliver ±200mA at ±15V with minimal thermal rise. Use Value: 100kHz/200kHz frequency selection allows trade-off between EMI filtering complexity and board space in compact bench instruments. |
| Computer Peripherals | Distributed Power Architectures |
Use Scenario: Replacing legacy ±12V linear regulators in PCI Express add-in cards or FPGA I/O banks needing low-noise auxiliary supplies. IC Role / Device Role / Timing Role: Compact dual-output controller replacing transformer-based solutions with simple inductors and discrete MOSFETs. Use Value: Eliminates bulky transformers and enables PCB-level integration of ±12V generation with <500mW dissipation in 20-pin DIP package. |
Use Scenario: Local point-of-load conversion in telecom line cards where ±15V is required for analog interface circuits alongside main 3.3V/5V domains. IC Role / Device Role / Timing Role: Distributed power controller accepting 4.2–10V intermediate bus and delivering tightly regulated dual rails with fault reporting via VREF disable. Use Value: Undervoltage lockout, thermal shutdown, and soft-start support robust hot-swap capability and system-level power sequencing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output switch-mode controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX743CPP | Integrates power MOSFETs; limited to ≤3W output; no external drive pins (EXT+, EXT–, PDRV) | Suitable only for low-power (<±200mA) applications; eliminates external FET layout but sacrifices scalability | Select MAX743CPP only when total load is ≤3W and board space constraints preclude external MOSFETs |
| LM27762DSGR | Single-chip inverting charge-pump IC; fixed –5V output; no step-up capability; no programmable frequency or soft-start | Only generates negative rail; cannot produce ±12V/±15V simultaneously; lacks independent regulation loops | Choose LM27762DSGR only for simple –5V generation where positive rail is already available and precision dual-rail regulation is unnecessary |
Compared with MAX742CPP, MAX743CPP offers integrated FETs but sacrifices output power and flexibility, while LM27762DSGR provides simpler charge-pump topology at the cost of dual-rail capability and regulation accuracy-making MAX742CPP the only option supporting scalable, independently regulated ±12V/±15V at up to 60W with external MOSFETs.
Availability
MAX742CPP is available at Aetrix Electronics and suitable for industrial data acquisition systems, test & measurement equipment, computer peripherals, distributed power architectures, and analog signal processing modules requiring stable component supply across extended temperature and long production lifecycles.
Supply support for MAX742CPP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for industrial, communications, and computing applications.
The MAX742CPP belongs to Maxim's high-efficiency DC-DC controller product line, designed specifically for dual-output, transformerless power conversion in space-constrained analog systems requiring precise bipolar rails.
FAQ
What output voltage options does the MAX742CPP support, and how are they selected?
The MAX742CPP supports ±12V or ±15V dual outputs. Selection is made by strapping the 12/15 pin: grounding it configures ±15V mode, while tying it to V+ selects ±12V mode. This pin-strapping method eliminates the need for external programming components and allows single-BOM flexibility across different system voltage requirements. The MAX742CPP maintains ±4% regulation accuracy in both modes over full line, load, and temperature ranges.
How does the MAX742CPP achieve independent regulation of its +VO and –VO outputs?
The MAX742CPP uses two fully independent current-mode PWM controllers-one for the step-up (+VO) output and one for the inverting (–VO) output-each with dedicated feedback inputs (FB+ and FB–), current-sense inputs (CSH+/CSL+ and CSH–/CSL–), and compensation nodes (CC+ and CC–). This architecture prevents cross-regulation, allowing each rail to be adjusted separately and maintaining ±4% tolerance even under mismatched load conditions. The MAX742CPP does not share error amplifiers or current-sense paths between outputs.
What is the role of the PUMP and PDRV pins on the MAX742CPP, and how do they interact?
The PUMP pin outputs a rail-to-rail square wave at half the oscillator frequency, which drives an external diode-capacitor charge-pump network to generate a negative bias voltage. That voltage is applied to the PDRV pin, which serves as the supply rail for the EXT– push-pull gate driver. This arrangement enables strong gate drive for external P-channel MOSFETs without requiring a separate negative supply. If the input exceeds 8V, PDRV must be grounded to avoid overvoltage, and the charge-pump components omitted-functionality retained via direct biasing.
Can the MAX742CPP operate from input voltages above +5V, and what design considerations apply?
Yes, the MAX742CPP operates from +4.2V to +10V, with absolute maximum rating of +12V. For inputs above +8V, PDRV must be grounded to prevent overvoltage, and the charge-pump components removed. Inductor values should scale linearly with nominal input voltage-for example, increasing from 25µH to 40–50µH when moving from +5V to +9V input. The MAX742CPP's undervoltage lockout activates below +4.2V, ensuring reliable startup only when sufficient input headroom exists for regulation.
What protection features are integrated into the MAX742CPP, and how are they implemented?
The MAX742CPP integrates cycle-by-cycle overcurrent sensing (via CSH+/CSL+ and CSH–/CSL–), undervoltage lockout (4.2V threshold with 0.2V hysteresis), thermal shutdown (190°C trip), and programmable soft-start (5µA current source into SS pin). Fault conditions-including UVLO, thermal shutdown, or VREF short-automatically discharge the SS capacitor to initiate a new soft-start cycle. These protections operate independently per output and require no external components, making the MAX742CPP robust in demanding industrial environments.
MAX742CPP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 20-DIP (0.300", 7.62mm)
- Packaging:
- Bulk
- Product Status:
- Active
- Applications:
- Controller, Power Supplies
- Voltage - Input:
- 4.2V ~ 10V
- Number of Outputs:
- 2
- Voltage - Output:
- ±12V, ±15V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 20-PDIP
MAX742CPP FAQ
1.How can I place an order for MAX742CPP through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX742CPP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX742CPP reliable?
The price and inventory of MAX742CPP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX742CPP is usually 5 days.
3.What payment methods are accepted for MAX742CPP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX742CPP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX742CPP?
MAX742CPP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX742CPP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX742CPP?
For technical support, including MAX742CPP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX742CPP requirements.
6.How does Aetrix verify that MAX742CPP is sourced from the original manufacturer or authorized distributors?
All MAX742CPP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX742CPP meets industry standards.
7.What is the process for return or replacement of MAX742CPP?
All MAX742CPP units undergo pre-shipment inspection (PSI). If there is an issue with MAX742CPP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX742CPP part is unused and in its original packaging.
Return procedure for MAX742CPP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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