Analog Devices Inc./Maxim Integrated MAX791CPE

Overview

MAX791CPE from Maxim Integrated is a microprocessor supervisory circuit providing precision 4.65V reset monitoring, 200ms reset timeout, independent watchdog timer (preset 1.6s or adjustable via external capacitor), battery switchover (25mA backup output), and chip-enable gating with 6ns propagation delay - all in a 16-pin plastic DIP package for use in portable/battery-powered µP systems requiring reliable power-up/down and brownout protection.

For engineers reviewing the MAX791CPE datasheet, MAX791CPE pinout, MAX791CPE application, or MAX791CPE equivalent, this page delivers verified functional identity, validated pin roles, confirmed timing parameters, real-world backup-battery behavior down to VCC = 1V, and accurate alternative part comparisons - enabling confident selection for critical µP power monitoring in industrial controllers and intelligent instruments.

Technical Context

The MAX791CPE integrates dual-voltage monitoring (4.65V reset threshold + 150mV hysteresis for LOWLINE), a two-stage power-fail comparator (PFI input with 1.25V threshold, PFO open-drain output), and a programmable watchdog timer whose timeout is set by a capacitor on SWT (2.1 × C_nF ms, 4.7–100nF range). It features internal PMOS switchover between VCC and VBATT, with guaranteed RESET assertion down to VCC = 1V even with no battery present.

Its CE gating logic passes chip-enable signals only when VCC > 4.65V and reset is deasserted; CE IN-to-CE OUT propagation is production-tested at 6ns (50Ω source, 50pF load). In battery-backup mode (VCC < reset threshold and VCC < VBATT), VOUT connects to VBATT, BATT ON goes high, and WDI/RESET/CE functions are disabled while PFI/PFO remain active if VCC ≥ VBATT − 1.2V.

Key Specifications

Pinout & Package

MAX791CPE is housed in a 16-pin plastic DIP (dual in-line package) with 0.3-inch body width, through-hole mounting, and industry-standard pin spacing (0.1 inch). Pin 1 is marked with a notch or dot; top view orientation follows standard DIP convention.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with MAX692CPE+ and TPS3823-46DBVR, MAX791CPE uniquely combines reset supervision, adjustable watchdog, battery switchover, and CE gating in one DIP-16 package - making it the only choice for portable µP systems requiring coordinated power-fail response, memory protection, and firmware fault recovery.

Availability

MAX791CPE is available at Aetrix Electronics and suitable for portable/battery-powered equipment, industrial controllers, and intelligent instrumentation requiring stable component supply across commercial temperature ranges.

Supply support for MAX791CPE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for industrial, communications, and computing markets.

The MAX791 product line was designed specifically for microprocessor-based systems needing integrated power monitoring, reset generation, battery backup control, and software fault detection - targeting reliability-critical embedded applications.

FAQ

What is the guaranteed minimum VCC level at which MAX791CPE maintains valid RESET output?

The MAX791CPE guarantees valid RESET output down to VCC = 1V even with no battery connected. This is achieved through internal biasing that maintains gate drive to the RESET output transistor. When a backup battery is present (VBATT ≥ 2V), RESET remains valid across the full VCC range from 0V to 5.5V. An external 10kΩ pull-down resistor on the RESET pin ensures saturation voltage stays below 0.4V while sinking 40µA, extending functional validity to VCC = 0V in battery-backed configurations.

How does the MAX791CPE implement two-stage power-fail warning?

The MAX791CPE implements two-stage power-fail warning using separate comparators: the primary RESET comparator triggers at 4.65V, while the LOWLINE comparator activates at 4.80V (4.65V + 150mV). LOWLINE asserts low first as VCC declines, providing an early nonmaskable interrupt (NMI) to initiate graceful shutdown procedures before the hard RESET is asserted. This 150mV hysteresis ensures deterministic sequencing - allowing systems to save state, disable peripherals, or log events prior to full reset.

Can the watchdog timeout period of MAX791CPE be adjusted, and how is it configured?

Yes, the MAX791CPE watchdog timeout is adjustable from 10ms to 210ms using an external capacitor on the SWT pin. Connecting SWT to VOUT selects the default 1.6s timeout. For custom timing, connect a capacitor (4.7nF to 100nF) between SWT and GND; timeout = 2.1 × C_nF ms. The internal ±100nA current source charges/discharges this capacitor to generate the oscillator frequency. Do not leave SWT floating or tie it directly to GND, as both conditions disable proper watchdog operation.

What is the function of the CE IN and CE OUT pins on MAX791CPE, and how do they prevent memory corruption?

The CE IN and CE OUT pins implement chip-enable signal gating: CE IN accepts the system's raw chip-enable signal, while CE OUT delivers a conditioned version that is only active when VCC > 4.65V and RESET is deasserted. During power-up/down or brownout, CE OUT is forced high (disabled), blocking spurious memory accesses that could corrupt CMOS RAM or EEPROM. With 6ns propagation delay (50Ω source, 50pF load), this gating preserves timing integrity while ensuring memory write-cycle completion before power collapse.

Does MAX791CPE support backup battery operation, and what are its limitations?

Yes, MAX791CPE supports backup battery operation: when VCC falls below 4.65V and VCC < VBATT, it automatically switches VOUT to VBATT, asserts BATT ON high, and enters battery-backup mode. In this mode, it delivers up to 25mA continuous to sustain CMOS RAM or RTCs. Key limitations include: WDI, MR, and CE functions are disabled; RESET remains asserted; and PFI/PFO remain active only if VCC ≥ VBATT − 1.2V. Battery standby current is ≤1µA, enabling multi-day operation from typical coin cells or supercapacitors.