Analog Devices Inc./Maxim Integrated MAX791ESE

Overview

MAX791ESE from Maxim Integrated is a microprocessor supervisory circuit providing precision 4.65V reset monitoring, 200ms reset timeout, dual-stage power-fail warning (PFI/PFO + LOWLINE), watchdog timer with adjustable timeout (1.6s default), and battery-switchover for CMOS RAM backup. It operates across –40°C to +85°C in 16-pin narrow SO package and delivers 250mA VCC-mode output for reliable system reset and memory protection in portable industrial controllers.

For engineers reviewing the MAX791ESE datasheet, MAX791ESE pinout, MAX791ESE application, or MAX791ESE equivalent, this page details its verified reset threshold accuracy, battery-backup mode behavior, CE gating propagation delay (6ns), and real-world timing margins under brownout and manual-reset conditions.

Technical Context

The MAX791ESE integrates a precision bandgap-based 4.65V reset comparator with 15mV hysteresis and guaranteed validity down to VCC = 1V, enabling robust reset assertion during deep brownouts. Its two independent comparators-LOWLINE (threshold = V_RESET + 150mV) and PFI (1.25V fixed)-support early power-fail detection and low-battery monitoring without cross-interference.

Watchdog functionality uses an internal current-source oscillator tied to the SWT pin, allowing timeout periods from ~10ms to 210ms via external capacitor (4.7–100nF). Chip-enable gating employs a series transmission gate with 75Ω on-resistance and 6ns propagation delay (50Ω source, 50pF load), ensuring safe memory write-cycle completion during supply transients.

Key Specifications

Pinout & Package

MAX791ESE is housed in a 16-pin narrow SOIC (SO) package with 1.27mm pitch, RoHS-compliant lead-free finish, and thermal performance rated for 696mW dissipation at +70°C (derated 8.70mW/°C above).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with MAX691ACPE+ and TPS3823MPDBVR, the MAX791ESE uniquely combines precision reset, dual-stage power-fail warning, battery-switchover, and chip-enable gating in a single 16-pin SOIC-making it the only option for designs requiring coordinated memory protection and layered fault response.

Availability

MAX791ESE is available at Aetrix Electronics and suitable for industrial PLCs, portable medical devices, automotive BCMs, and smart energy meters requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for MAX791ESE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power-management ICs for industrial, automotive, and computing applications.

The MAX791 product line was designed specifically for microprocessor-based systems needing integrated reset supervision, battery backup, watchdog monitoring, and memory protection-targeting portable, industrial, and mission-critical embedded platforms.

FAQ

What is the guaranteed minimum VCC level at which MAX791ESE maintains valid RESET output?

The MAX791ESE guarantees valid RESET output down to VCC = 1V, even with no battery connected. This is achieved through internal biasing that maintains correct logic states in the reset comparator and output driver. At VCC = 1V, RESET remains asserted and functional, enabling reliable µP initialization during deep brownout conditions. An external 10kΩ pull-down resistor ensures saturation voltage stays below 0.4V while sinking 40µA, further enhancing robustness. The MAX791ESE datasheet confirms this specification across the full –40°C to +85°C operating range.

How does the MAX791ESE implement dual-stage power-fail warning, and what are the threshold relationships?

The MAX791ESE implements dual-stage power-fail warning using two independent comparators: the PFI/PFO path (1.25V threshold) and the LOWLINE output (V_RESET + 150mV = ~4.80V). PFO asserts first when auxiliary supplies dip below 1.25V, while LOWLINE triggers earlier than RESET to provide advance notice-typically at 4.80V versus RESET's 4.65V. These thresholds are uncorrelated: PFI is a standalone comparator unaffected by reset logic, whereas LOWLINE is derived from the same reference as RESET but offset by a fixed 150mV. This separation allows independent monitoring of multiple rails or staged system response.

Can the MAX791ESE watchdog timeout be adjusted, and what is the valid capacitor range for the SWT pin?

Yes, the MAX791ESE watchdog timeout is adjustable via an external capacitor connected between the SWT pin and GND. The timeout period follows the formula: 2.1 × C_nF ms, where C_nF is the capacitor value in nanofarads. Valid values range from 4.7nF to 100nF, yielding timeouts from approximately 10ms to 210ms. Connecting SWT directly to VOUT selects the default 1.6s timeout. The capacitor must not be left floating or tied to ground, as the internal ±100nA current source requires a defined termination. This adjustment is fully supported in the MAX791ESE's –40°C to +85°C operating range.

What is the maximum continuous output current capability of MAX791ESE in battery-backup mode?

The MAX791ESE delivers up to 25mA continuous output current in battery-backup mode, sourced from the VBATT pin through the internal PMOS switch to VOUT. This current powers the RESET, WDO, WDPO, CE OUT, and BATT ON outputs while VCC is below the reset threshold. Peak battery current is rated at 250mA, but continuous operation is limited to 25mA to maintain thermal stability and ensure reliable switchover. The device draws only 1µA standby current from VBATT in this mode, minimizing drain on backup sources such as coin cells or supercapacitors.

Does MAX791ESE support chip-enable (CE) signal gating, and what is its propagation delay specification?

Yes, the MAX791ESE supports chip-enable signal gating via dedicated CE IN and CE OUT pins. During normal operation, CE transitions pass through with minimal distortion; during reset assertion, the CE path is disabled to prevent memory corruption. The propagation delay is specified at 6ns maximum, measured from the 50% point of CE IN to the 50% point of CE OUT under test conditions of 50Ω source impedance and 50pF capacitive load. This low latency ensures compatibility with high-speed µPs and preserves memory access timing margins during power transients.