Analog Devices Inc./Maxim Integrated MAX793TESE+T
- Part No.:
- MAX793TESE+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
MAX793TESE+T.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,374
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MAX793TESE+T from Maxim Integrated is a 3.0V/3.3V microprocessor supervisory circuit with fixed reset threshold (3.00V–3.15V), backup-battery switchover, active-low open-drain RESET output, and integrated watchdog timer (1.6s timeout). It monitors VCC supply integrity, asserts reset below threshold, gates CE signals with ≤7ns propagation delay, and supports battery-freshness seal for lithium backup. Used in embedded controllers requiring reliable power-up/down sequencing and brownout protection.
For engineers reviewing the MAX793TESE+T datasheet, MAX793TESE+T pinout, MAX793TESE+T application, or MAX793TESE+T equivalent, key selection criteria include guaranteed reset assertion down to VCC = 1V, battery voltage exceeding VCC (up to 3.6V), low-line early-warning output (LOWLINE), on-board CE gating, and BATT OK status monitoring - all in a 16-pin narrow SO package.
Technical Context
The MAX793TESE+T implements a precision voltage comparator with 10mV typical hysteresis for stable reset assertion/deassertion, coupled with a dedicated VCC-to-VBATT switchover circuit that activates when VCC falls below VSW (2.55V–2.68V, depending on variant). Its watchdog timer continuously monitors WDI transitions and forces WDO low after 1.6s of inactivity.
It integrates a manual reset input (MR) with internal 70µA pullup and 200ms timeout, an uncommitted power-fail comparator (PFI/PFO), and chip-enable gating logic that disables CE IN during reset while preserving write-cycle completion via 10µs hold time on CE OUT.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Threshold | 3.00V to 3.15V (VCC falling); ensures reset before 3.3V supply drops below system tolerance limit |
| Battery Switch Threshold | 2.55V–2.68V (VCC falling); triggers switchover to backup battery before reset assertion |
| Watchdog Timeout | 1.6s ±25%; detects µP lockup and initiates recovery via WDO→MR connection |
| RESET Propagation Delay | <25µs (VCC falling); guarantees fast response to brownout events |
| VCC Supply Current | 46µA (typ) at +25°C; enables ultra-low-power operation in battery-backed systems |
| CE IN-to-CE OUT Delay | ≤7ns (max); preserves timing margins for high-speed µP memory access |
| Operating Temp Range | 0°C to +70°C; validated for commercial-grade embedded controller environments |
Pinout & Package
MAX793TESE+T is housed in a 16-pin narrow SO (SOIC-16) package with 1.27mm pitch, JEDEC MS-012AC compliant, RoHS-compliant and lead-free (+T suffix).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| OUT (Pin 1) | Supply output for CMOS RAM | Switches between VCC and BATT based on VCC level; drives RAM VDD with <75mA capability |
| VCC (Pin 2) | Main supply input | Primary 3.0V/3.3V power rail; monitored for reset and low-line detection |
| GND (Pin 6) | Ground reference | Common return path for all analog and digital functions; critical for comparator accuracy |
| PFI (Pin 4) | Power-fail comparator input | Monitors external voltage (e.g., +5V rail); triggers PFO low when below 1.212V threshold |
| PFO (Pin 7) | Power-fail comparator output | Open-drain signal used for NMI generation or battery freshness seal enable |
| RESET (Pin 15) | Active-low open-drain reset output | Asserts low for ≥200ms on power-up/brownout; requires external pullup to VCC |
| RESET (Pin 13) | Active-high reset output | Sources/sinks current; inverse of RESET; directly interfaces with µP reset inputs |
| MR (Pin 8) | Manual reset input | Logic-low active; internally pulled up (70µA); debounced by 200ms timeout |
| WDI (Pin 10) | Watchdog input | Accepts pulses ≥100ns wide; resets 1.6s watchdog timer on each transition |
| WDO (Pin 9) | Watchdog output | Active-low open-drain; goes low on watchdog timeout; can be wired to MR for auto-reset |
| LOWLINE (Pin 14) | Early power-fail warning | Asserts low when VCC falls to VLR (≈3.00V − 30mV); provides NMI for graceful shutdown |
| CE IN (Pin 11) | Chip-enable input | Controls gating path; high-impedance during reset to prevent spurious writes |
| CE OUT (Pin 12) | Chip-enable output | Passes CE only when reset inactive; holds low for 10µs if CE IN was low at reset assertion |
| BATT (Pin 16) | Backup battery input | Accepts 3.6V lithium cell; isolated via freshness seal until first power cycle |
| BATT ON (Pin 5) | Battery status indicator | Logic-high when OUT is sourced from BATT; drives external PMOS/NPN switch for >75mA loads |
| BATT OK (Pin 3) | Battery health monitor | High when VBATT > 2.0V; low if battery depleted or VCC < VSW |
Key Features
| Feature | Design Value |
|---|---|
| Precision reset monitoring | Fixed 3.00V–3.15V trip point with 10mV hysteresis prevents chatter during supply droop |
| Backup-battery switchover | VBATT up to 3.6V exceeds VCC; automatic seamless transition without external FETs |
| On-board CE gating | 7ns max propagation delay preserves µP timing; 10µs hold time ensures RAM write completion |
| Battery freshness seal | Zero-battery-leakage mode until first power cycle; extends shelf life of lithium backup cells |
| Guaranteed reset to 1V | Valid RESET assertion even as VCC collapses to 1V - critical for controlled shutdown |
| Low-line early warning | LOWLINE output triggers NMI at VCC ≈ 2.97V - provides 30mV margin before reset |
Applications
| Battery-Powered Embedded Controllers | Critical µP Power Monitoring |
|---|---|
Use Scenario: Industrial data logger powered by primary 3.3V supply and coin-cell backup, operating unattended for months. IC Role / Device Role / Timing Role: Supervises VCC, asserts RESET on brownout, switches RAM supply to BATT, and signals LOWLINE for firmware-initiated save. Use Value: Prevents data corruption during mains failure; enables deterministic shutdown and retention using 3.6V lithium cell. | Use Scenario: Medical infusion pump requiring fail-safe boot and runtime voltage supervision per IEC 62304. IC Role / Device Role / Timing Role: Monitors 3.3V rail with 3.00V reset threshold, feeds WDO to MR for watchdog-triggered restart, and gates CE to protect EEPROM writes. Use Value: Guarantees µP reset below safe operating voltage; eliminates need for discrete reset IC + external watchdog + CE logic. |
| Intelligent Controllers | Portable Equipment |
Use Scenario: Smart HVAC controller with real-time clock, nonvolatile RAM, and battery-backed configuration storage. IC Role / Device Role / Timing Role: Provides BATT OK status, enables battery freshness seal during manufacturing, and asserts RESET during cold start. Use Value: Ensures RTC and RAM retain state across power cycles; confirms battery health before deployment. | Use Scenario: Handheld test instrument with dual-supply architecture (3.3V main, 3.6V Li-MnO₂ backup). IC Role / Device Role / Timing Role: Detects VCC sag during RF transmission bursts, triggers LOWLINE NMI for buffer flush, and maintains RAM supply via OUT. Use Value: Avoids measurement corruption during transient load-induced voltage dips; sustains memory without external regulators. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX793TESA+ | Same electrical specs but in 16-pin PDIP package; no lead-free finish | Preferred for prototyping or through-hole assembly; lacks RoHS compliance | Select MAX793TESA+ only when DIP footprint and hand-soldering are required |
| MAX795TESE+ | 8-pin SO package; identical reset threshold (T), but omits watchdog, LOWLINE, BATT OK, and CE gating | Suitable for space-constrained designs where only basic reset + battery switchover is needed | Choose MAX795TESE+ when board area is critical and advanced features are unnecessary |
Compared with MAX793TESA+, MAX793TESE+ offers RoHS compliance and surface-mount compatibility; compared with MAX795TESE+, it adds watchdog, early-warning, and memory protection features essential for robust embedded control.
Availability
MAX793TESE+T is available at Aetrix Electronics and suitable for battery-powered embedded controllers, intelligent industrial controllers, critical µP power monitoring systems, and portable instrumentation requiring stable component supply and long-term lifecycle support.
Supply support for MAX793TESE+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, automotive, and computing applications.
The MAX793 series belongs to Maxim's microprocessor supervisory product line, engineered specifically for reliable power monitoring and system-level fault recovery in 3.0V/3.3V embedded systems.
FAQ
What is the exact reset threshold voltage range for MAX793TESE+T?
The MAX793TESE+T has a fixed reset threshold of 3.00V to 3.15V (VCC falling), optimized for 3.3V ±5% supplies. This ensures reset is asserted before the supply drops below 3.0V - the minimum required for stable µP operation. The threshold is factory-trimmed and includes 10mV hysteresis to prevent oscillation during slow supply ramps. MAX793TESE+T does not support adjustable reset thresholds like the MAX794.
Does MAX793TESE+T support backup battery voltages higher than VCC?
Yes, MAX793TESE+T supports VBATT up to 3.6V - exceeding its nominal 3.0V/3.3V VCC range. Its internal p-channel MOSFET switch automatically connects OUT to BATT when VCC falls below the battery switch threshold (VSW ≈ 2.55V–2.68V), enabling seamless switchover without external components. This design allows use of standard 3.6V lithium batteries in 3.3V systems, a key feature confirmed in the MAX793TESE+T datasheet absolute maximum ratings and electrical characteristics tables.
How does the battery freshness seal function in MAX793TESE+T?
The battery freshness seal in MAX793TESE+T isolates the BATT pin from internal circuitry until first power-up, preventing battery drain during storage. To enable it: apply VBATT, ground PFO, bring VCC above VRST, wait for reset timeout (200ms), then cycle VCC. Once enabled, the seal remains active until VCC rises above VRST again. Leakage is <1nA at +25°C - verified in MAX793TESE+T typical operating characteristics (TOC14). This feature is exclusive to MAX793/MAX794, not present in MAX795.
Can MAX793TESE+T drive CMOS RAM directly, and what is its output current capability?
Yes, MAX793TESE+T drives CMOS RAM directly via the OUT pin, which sources up to 75mA in normal mode (VCC > VSW) and 250µA in battery-backup mode (VCC = 0V). Output voltage is VCC − 0.12V (min) in normal mode and VBATT − 0.1V (min) in backup mode. The internal p-channel switch exhibits <160Ω on-resistance at +25°C (TOC1), ensuring stable RAM VDD under load. For >75mA, use BATT ON to drive an external PMOS transistor.
What is the purpose and behavior of the LOWLINE output on MAX793TESE+T?
The LOWLINE output on MAX793TESE+T provides early power-fail warning by asserting low when VCC falls to VLR = VRST − 30mV (≈2.97V for T-grade), giving the µP ~30mV margin before reset. It is an open-drain output intended for NMI interrupt generation. LOWLINE remains low until VCC rises above VRST + 15mV hysteresis. Unlike RESET, it does not time out - it stays active as long as VCC is below the warning threshold. This enables firmware-controlled data save operations prior to full reset.
MAX793TESE+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Battery Backup Circuit
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 3.075V
- Output:
- Open Drain, Push-Pull
- Reset:
- Active High/Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
MAX793TESE+T FAQ
1.How can I place an order for MAX793TESE+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX793TESE+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX793TESE+T reliable?
The price and inventory of MAX793TESE+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX793TESE+T is usually 5 days.
3.What payment methods are accepted for MAX793TESE+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX793TESE+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX793TESE+T?
MAX793TESE+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX793TESE+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX793TESE+T?
For technical support, including MAX793TESE+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX793TESE+T requirements.
6.How does Aetrix verify that MAX793TESE+T is sourced from the original manufacturer or authorized distributors?
All MAX793TESE+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX793TESE+T meets industry standards.
7.What is the process for return or replacement of MAX793TESE+T?
All MAX793TESE+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX793TESE+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX793TESE+T part is unused and in its original packaging.
Return procedure for MAX793TESE+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX793TESE+T Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

