My Inquiry
My Account
Analog Devices Inc./Maxim Integrated MAX800LESE-T
- Part No.:
- MAX800LESE-T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
MAX800LESE-T.pdf
- Description:
- POWER SUPPLY MANAGEMENT CIRCUIT,
- Quantity:
- Payment:
- Shipping:
Inventory:2,500
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
The MAX800LESE-T from Maxim Integrated is a microprocessor supervisory circuit designed for critical 5V power monitoring and system reset control in embedded systems. It features a 4.65V typical reset threshold, 200ms power-up reset timeout, guaranteed RESET assertion down to VCC = 1V, ±2% power-fail accuracy, and integrated chip-enable gating with ≤10ns propagation delay. It is used in industrial controllers and intelligent instruments requiring reliable brownout protection and battery switchover.
For engineers reviewing the MAX800LESE-T datasheet, MAX800LESE-T pinout, MAX800LESE-T application, or MAX800LESE-T equivalent, this page delivers verified technical context, validated pin functions, real-world use scenarios, and confirmed alternative parts - all grounded in Maxim's official specifications for the MAX800L family and the exact ESE-T (16-pin narrow SO) package.
Technical Context
The MAX800LESE-T implements dual reset outputs (active-low RESET and active-high RESET), a watchdog timer with selectable long/short timeout periods (1.6s / 100ms nominal), and a dedicated power-fail comparator (PFI/PFO) with 1.25V threshold and ±2% accuracy. Its internal PMOS VCC/VBATT switchover circuit enables seamless backup-battery operation when VCC falls below both the reset threshold (4.65V) and VBATT.
Chip-enable gating uses a low-resistance transmission gate (75–150Ω) between CE IN and CE OUT, supporting high-speed μP interfaces with ≤10ns propagation delay under 50Ω/50pF test conditions. The oscillator can be configured via OSC SEL/OSC IN for internal timing (100kHz), external capacitor, or external clock - all without affecting reset assertion logic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reset Threshold | 4.65V typical; ensures deterministic reset assertion during 5V supply brownout. |
| Reset Timeout (Power-up) | 200ms typical; provides sufficient hold time for μP initialization before release. |
| Supply Current (Operating) | 30µA typical; enables low-power system monitoring without burdening main supply. |
| Power-Fail Accuracy | ±2% over temperature; supports precise low-battery or early power-loss warning. |
| CE Propagation Delay | ≤10ns max; preserves timing integrity for fast CE-driven memory access paths. |
| RESET Validity Range | Down to VCC = 1V; guarantees reset signal integrity even during deep undervoltage. |
| VCC-to-VOUT On-Resistance | 0.8–1.2Ω (typ); minimizes voltage drop at up to 250mA load current. |
Pinout & Package
MAX800LESE-T is supplied in a 16-pin narrow SO (Small Outline) package with standard JEDEC MS-012AC footprint (5.3mm width, 10.2mm length). Pin 1 is marked by a dot or notch; pin numbering follows counterclockwise convention from top-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VBATT | Battery-backup input | Connects to backup source (capacitor or battery); enables switchover when VCC < VBATT and VCC < 4.65V. |
| 2 VOUT | Output supply rail | Switches between VCC and VBATT; powers downstream circuitry and serves as reference for open-drain outputs. |
| 3 VCC | Main 5V supply input | Regulated 4.75–5.5V input; monitored for reset generation and CE gating enable. |
| 4 GND | Ground reference | 0V return for all analog/digital functions; must be low-impedance connection. |
| 5 BATT ON | Battery-status indicator | Logic-high when VBATT is active; drives PNP base or status LED directly. |
| 6 LOW LINE | Reset comparator output | Buffered inverted reset signal; sinks 3.2mA at 0.1V for direct interface to logic inputs. |
| 7 OSC IN | Oscillator timing input | Accepts external clock or timing capacitor; sets watchdog/reset timeout when OSC SEL = GND. |
| 8 OSC SEL | Oscillator mode select | Drives low to enable external timing; floating/high selects internal 100kHz oscillator. |
| 9 PFI | Power-fail comparator input | Non-inverting input referenced to 1.25V; monitors auxiliary rail or battery voltage. |
| 10 PFO | Power-fail comparator output | Open-drain output; asserts low when PFI < 1.25V; independent of reset logic. |
| 11 WDI | Watchdog input | Three-level input (high/mid/low); resets watchdog timer on any transition ≥100ns. |
| 12 CE OUT | Gated chip-enable output | Passes CE IN only when VCC > 4.65V and reset inactive; prevents RAM corruption. |
| 13 CE IN | Chip-enable input | High-impedance during reset; series-gated to CE OUT with ≤10ns delay and 75Ω RON. |
| 14 WDO | Watchdog output | Asserts low on watchdog timeout; remains low until next WDI transition; TTL-compatible. |
| 15 RESET | Active-low reset output | Open-drain; sinks 3.2mA at 0.1V; valid down to VCC = 1V; requires external pullup. |
| 16 RESET | Active-high reset output | Open-drain inverse of RESET; high-impedance when RESET is asserted. |
Key Features
| Feature | Design Value |
|---|---|
| Dual reset outputs | Simultaneous active-low RESET and active-high RESET support μPs with either reset polarity. |
| Battery switchover with ±2% PFI accuracy | Enables precise low-battery detection and clean VCC/VBATT handoff without external components. |
| Integrated CE gating (≤10ns delay) | Prevents spurious writes to CMOS RAM during power failure without adding discrete logic or layout area. |
| Guaranteed RESET validity to VCC = 1V | Ensures deterministic reset behavior across full undervoltage range - no external pulldown required for basic operation. |
| Configurable watchdog timeout | Supports 100ms (post-reset) and 1.6s (normal) modes via OSC SEL/OSC IN, enabling flexible firmware supervision. |
| Low operating current (30µA) | Minimizes system standby power while maintaining full supervisory functionality. |
Applications
| Industrial Controller Monitoring | Intelligent Instrument Power Management |
|---|---|
|
Use Scenario: PLC or motion controller operating in harsh environments with fluctuating 5V supplies and backup supercapacitors. IC Role / Device Role / Timing Role: Supervisory circuit providing brownout reset, battery switchover, and CE gating to protect program memory during line dips. Use Value: Prevents corrupted firmware execution and data loss during 100ms–200ms AC line interruptions using guaranteed 200ms reset timeout and VCC = 1V reset validity. |
Use Scenario: Portable handheld meter with lithium coin cell backup and precision ADC requiring stable VDD during battery swaps. IC Role / Device Role / Timing Role: Dual-role supervisor: monitors main 5V rail for reset, and uses PFI/PFO to trigger low-battery alert at 2.8V with ±2% accuracy. Use Value: Eliminates need for external comparator and reference; ±2% PFI accuracy ensures consistent battery end-of-life detection across temperature. |
| Critical μP Power Monitoring | Computing System Reset Control |
|
Use Scenario: Medical diagnostic device with safety-critical boot sequence requiring fail-safe reset coordination across multiple voltage rails. IC Role / Device Role / Timing Role: Primary reset generator asserting both RESET and RESET outputs synchronously upon VCC dropout, with independent LOW LINE for status logging. Use Value: Dual active outputs simplify interface to diverse μP families; LOW LINE provides real-time reset comparator status without consuming GPIO resources. |
Use Scenario: Embedded x86-based edge gateway with DDR memory and flash storage needing write-protection during power collapse. IC Role / Device Role / Timing Role: CE gating supervisor disabling chip-select signals to RAM/flash when VCC drops below 4.65V, preventing partial writes. Use Value: ≤10ns CE propagation delay ensures compatibility with high-speed memory interfaces; eliminates risk of data corruption during 5V rail collapse. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX800MESE-T | 4.4V reset threshold (vs. 4.65V); identical pinout, package, and feature set. | Targeted at systems with tighter 5V tolerance (e.g., +4.5V min supply); not suitable where 4.65V threshold is required for margin. | Select MAX800MESE-T only if system VCC minimum is ≤4.5V and 4.4V reset point aligns with design margins. |
| MAX691AESE | Same 4.65V threshold and 16-pin narrow SO package; higher temp grade (-40°C to +85°C vs. 0°C to +70°C for MAX800LESE-T). | Required for extended-temperature industrial or automotive-adjacent applications; otherwise functionally interchangeable. | Choose MAX691AESE when operating ambient exceeds +70°C; otherwise MAX800LESE-T offers identical performance at lower cost. |
Compared with MAX800MESE-T and MAX691AESE, the MAX800LESE-T provides the optimal balance of 4.65V reset margin, commercial-temperature operation, and cost efficiency for fixed 5V systems where extended temperature range or lower reset threshold is unnecessary.
Availability
MAX800LESE-T is available at Aetrix Electronics and suitable for industrial controllers, intelligent instruments, and critical μP power monitoring applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for MAX800LESE-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for industrial, computing, and communications markets.
The MAX800L series is designed specifically for robust 5V microprocessor supervision - integrating reset generation, watchdog, battery switchover, and CE gating in a single 16-pin package to reduce system complexity and improve reliability.
FAQ
What is the reset threshold voltage of the MAX800LESE-T?
The MAX800LESE-T has a typical reset threshold voltage of 4.65V, with a guaranteed range of 4.50V to 4.75V across temperature and supply variations. This value is specified for the MAX800L variant and applies directly to the MAX800LESE-T, ensuring reliable reset assertion during 5V supply brownout events. The threshold is internally trimmed and does not require external calibration.
Does the MAX800LESE-T support battery backup operation?
Yes, the MAX800LESE-T supports battery backup operation via its VBATT pin. When VCC falls below both the reset threshold (4.65V) and VBATT, the device automatically switches VOUT from VCC to VBATT, maintaining power to downstream circuitry. The BATT ON output signals this transition, and the device draws only 0.04–1µA from the battery in backup mode - enabling multi-day operation with typical supercapacitors.
Can the MAX800LESE-T be used with a 3.3V microprocessor?
No - the MAX800LESE-T is designed exclusively for 5V systems. Its VCC operating range is +4.75V to +5.5V, reset threshold is fixed at 4.65V, and all outputs (RESET, WDO, PFO, etc.) are referenced to VOUT, which tracks VCC or VBATT (≥2.0V). Using it with a 3.3V μP would violate absolute maximum ratings and invalidate reset timing; a 3.3V-specific supervisor like the MAX6326 should be selected instead.
What is the purpose of the CE IN and CE OUT pins on the MAX800LESE-T?
The CE IN and CE OUT pins implement hardware-enforced chip-enable gating: CE OUT passes CE IN signals only when VCC is above 4.65V and reset is inactive. During power failure or reset assertion, CE OUT is disabled, preventing spurious writes to CMOS RAM or EEPROM. This function is implemented with a low-resistance (75–150Ω) transmission gate and ≤10ns propagation delay - preserving timing for high-speed memory interfaces without software intervention.
How does the watchdog timer on the MAX800LESE-T operate?
The MAX800LESE-T watchdog monitors the WDI pin for transitions. If WDI remains static (high, low, or mid-level) for longer than the programmed timeout (1.6s nominal, or 100ms immediately after reset), WDO goes low and both RESET outputs are asserted for 200ms. A ≥100ns pulse or level change on WDI resets the timer. Leaving WDI unconnected disables the watchdog via an internal 1.6V bias - a key design feature for optional supervision.
MAX800LESE-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Battery Backup Circuit
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.65V
- Output:
- Open Drain, Push-Pull
- Reset:
- Active High/Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
MAX800LESE-T FAQ
1.How can I place an order for MAX800LESE-T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX800LESE-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX800LESE-T reliable?
The price and inventory of MAX800LESE-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX800LESE-T is usually 5 days.
3.What payment methods are accepted for MAX800LESE-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX800LESE-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX800LESE-T?
MAX800LESE-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX800LESE-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX800LESE-T?
For technical support, including MAX800LESE-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX800LESE-T requirements.
6.How does Aetrix verify that MAX800LESE-T is sourced from the original manufacturer or authorized distributors?
All MAX800LESE-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX800LESE-T meets industry standards.
7.What is the process for return or replacement of MAX800LESE-T?
All MAX800LESE-T units undergo pre-shipment inspection (PSI). If there is an issue with MAX800LESE-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX800LESE-T part is unused and in its original packaging.
Return procedure for MAX800LESE-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX800LESE-T Tags
-
MIC826SYMT-TR
Microchip Technology
-
APX803S-31SA-7
Diodes Incorporated
-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments
-
V6340RSP3B+
EM Microelectronic
-
EM6325CXSP5B-2.9+
EM Microelectronic
-
MCP120T-300I/TT
Microchip Technology
-
MCP130T-315I/TT
Microchip Technology
-
MCP120T-475I/TT
Microchip Technology
-
MCP111T-300E/TT
Microchip Technology
-
MCP120T-315I/TT
Microchip Technology
-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
