Analog Devices Inc./Maxim Integrated MAX820LESE+

Overview

MAX820LESE+ from Maxim Integrated is a microprocessor supervisory circuit providing reset generation, manual reset input, two-stage power-fail warning (low-line detection 120mV above reset threshold), watchdog timeout monitoring, and chip-enable signal gating for nonvolatile memory protection. It guarantees ±2% reset and low-line threshold accuracy in external programming mode and operates over 0°C to +70°C in a 16-pin narrow SO package.

For engineers reviewing the MAX820LESE+ datasheet, MAX820LESE+ pinout, MAX820LESE+ application, or MAX820LESE+ equivalent, this page delivers verified functional identity, validated pin roles, confirmed timing behavior (200ms reset delay, 1.6s default watchdog timeout), exact threshold accuracy (±2%), and real-world memory write-cycle protection capability - all critical for reliable µP power monitoring in industrial controllers and embedded systems.

Technical Context

The MAX820LESE+ integrates independent reset and low-line comparators with factory-trimmed thresholds (4.62V nominal reset, 4.74V nominal low-line) and supports external resistor-divider programming for custom thresholds. Its dual reset outputs (active-low RESET and active-high RESET) ensure compatibility with diverse µP reset inputs while maintaining validity down to VCC = 1V.

It implements a programmable watchdog timer via SWT capacitor coupling (k = 16.2 @ 5V), delivers pulsed WDPO output preceding WDO assertion by 70ns, and gates CE signals with ≤10ns propagation delay to prevent RAM corruption during brownout - all controlled by internal timebase and comparator logic without external clocking.

Key Specifications

Pinout & Package

MAX820LESE+ is housed in a 16-pin narrow SO (Small Outline) package, 3.9mm width, RoHS-compliant lead-free construction (indicated by '+' suffix).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with MAX792LESE+, MAX820LESE+ delivers tighter ±2% threshold accuracy essential for deterministic low-line warning, while TPS3808G33DBVR offers compact size and lower cost but omits critical features like CE gating, dual reset outputs, and programmable watchdog - making it unsuitable for memory-integrity-critical designs.

Availability

MAX820LESE+ is available at Aetrix Electronics and suitable for industrial PLC controllers, medical diagnostic equipment, automotive body control modules, and networked building automation sensors requiring stable component supply across extended production lifecycles.

Supply support for MAX820LESE+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for power, sensing, and interface applications in industrial, computing, and communications systems.

The MAX820LESE+ belongs to Maxim's µP supervisory product line, engineered specifically to ensure deterministic reset behavior, memory write-cycle integrity, and early brownout warning in resource-constrained embedded controllers.

FAQ

What is the guaranteed reset threshold voltage for MAX820LESE+?

The MAX820LESE+ guarantees a nominal reset threshold voltage of 4.62V with ±2% accuracy in external programming mode. This specification is explicitly documented in the Electrical Characteristics table under "Reset Threshold Voltage-Internal Threshold Mode" for the 'L' suffix variant. The accuracy guarantee applies across the full 0°C to +70°C operating temperature range and enables reliable brownout detection without calibration.

Does MAX820LESE+ support both internal and external reset threshold programming?

Yes, MAX820LESE+ supports both modes. Internal threshold mode is selected by grounding pin 4 (RESET IN/INT), enabling factory-trimmed 4.62V reset and 4.74V low-line thresholds. External programming mode is activated by pulling pin 4 ≥600mV, disconnecting internal dividers and routing LLIN/REFOUT and RESET IN/INT to external resistor networks for custom thresholds - a capability confirmed in the Detailed Description section.

How does the chip-enable gating function work in MAX820LESE+?

The MAX820LESE+ gates CE signals using an internal transmission gate between pins 14 (CE IN) and 13 (CE OUT). During normal operation, CE transitions pass through with ≤10ns delay. When reset is asserted, the gate disables: if CE IN is low, CE OUT remains low for 15µs to complete the current write cycle; if CE IN is high, CE OUT is pulled high. This prevents RAM corruption during brownout - verified in the Chip-Enable Signal Gating section.

What is the default watchdog timeout period for MAX820LESE+, and how is it configured?

The default watchdog timeout period for MAX820LESE+ is 1.6 seconds, set by connecting pin 8 (SWT) to VCC. An alternative timeout is selected by connecting a capacitor from SWT to GND; the period equals k × C (in nF) ms, where k = 16.2 at VCC = 5V. This behavior is specified in the Watchdog Function section and confirmed in Figure 7 timing diagrams - no external clock or resistor is required.

Can MAX820LESE+ operate reliably below 2.75V supply voltage?

MAX820LESE+ is specified for operation from 2.75V to 5.5V, but its RESET output is guaranteed valid down to VCC = 1V. Below 2.75V, internal comparators remain functional for reset assertion, though some parameters (e.g., supply current, propagation delays) are not characterized. The datasheet Note 1 confirms MAX820R/L variants operate down to their preset thresholds - for MAX820LESE+, that means reset remains asserted until VCC rises above 4.62V, even if VCC drops below 2.75V.