Analog Devices Inc./Maxim Integrated MAX8635ELA+T
- Part No.:
- MAX8635ELA+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package:
- 8-WFDFN
- Datasheet:
-
MAX8635ELA+T.pdf
- Description:
- IC REG LIN POS PROG 300MA 8UDFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
The MAX8635ELA+T from Maxim Integrated is a dual 300mA, pin-programmable LDO linear regulator in a 2mm × 2mm µDFN-8 package, operating from 2.7V to 5.5V input and delivering up to 300mA per output with 90mV typical dropout at 100mA. It features independent SHDN1/SHDN2 inputs, nine preset output-voltage combinations (e.g., 2.80V/1.50V to 3.00V/3.00V), and 54µA typical quiescent current with both LDOs active - used in compact battery-powered systems such as digital cameras and wireless LAN cards.
For engineers reviewing the MAX8635ELA+T datasheet, MAX8635ELA+T pinout, MAX8635ELA+T application, or MAX8635ELA+T equivalent, key selection criteria include dual independent shutdown control, pin-selectable dual-output voltages without external resistors, thermal shutdown at +165°C, low-noise capability (not applicable to MAX8635), and µDFN-8 footprint compatibility for space-constrained portable designs.
Technical Context
The MAX8635ELA+T implements two independent LDO regulators using internal p-channel MOSFET pass transistors (RDS(ON) ≈ 0.9Ω), enabling low dropout voltage proportional to load current and eliminating base-drive current losses inherent in PNP-based regulators. Each regulator employs a 1.50V internal reference, error amplifier, and fixed internal feedback divider network.
Output voltages are latched at power-on based on the logic states of P1 and P2 (open/GND/IN), supporting nine precise combinations without external resistors; subsequent changes to P1/P2 have no effect unless the device is fully powered down via simultaneous SHDN1/SHDN2 assertion. Shutdown is controlled independently per channel via active-low SHDN1 and SHDN2 inputs, each drawing ≤1nA bias current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7V to 5.5V - supports single-cell Li-ion, Li-polymer, and 3.3V/5V rail inputs without external pre-regulation. |
| Max Output Current (each) | 300mA - sufficient to power core logic, memory, or RF ICs in portable devices without thermal derating in µDFN-8 at moderate loads. |
| Typical Dropout Voltage | 90mV at 100mA - enables >97% efficiency at light-to-moderate loads and extends usable battery life near end-of-discharge. |
| Quiescent Current | 54µA (both LDOs on, no load) - minimizes standby power loss critical for always-on subsystems in handheld instruments. |
| Output Voltage Accuracy | ±1.7% over load/temperature - ensures reliable operation of 1.5V–3.0V I/O domains and memory interfaces without margining overhead. |
| Current Limit Threshold | 400mA (min), 500mA (typ) per output - provides robust short-circuit protection while allowing transient peaks during processor wake-up. |
| Operating Temperature | −40°C to +85°C - qualified for industrial and extended commercial environments including automotive infotainment peripherals. |
Pinout & Package
Package: 8-pin, 2mm × 2mm µDFN (exposed paddle), RoHS-compliant, lead-free. Thermal performance optimized by soldering exposed paddle to PCB ground plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 IN | Regulator Input Supply | Primary power input (2.7V–5.5V); requires ≥2.2µF ceramic bypass to GND for stability and PSRR. |
| 2 SHDN1 | LDO1 Active-Low Shutdown | Drives OUT1 to high-impedance when pulled low; connects to host MCU GPIO for dynamic power gating. |
| 3 SHDN2 | LDO2 Active-Low Shutdown | Drives OUT2 to high-impedance when pulled low; enables independent sequencing or fault isolation. |
| 4 P2 | Output Voltage Programming Input | One of two tri-state inputs (open/GND/IN) that selects one of nine VOUT1/VOUT2 combinations at power-on. |
| 5 P1 | Output Voltage Programming Input | Second tri-state programming input; state latched at startup; no runtime reconfiguration without full power cycle. |
| 6 GND | Analog/Digital Ground Reference | Common return path for IN, OUT1, OUT2, and exposed paddle; must be low-impedance connection to PCB ground plane. |
| 7 OUT2 | Regulator 2 Output | 300mA-capable regulated output; requires ≥2.2µF ceramic capacitor to GND; voltage set by P1/P2 state. |
| 8 OUT1 | Regulator 1 Output | 300mA-capable regulated output; independent from OUT2; voltage set by same P1/P2 state as OUT2. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent shutdown control | SHDN1 and SHDN2 allow granular power management - e.g., keep sensor rail (OUT2) active while disabling processor core rail (OUT1) during sleep. |
| Nine pin-programmable output combinations | Eliminates need for 1% feedback resistors and reduces BOM count - supports common dual-rail configurations like 2.85V/2.85V or 3.00V/2.50V. |
| Low-quiescent-current p-channel architecture | 54µA total IQ enables >1-year battery life in always-on monitoring applications with periodic wake-ups. |
| Thermal shutdown with hysteresis | Shuts down both outputs at +165°C junction temperature and re-enables only after cooling by 15°C - prevents thermal runaway in sealed enclosures. |
| Robust current limiting | Guaranteed 400mA minimum current limit per output protects against sustained shorts without latch-up or damage. |
Applications
| Cellular Phone Baseband Power | Digital Camera Sensor & ISP Rails |
|---|---|
Use Scenario: Powers baseband processor core (1.2V–1.5V) and I/O (2.8V–3.0V) from a single Li-ion cell in GSM/UMTS handsets. IC Role / Device Role / Timing Role: Dual-output LDO providing isolated, low-noise, sequenced power rails with independent enable control for power-mode transitions. Use Value: Enables fast wake/sleep cycling with <1µA shutdown current per rail and eliminates resistor networks required for discrete dual-LDO solutions. |
Use Scenario: Supplies image sensor analog front-end (1.8V) and digital ISP core (2.8V) in compact digital still cameras. IC Role / Device Role / Timing Role: Pin-configured dual LDO delivering stable, low-dropout regulation with minimal board area in tight camera module layouts. Use Value: Reduces solution size by 40% vs. two discrete 300mA LDOs and avoids accuracy drift from external resistor tolerances. |
| Wireless LAN Card SoC Power | Handheld Test Instrument Core Logic |
Use Scenario: Powers WLAN SoC requiring separate 1.5V analog/RF and 3.0V digital rails from a 3.3V intermediate supply. IC Role / Device Role / Timing Role: Dual LDO acting as final-stage regulator with independent shutdown to meet IEEE 802.11 power-save timing requirements. Use Value: Supports rapid channel-switching modes with <90µs turn-on delay and maintains ±1.7% output accuracy across temperature swings. |
Use Scenario: Delivers precision 2.85V/2.85V rails to microcontroller and ADC in portable multimeters and signal analyzers. IC Role / Device Role / Timing Role: Dual LDO ensuring clean, stable supply for metrology-grade analog circuits and low-jitter digital clocks. Use Value: Achieves <100mV dropout at full 300mA load, preserving battery runtime during measurement bursts without brownout. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX8633ELA+ | Single SHDN input; integrated open-drain RESET output monitoring OUT2; no BP pin; nine voltage options. | Used where system-level reset coordination is required and dual independent shutdown is unnecessary. | Select MAX8633ELA+ when RESET assertion synchronized to OUT2 is mandatory and shared shutdown simplifies control logic. |
| MAX8636ELA+ | Single SHDN input; BP pin for noise bypass (45µVRMS); nine voltage options; same pinout as MAX8635ELA+T except SHDN2→BP. | Preferred in noise-sensitive analog signal chains (e.g., audio codecs, precision ADCs) where ultra-low output noise is critical. | Choose MAX8636ELA+ when low-noise performance outweighs need for independent LDO shutdown control. |
Compared with MAX8633ELA+ and MAX8636ELA+, the MAX8635ELA+T uniquely provides independent SHDN1/SHDN2 control while retaining nine pin-programmable voltage combinations - making it optimal for systems requiring flexible, asymmetric power sequencing without added discrete logic or controllers.
Availability
MAX8635ELA+T is available at Aetrix Electronics and suitable for cellular phone baseband power, digital camera sensor rails, wireless LAN card SoC power, and handheld test instrument core logic requiring stable component supply across industrial temperature ranges and long production lifecycles.
Supply support for MAX8635ELA+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for industrial, communications, and consumer applications.
The MAX8633–MAX8636 family was designed specifically for space-constrained, battery-powered portable electronics requiring dual, programmable, low-quiescent-current LDO regulation with minimal external components.
FAQ
What output voltage combinations does the MAX8635ELA+T support?
The MAX8635ELA+T supports nine preset dual-output voltage combinations determined by the logic states of P1 and P2 at power-on - including 2.80V/1.50V, 2.90V/1.50V, 3.00V/1.50V, 2.60V/1.80V, 2.80V/1.80V, 3.00V/2.50V, 3.00V/2.80V, 2.85V/2.85V, and 3.00V/3.00V. These values are guaranteed across −40°C to +85°C and require no external resistors.
Does the MAX8635ELA+T provide low-noise operation like the MAX8634/MAX8636?
No, the MAX8635ELA+T does not include a BP (bypass) pin or internal noise-reduction circuitry. Unlike the MAX8634ELA+ and MAX8636ELA+, which achieve 45µVRMS output noise with a 0.01µF capacitor on BP, the MAX8635ELA+T is optimized for low quiescent current and independent shutdown rather than ultra-low-noise performance.
How does shutdown sequencing work on the MAX8635ELA+T?
The MAX8635ELA+T features independent active-low SHDN1 and SHDN2 inputs: pulling SHDN1 low disables only OUT1, pulling SHDN2 low disables only OUT2, and asserting both simultaneously shuts down both regulators with total supply current dropping to ≤1µA. This enables precise power-domain control without affecting adjacent rails.
What is the thermal shutdown behavior of the MAX8635ELA+T?
The MAX8635ELA+T disables both OUT1 and OUT2 when junction temperature exceeds +165°C and automatically re-enables them only after temperature falls by 15°C (to ~+150°C). This hysteresis prevents oscillation near the trip point and protects against sustained overload or poor PCB thermal design in the 2mm × 2mm µDFN package.
Can P1 and P2 be changed dynamically to adjust output voltages during operation?
No - the MAX8635ELA+T latches the states of P1 and P2 only at power-on or after a full shutdown (both SHDN1 and SHDN2 asserted low). Changing P1 or P2 during normal operation has no effect on output voltages; reconfiguration requires cycling power or executing a complete shutdown and restart sequence.
MAX8635ELA+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 8-WFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Programmable
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.5V, 2.8V
- Voltage - Output (Max):
- 3V, 3V
- Voltage Dropout (Max):
- 0.2V @ 100mA, 0.2V @ 100mA
- Current - Output:
- 300mA, 300mA
- Current - Quiescent (Iq):
- 75 µA
- Current - Supply (Max):
- -
- PSRR:
- 60dB ~ 55dB (1kHz ~ 10kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-µDFN (2x2)
MAX8635ELA+T FAQ
1.How can I place an order for MAX8635ELA+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX8635ELA+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX8635ELA+T reliable?
The price and inventory of MAX8635ELA+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX8635ELA+T is usually 5 days.
3.What payment methods are accepted for MAX8635ELA+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX8635ELA+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX8635ELA+T?
MAX8635ELA+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX8635ELA+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX8635ELA+T?
For technical support, including MAX8635ELA+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX8635ELA+T requirements.
6.How does Aetrix verify that MAX8635ELA+T is sourced from the original manufacturer or authorized distributors?
All MAX8635ELA+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX8635ELA+T meets industry standards.
7.What is the process for return or replacement of MAX8635ELA+T?
All MAX8635ELA+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX8635ELA+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX8635ELA+T part is unused and in its original packaging.
Return procedure for MAX8635ELA+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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