My Inquiry
My Account
Analog Devices Inc./Maxim Integrated MAX8655ETN+T
- Part No.:
- MAX8655ETN+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package:
- 56-WFQFN Exposed Pad
- Datasheet:
-
MAX8655ETN+T.pdf
- Description:
- IC REG BUCK ADJ 25A 56TQFN
- Quantity:
- Payment:
- Shipping:
Inventory:2,500
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MAX8655ETN+T from Maxim Integrated is a highly integrated, synchronous PWM buck regulator with internal high- and low-side MOSFETs, delivering up to 25A output current from a 4.5V–25V input while supporting adjustable 0.7V–5.5V output voltage, peak-current-mode control, and 200kHz–1MHz externally synchronizable switching frequency. It is designed for point-of-load power in telecom, servers, and notebook computers.
For engineers reviewing the MAX8655ETN+T datasheet, MAX8655ETN+T pinout, MAX8655ETN+T application, or MAX8655ETN+T equivalent, key selection considerations include its integrated 25A power stage, monotonic startup into prebiased outputs, independent overvoltage protection (OVP) sensing, 180° phase-shifted SYNCO output for dual-phase operation, and programmable valley/peak current limiting using ILIM1/ILIM2 pins.
Technical Context
The MAX8655ETN+T implements a forced-PWM, peak-current-mode control architecture with an internal transconductance error amplifier and adjustable slope compensation (via SCOMP pin). Its dual LDOs-VL (6.5V for gate drivers) and AVL (5V for logic)-enable robust biasing across wide input ranges, with UVLO triggering at 4.15V AVL rise and thermal shutdown at +160°C.
It supports three current-limit configurations: latch-off (MODE = AVL), automatic recovery (MODE = GND), and foldback valley limiting under severe overload. The OVP circuit operates independently of the FB network, tripping at 115% of nominal regulation voltage, while POK asserts open-drain low when output falls below 88.7% or rises above 671mV (for AVL reference).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 25A continuous; enables single-chip PoL supply for high-performance CPUs/FPGAs without external MOSFETs. |
| Input Voltage Range | 4.5V to 25V; supports wide-range industrial, telecom, and server DC inputs including 12V and 24V rails. |
| Output Voltage Range | 0.7V to 5.5V; adjustable via FB resistor divider; minimum 0.7V supports modern core voltages (e.g., 1.2V, 0.9V). |
| Switching Frequency | 200kHz to 1MHz; adjustable via FSYNC resistor or external clock; enables EMI optimization and compact magnetics. |
| FB Regulation Accuracy | ±1% over temperature; ensures tight output regulation critical for DDR memory and ASIC core supplies. |
| Thermal Shutdown | +160°C junction with 15°C hysteresis; protects against sustained overload or poor heatsinking in dense PCB layouts. |
| Package | 56-pin TQFN-EP (8mm × 8mm); exposed pad enhances thermal performance-θJC = 3.5°C/W. |
Pinout & Package
MAX8655ETN+T uses a 56-pin, 8mm × 8mm TQFN package with exposed PVIN-EP, LX-EP, and GND-EP pads for optimal thermal and electrical performance. The layout integrates power and analog grounds with dedicated PGND (pins 7–15), VLGND (pin 22), and GND (pins 23, 28, 39, 48) connections to minimize noise coupling.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PVIN (pins 1–5, 51–56) | High-side MOSFET drain input | Primary power input node; requires low-ESR bulk decoupling directly to PGND to minimize switching loop inductance. |
| LX (pins 6, 16–21) | Switch-node connection | Drives external inductor; pin 6 left unconnected for optimal routing; LX-EP provides direct thermal path to PCB. |
| PGND (pins 7–15) | Power ground return | Source connection for low-side MOSFET; must be tied to input capacitor ground with minimal trace length. |
| AVL (pin 27) | 5V internal logic supply | Powers control circuitry; requires 1µF ceramic cap to GND; UVLO threshold at 4.15V ensures safe enable sequencing. |
| FB (pin 35) | Feedback regulation input | Sets output voltage via resistor divider; regulates to 0.7V (internal) or external REFIN; ±1% accuracy over temp. |
| OVP (pin 34) | Independent overvoltage sense | Monitors output via separate resistor divider; trips at 115% of nominal FB voltage-immune to FB network drift. |
| SYNCO (pin 46) | 180° phase-shifted sync output | Enables interleaved dual-phase operation with second MAX8655ETN+T; eliminates need for external phase inverters. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 25A power stage | Eliminates external MOSFETs and driver ICs-reduces BOM count, layout area, and EMI from discrete switch-node routing. |
| Monotonic startup into prebiased output | Prevents negative voltage excursions during hot-swap or multi-rail sequencing-protects downstream loads like DDR memory. |
| Adjustable peak & valley current limiting | ILIM1 sets precise peak limit (e.g., 80mV threshold); ILIM2 configures valley foldback-enables safe short-circuit survival without thermal runaway. |
| Independent OVP with FB isolation | OVP pin senses output separately from FB; maintains protection integrity even if feedback resistors drift or fail open. |
| 180° phase-shifted SYNCO output | Allows seamless dual-phase interleaving with matched MAX8655ETN+T devices-cuts input/output ripple current by ~70% vs. single-phase. |
Applications
| Telecom Power Shelf | Server CPU Core Supply |
|---|---|
Use Scenario: Distributed 12V-to-1.2V conversion in carrier-grade line cards with strict ripple and transient response requirements. IC Role / Device Role / Timing Role: Primary step-down regulator delivering 25A at 1.2V with <100ns load-step response and <10mV undershoot. Use Value: Integrated MOSFETs and peak-current-mode control ensure stable regulation under dynamic CPU load changes without external compensation. |
Use Scenario: High-current core voltage regulation for dual-socket Xeon platforms requiring tight voltage tolerance and monotonic startup. IC Role / Device Role / Timing Role: Single-chip 25A buck converter operating at 500kHz with synchronized dual-phase mode for reduced input capacitance. Use Value: SYNCO-driven interleaving cuts input RMS current by 50%, lowering bulk capacitor stress and board-level EMI. |
| Notebook GPU VRM | IBA Power Module |
Use Scenario: Compact, thermally constrained GPU voltage regulation in ultrabooks with aggressive power cycling. IC Role / Device Role / Timing Role: Adjustable 0.7V–1.5V output with programmable soft-start (SS pin) and thermal shutdown for safety-critical mobile use. Use Value: Monotonic startup prevents GPU reset during hot-plug events; 8mm × 8mm TQFN fits tight height budgets (<1.2mm profile). |
Use Scenario: Input bus architecture (IBA) module converting 12V intermediate bus to multiple point-of-load rails. IC Role / Device Role / Timing Role: Primary 25A regulator feeding downstream POL converters; configured with external reference (REFIN) for tracking applications. Use Value: REFIN pin accepts 0.7V–1.5V external references-enables precise voltage tracking between core and I/O rails in multi-rail systems. |
Availability
MAX8655ETN+T is available at Aetrix Electronics and suitable for telecom power shelves, server CPU core supplies, and notebook GPU VRMs requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for MAX8655ETN+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power-management ICs for demanding industrial, communications, and computing applications.
The MAX8655 product line delivers highly integrated, high-current DC-DC regulators targeting space-constrained, high-efficiency point-of-load applications in servers, networking equipment, and portable computing.
FAQ
What is the maximum continuous output current supported by the MAX8655ETN+T?
The MAX8655ETN+T supports up to 25A continuous output current under proper thermal conditions-verified with 8mm × 8mm TQFN package, 3.5°C/W θJC, and adequate PCB copper area. Derating applies above +85°C ambient; full 25A is achievable at ≤+65°C board temperature with 300 LFM airflow per typical operating curves.
How does the MAX8655ETN+T achieve monotonic startup into a prebiased output?
The MAX8655ETN+T monitors FB voltage versus SS ramp during startup. If FB > SS at power-on, both MOSFETs remain off until SS exceeds FB-preventing discharge of the output capacitor. This behavior is intrinsic to the soft-start circuitry and requires no external components, ensuring safe startup in multi-rail or hot-swap systems.
Can the MAX8655ETN+T be synchronized to an external clock, and what is the valid frequency range?
Yes-the MAX8655ETN+T accepts external synchronization via the FSYNC pin across 160kHz to 1.2MHz. When driven by an external clock, it locks phase and adjusts internal timing; the SYNCO output then provides a 180° out-of-phase signal for interleaving with a second MAX8655ETN+T device.
What are the key differences between peak and valley current limiting on the MAX8655ETN+T?
Peak limiting (set via ILIM1) measures inductor current directly for high accuracy and fast response; valley limiting (set via ILIM2) senses low-side MOSFET conduction and enables foldback during short circuits to reduce power dissipation. MODE pin selects latch-off (AVL) or auto-recovery (GND) behavior for valley limit events.
Is the OVP function on the MAX8655ETN+T dependent on the FB feedback network?
No-the OVP function on the MAX8655ETN+T is fully independent of the FB network. OVP uses a dedicated resistor divider from output to GND, referenced to a fixed 115% threshold of the nominal FB regulation voltage (e.g., 805mV for 0.7V FB). This ensures protection remains active even if FB resistors fail or drift.
MAX8655ETN+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 56-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 25V
- Voltage - Output (Min/Fixed):
- 0.7V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 25A
- Frequency - Switching:
- 200kHz ~ 1MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 56-TQFN (8x8)
MAX8655ETN+T FAQ
1.How can I place an order for MAX8655ETN+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX8655ETN+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX8655ETN+T reliable?
The price and inventory of MAX8655ETN+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX8655ETN+T is usually 5 days.
3.What payment methods are accepted for MAX8655ETN+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX8655ETN+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX8655ETN+T?
MAX8655ETN+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX8655ETN+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX8655ETN+T?
For technical support, including MAX8655ETN+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX8655ETN+T requirements.
6.How does Aetrix verify that MAX8655ETN+T is sourced from the original manufacturer or authorized distributors?
All MAX8655ETN+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX8655ETN+T meets industry standards.
7.What is the process for return or replacement of MAX8655ETN+T?
All MAX8655ETN+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX8655ETN+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX8655ETN+T part is unused and in its original packaging.
Return procedure for MAX8655ETN+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX8655ETN+T Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
