Analog Devices Inc./Maxim Integrated MAX8668ETEX+T
- Part No.:
- MAX8668ETEX+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- -
- Datasheet:
-
MAX8668ETEX+T.pdf
- Description:
- IC REG QUAD BUCK/LNR SYNC 16TQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
The MAX8668ETEX+T from Maxim Integrated is a dual step-down DC-DC converter with dual low-dropout (LDO) linear regulators, designed to power low-voltage microprocessors and DSPs in portable electronics. It delivers 600mA on OUT1 and 1200mA on OUT2, supports adjustable output voltages from 0.6V to 3.3V, operates at 1.5MHz hysteretic-PWM, and achieves 100µA no-load supply current with all outputs enabled - enabling compact, high-efficiency power management in smartphones and digital cameras.
For engineers reviewing the MAX8668ETEX+T datasheet, MAX8668ETEX+T pinout, MAX8668ETEX+T application, or MAX8668ETEX+T equivalent, key selection criteria include its dual adjustable buck topology, individual enable inputs per regulator, 3mm × 3mm thin QFN package, LDO dropout down to 1.7V input, and voltage positioning capability for transient load optimization.
Technical Context
The MAX8668ETEX+T integrates two synchronous step-down converters using a proprietary hysteretic-PWM control scheme operating at up to 1.5MHz, enabling ultra-small external components (e.g., 2.2µH inductors) and fast transient response. Each buck stage features p-channel high-side switches with guaranteed 600mA (OUT1) and 1200mA (OUT2) output current, plus valley-current limiting and programmable voltage positioning via FB1/FB2 resistor networks.
It also includes two independent 300mA LDOs (OUT3/OUT4) with 1.7V minimum input voltage, 250mV max dropout at full load, 75µVRMS output noise (100Hz–100kHz), and individual EN3/EN4 enables. All four regulators support flexible sequencing via dedicated enable pins and soft-start ramp times of 100µs (LDOs) and 25–45µs (buck outputs).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Topology | Dual synchronous step-down + dual LDO - enables single-chip multi-rail power for SoC core/I/O/memory rails |
| OUT1/OUT2 Output Range | 0.6V to 3.3V (adjustable via FB1/FB2 resistive divider) - supports modern low-voltage processor cores |
| Output Current | 600mA (OUT1), 1200mA (OUT2), 300mA each (OUT3/OUT4) - sufficient for application processors and peripheral I/O |
| Switching Frequency | 1.5MHz fixed-frequency hysteretic-PWM - allows use of tiny 2.2µH chip inductors and reduces EMI filtering burden |
| No-Load Supply Current | 100µA (typ) with all regulators enabled - extends battery life in always-on portable standby modes |
| LDO Dropout Voltage | 250mV max at 300mA load - permits operation from single-cell Li-ion (3.0V min) while maintaining regulation |
| Package | 16-pin thin QFN, 3mm × 3mm - fits space-constrained mobile PCB layouts with thermal pad for dissipation |
Pinout & Package
MAX8668ETEX+T uses a 16-pin, 3mm × 3mm thin QFN package with exposed paddle (EP) that must be connected to GND, PGND1, and PGND2 for thermal and electrical performance. Pin numbering follows standard top-view orientation with Pin 1 at top-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (EN3) | Enable input for LDO OUT3 | Active-high logic; drives OUT3 on/off independently - enables precise power sequencing for peripherals |
| 2 (OUT3) | LDO output rail 3 | 300mA regulated output; requires 4.7µF ceramic bypass to GND - supplies low-noise analog or interface circuitry |
| 3 (IN34) | Input supply for LDOs OUT3/OUT4 | 1.7V–5.5V range; must be ≤ VIN12 - accepts single-cell Li-ion or shared system rail |
| 4 (OUT4) | LDO output rail 4 | 300mA regulated output; 4.7µF ceramic bypass required - powers auxiliary sensors or communication ICs |
| 5 (EN4) | Enable input for LDO OUT4 | Independent active-high control - allows dynamic power gating of non-critical subsystems |
| 6 (GND) | Analog ground reference | Common return for bias circuits and REF; separate from PGND1/PGND2 to minimize noise coupling |
| 7 (REF) | Internal 0.6V reference output | Bypassed with 0.01µF ceramic capacitor - provides stable feedback reference for both buck regulators |
| 8 (FB2) | Feedback input for OUT2 | Connects to resistor divider between OUT2 and GND - sets adjustable output voltage and enables voltage positioning |
| 9 (PGND2) | Power ground for buck OUT2 | High-current return path for LX2 switching node - must be routed separately from AGND to avoid ground bounce |
| 10 (LX2) | Switch node for buck OUT2 | Connects to inductor and synchronous rectifier - carries high di/dt; requires short, low-inductance layout |
| 11 (IN12) | Input supply for bucks OUT1/OUT2 | 2.6V–5.5V range; must be ≥ VIN34 - typically powered from main battery or PMIC intermediate rail |
| 12 (LX1) | Switch node for buck OUT1 | Connects to OUT1 inductor; shares same 1.5MHz switching behavior as LX2 - enables synchronized layout |
| 13 (PGND1) | Power ground for buck OUT1 | Dedicated return for LX1 current - isolated from PGND2 to prevent cross-regulator interference |
| 14 (FB1) | Feedback input for OUT1 | Resistor-divider connection point - identical function to FB2 but for first buck channel |
| 15 (EN1) | Enable input for buck OUT1 | Active-high; initiates soft-start with 25µs delay - used for core voltage activation after reset |
| 16 (EN2) | Enable input for buck OUT2 | Independent enable with 25µs tEN - supports I/O rail sequencing after core voltage stabilization |
Key Features
| Feature | Design Value |
|---|---|
| Voltage positioning via FB1/FB2 | Enables intentional output droop matching inductor DCR - reduces peak-to-peak deviation during load transients and cuts required output capacitance |
| Individual enable inputs (EN1–EN4) | Four independent logic controls allow arbitrary power-up/down sequencing - critical for meeting SoC boot requirements and reducing inrush |
| 1.5MHz hysteretic-PWM architecture | Delivers near-fixed frequency operation with minimal external components - eliminates need for compensation networks and simplifies layout |
| Ultra-low no-load current (100µA) | Reduces quiescent drain in battery-powered sleep states - extends runtime in always-on sensor or connectivity functions |
| Low-noise LDOs (75µVRMS) | Meets stringent noise requirements for RF front-ends and high-resolution ADCs - avoids need for additional post-regulation filtering |
| Thermal shutdown with 15°C hysteresis | Auto-recovers after cooling - protects against sustained overload without requiring system-level intervention |
Applications
| Smartphone Application Processor Power | Digital Camera Image Sensor Bias |
|---|---|
Use Scenario: Powers ARM-based application processors (e.g., Cortex-A series) requiring multiple tightly regulated rails: 1.2V core, 1.8V I/O, 2.8V camera interface, and 2.8V analog sensor bias. IC Role / Device Role / Timing Role: Dual buck regulators supply core and I/O voltages with voltage positioning; dual LDOs deliver low-noise bias for image signal processors and CMOS sensors. Use Value: Single-chip solution eliminates discrete regulators and reduces PCB area by >40% versus multi-IC approach while maintaining <±1.5% output accuracy across temperature. | Use Scenario: Supplies clean, sequenced power to high-resolution CMOS image sensors and accompanying ISP chips in compact digital cameras. IC Role / Device Role / Timing Role: OUT1 (1.2V) powers sensor digital core; OUT2 (1.8V) supplies I/O; OUT3/OUT4 (2.8V each) provide analog bias with independent EN3/EN4 control for sensor startup timing. Use Value: 75µVRMS LDO noise prevents fixed-pattern noise in captured images; individual enables ensure sensor analog rail powers before digital logic - avoiding initialization faults. |
| Portable MP3 Player Audio Subsystem | Handheld Medical Instrument Signal Chain |
Use Scenario: Delivers regulated power to audio codecs, DACs, headphone amplifiers, and flash memory in battery-operated MP3 players. IC Role / Device Role / Timing Role: Buck regulators supply 3.3V memory rail and 1.8V codec logic; LDOs provide 2.8V low-noise analog supply for DAC and amplifier stages. Use Value: 100µA no-load current extends playback time in pause mode; 57dB PSRR at <1kHz suppresses switching noise from entering audio path. | Use Scenario: Powers precision analog front-ends (AFE), ADCs, and microcontrollers in portable ECG or pulse oximeter devices. IC Role / Device Role / Timing Role: OUT1/OUT2 generate stable digital rails; OUT3/OUT4 deliver ultra-low-noise 2.8V/3.3V for op-amps and reference buffers in signal conditioning path. Use Value: 75µVRMS output noise ensures <1 LSB error in 16-bit ADC conversions; 1.7V LDO input minimum supports operation down to depleted battery voltage (3.0V system rail). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-buck-plus-dual-LDO power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023RSBR | Triple buck + dual LDO; 3MHz switching; 1.2V–3.3V adjustable; 600mA/600mA/300mA buck outputs | Higher integration (3 buck rails); higher switching frequency enables smaller inductors but increases EMI sensitivity | Choose when third buck rail is needed for memory or display; verify thermal performance at 3MHz in same 4mm × 4mm QFN |
| ADP5022ACBZ-1-R7 | Dual buck + dual LDO; 3MHz; 0.8V–3.3V adjustable; 600mA/600mA buck outputs; integrated power-good indicators | Includes PGOOD outputs for system monitoring; lacks voltage positioning feature and has lower LDO current (250mA vs. 300mA) | Prefer when system-level fault detection is required; avoid if voltage positioning for transient load mitigation is critical |
Compared with TPS65023RSBR and ADP5022ACBZ-1-R7, the MAX8668ETEX+T offers unique voltage positioning for improved transient response with reduced output capacitance, lower no-load current (100µA vs. ≥150µA), and higher LDO output current (300mA vs. 250mA), making it optimal for space-constrained, battery-sensitive portable designs where load-step stability is paramount.
Availability
MAX8668ETEX+T is available at Aetrix Electronics and suitable for smartphone power management, digital camera sensor biasing, portable audio subsystems, handheld medical instrumentation, and industrial handheld terminals requiring stable component supply and long-term production continuity.
Supply support for MAX8668ETEX+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for industrial, communications, computing, and consumer applications.
The MAX8668ETEX+T belongs to Maxim's portable power management product line, engineered specifically to consolidate multi-rail power delivery for battery-powered devices while minimizing board area, quiescent current, and electromagnetic emissions.
FAQ
What is the maximum input voltage rating for the MAX8668ETEX+T step-down regulators?
The MAX8668ETEX+T step-down regulators (OUT1 and OUT2) have an absolute maximum input voltage rating of +6.0V on IN12, with recommended operating range of 2.6V to 5.5V. Exceeding 6.0V may cause permanent damage. The LDO inputs (IN34) are rated to +6.0V relative to GND but limited to VIN34 ≤ VIN12 + 0.3V per internal clamp diode constraints. Always observe the 2.6V minimum for reliable buck operation and 1.7V minimum for LDO functionality.
How does voltage positioning work on the MAX8668ETEX+T, and how is it configured?
Voltage positioning on the MAX8668ETEX+T is implemented via the FB1 and FB2 pins using a three-resistor network (R1, R2, R6) that senses feedback from the LX node side of the inductor. This introduces controlled output droop proportional to load current and inductor DCR, allowing the load regulation slope to match transient droop - reducing peak-to-peak deviation and minimizing required output capacitance. Configuration requires calculating R1 and R6 based on desired ∆VOUT at full load and inductor DCR, with R2 typically set to 100kΩ.
Can the MAX8668ETEX+T operate with only the LDOs enabled while the buck converters remain off?
Yes, the MAX8668ETEX+T supports independent operation: EN1 and EN2 can be held low while EN3 and EN4 are driven high, enabling only OUT3 and OUT4. In this state, the buck sections draw <1µA total supply current, while the LDOs operate normally with 20µA quiescent current each and full 300mA output capability. This mode is ideal for powering always-on analog functions from a shared 3.3V rail while keeping processor rails disabled.
What is the thermal shutdown behavior of the MAX8668ETEX+T, and how does it recover?
The MAX8668ETEX+T activates thermal shutdown when junction temperature exceeds +160°C, disabling all regulators. Recovery occurs automatically once the die cools by 15°C (i.e., to ≤+145°C), at which point regulation resumes. During continuous overload, this results in pulsed output - a fail-safe mechanism that prevents permanent damage. For sustained operation, keep ambient temperature ≤+85°C and ensure the exposed paddle (EP) is soldered to a ≥100mm² copper pour for effective heat dissipation.
Is the MAX8668ETEX+T pin-compatible with the MAX8667 series?
No, the MAX8668ETEX+T is not pin-compatible with MAX8667 variants. While both share the same 16-pin thin QFN package and pinout numbering, their FB1/FB2 pin functions differ: MAX8668 uses Pins 8 and 14 as FB2 and FB1 for adjustable outputs, whereas MAX8667 uses those pins as direct OUT2/OUT1 outputs (factory preset). Swapping them without redesigning feedback networks and output routing will result in incorrect or unstable regulation.
MAX8668ETEX+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- *
- Package/Case:
- -
- Packaging:
- Product Status:
- Obsolete
- Topology:
- -
- Number of Outputs:
- -
- Frequency - Switching:
- -
- Voltage/Current - Output 1:
- -
- Voltage/Current - Output 2:
- -
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- -
- w/Supervisor:
- -
- w/Sequencer:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
MAX8668ETEX+T FAQ
1.How can I place an order for MAX8668ETEX+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX8668ETEX+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX8668ETEX+T reliable?
The price and inventory of MAX8668ETEX+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX8668ETEX+T is usually 5 days.
3.What payment methods are accepted for MAX8668ETEX+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX8668ETEX+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX8668ETEX+T?
MAX8668ETEX+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX8668ETEX+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX8668ETEX+T?
For technical support, including MAX8668ETEX+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX8668ETEX+T requirements.
6.How does Aetrix verify that MAX8668ETEX+T is sourced from the original manufacturer or authorized distributors?
All MAX8668ETEX+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX8668ETEX+T meets industry standards.
7.What is the process for return or replacement of MAX8668ETEX+T?
All MAX8668ETEX+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX8668ETEX+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX8668ETEX+T part is unused and in its original packaging.
Return procedure for MAX8668ETEX+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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