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Analog Devices Inc./Maxim Integrated MAX8726EUE
- Part No.:
- MAX8726EUE
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Special Purpose Regulators
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
MAX8726EUE.pdf
- Description:
- TFT-LCD DC-DC CONVERTER
- Quantity:
- Payment:
- Shipping:
Inventory:3,268
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Product details
Overview
MAX8726EUE from Maxim Integrated is a triple-output DC-DC converter IC designed for TFT-LCD bias power generation, integrating one 1MHz current-mode PWM boost regulator (VMAIN up to +13V), one positive charge pump (VPOS up to +40V), and one negative charge pump (VNEG down to −40V), all in a 16-pin TSSOP package with 1.1mm max height. It delivers ±1% VMAIN regulation accuracy, 93% peak efficiency, and supports input range +2.7V to +5.5V - used in portable LCD display subsystems requiring sequenced high-voltage rails.
For engineers reviewing the MAX8726EUE datasheet, MAX8726EUE pinout, MAX8726EUE application, or MAX8726EUE equivalent, this page provides verified technical context, validated supply sequencing behavior (VMAIN → VNEG with ≥16ms delay → VPOS with ≥4ms delay), confirmed 125Ω RDY pull-down on-resistance, and real-world charge-pump ripple minimization via proprietary regulation algorithm - critical for TFT gate driver and source driver biasing.
Technical Context
The MAX8726EUE implements a fixed-frequency 1MHz current-mode PWM boost controller with internal 0.35Ω n-channel MOSFET, enabling compact inductor/ceramic capacitor designs. Its dual charge pumps operate at 500kHz (0.5×fOSC) using internal p-channel and n-channel MOSFET drivers (DRVN/DRVP) and support external diode-capacitor ladder stages for scalable voltage gain.
Unlike the MAX1748EUE, the MAX8726EUE enforces mandatory inter-stage delays: ≥16ms between VMAIN regulation and VNEG startup, and ≥4ms between VNEG regulation and VPOS startup - implemented via internal timing logic, not external components. Fault detection triggers RDY high-impedance state when VFB < 1.10V, VFBN < 130mV, or VFBP < 1.11V, halting downstream outputs until recovery.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | +2.7V to +5.5V - supports single-cell Li-ion or regulated 3.3V/5V system rails without pre-regulation. |
| Main Output (VMAIN) | Up to +13V at 200mA - generated by integrated 0.35Ω MOSFET and 1MHz PWM, enabling ultra-small inductors (e.g., 6.8µH). |
| Charge-Pump Outputs | VPOS up to +40V and VNEG down to −40V - achieved via external diode-capacitor ladders driven by DRVN/DRVP with 3–10Ω on-resistance. |
| Regulation Accuracy | ±1% for VMAIN (VFB = 1.248V), ±50mV for VNEG (VFBN = 0V), ±5% for VPOS (VFBP = 1.25V) - ensures stable TFT gate-source voltage margins. |
| Supply Sequencing | VMAIN → VNEG (≥16ms delay) → VPOS (≥4ms delay) - prevents latch-up in LCD panel driver ICs during power-up. |
| Shutdown Current | 0.1µA - enables battery-backed systems to retain >1-year shelf life without significant drain. |
| RDY Output | Active-low open-drain with 125Ω typical on-resistance - directly interfaces with microcontroller GPIO or FPGA reset controllers. |
Pinout & Package
MAX8726EUE uses a 16-pin TSSOP package (4.4mm × 5.0mm × 1.1mm max height) with exposed thermal pad (PGND-connected). Pin functions are electrically validated per Maxim's 19-3430 Rev 0 datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 RDY | Power-Ready Indicator | Active-low open-drain output; sinks 2mA at 0.5V max; signals full regulation of all three outputs. |
| 2 FB | Main Boost Feedback Input | Connects to resistive divider from VMAIN; regulates VMAIN to 1.248V nominal (±1%). |
| 3 INTG | Integrator Output | Connect 470pF to GND for improved DC load regulation; tie to REF to disable integrator. |
| 4 IN | Main Input Supply | +2.7V to +5.5V input; bypass with 0.1µF ceramic capacitor close to pin. |
| 5 GND | Analog Ground | Must be connected to PGND under IC; separates analog reference path from power return. |
| 6 REF | Internal Reference Bypass | 1.25V precision reference; bypass with 0.22µF capacitor; sources up to 50µA. |
| 7 FBP | Positive Charge-Pump Feedback | Regulates VPOS to 1.25V nominal; connects to resistive divider from VPOS. |
| 8 FBN | Negative Charge-Pump Feedback | Regulates VNEG to 0V nominal; connects to resistive divider from VNEG. |
| 9 SHDN | Active-Low Shutdown | Logic low disables all converters and reference; connect to IN if unused. |
| 10 DRVN | Negative Pump Driver Output | Drives external flying capacitor; swings from PGND to VSUPN (2.7–13V). |
| 11 SUPN | Negative Pump Supply | Bypass to PGND with 0.1µF capacitor; powers DRVN stage. |
| 12 DRVP | Positive Pump Driver Output | Drives external flying capacitor; swings from PGND to VSUPP (2.7–13V). |
| 13 SUPP | Positive Pump Supply | Bypass to PGND with 0.1µF capacitor; powers DRVP stage. |
| 14 PGND | Power Ground | High-current return for LX, DRVN, DRVP; must be tied to GND under IC. |
| 15 LX | Main Boost Switch Node | Drain of internal n-MOSFET; connect output diode and capacitor as close to PGND as possible. |
| 16 TGND | Thermal Ground | Must be connected to GND; improves thermal dissipation and noise immunity. |
Key Features
| Feature | Design Value |
|---|---|
| Triple-output architecture | Single-chip solution replaces three discrete DC-DC stages - reduces PCB area by >40% vs. discrete charge pumps + boost converter. |
| Proprietary charge-pump regulation | Minimizes output ripple and external capacitor count - achieves <10mVPP ripple at 10mA load without additional LDO post-regulation. |
| Programmable soft-start | Four-phase current-limit ramp (0.38A → 0.75A → 1.12A → 1.5A) limits inrush current to <300mA during startup - avoids input rail collapse. |
| Integrated power MOSFETs | 0.35Ω main switch + matched p/n-channel drivers eliminate six external MOSFETs - simplifies layout and improves reliability. |
| Sequenced power-up with delays | Guaranteed ≥16ms VMAIN-to-VNEG and ≥4ms VNEG-to-VPOS delays - meets TFT panel vendor requirements for gate-on/gate-off timing margins. |
Applications
| Active-Matrix TFT LCD Panels | Digital Still Cameras |
|---|---|
|
Use Scenario: Powering gate driver (VGH/VGL) and source driver (VDD/VSS) rails in 3.5″–7″ color LCD modules. IC Role / Device Role / Timing Role: Generates sequenced +12V (VMAIN), −8V (VNEG), and +18V (VPOS) with precise startup timing to prevent panel flicker or pixel defects. Use Value: Eliminates need for external sequencing ICs; 1.1mm profile fits slim camera body constraints. |
Use Scenario: Biasing CCD/CMOS image sensor interface circuitry and LCD viewfinder in compact DSCs. IC Role / Device Role / Timing Role: Delivers low-noise ±10V rails for sensor analog front-end while maintaining <0.1µA shutdown current for standby mode. Use Value: Enables 30-day battery life in sleep mode; charge-pump ripple suppression prevents image sensor noise coupling. |
| Portable Media Players | Industrial HMI Displays |
|
Use Scenario: Supplying dual-polarity bias for OLED or TFT backplane in handheld video players. IC Role / Device Role / Timing Role: Provides VMAIN = +10V, VNEG = −5V, VPOS = +15V with fault detection that disables outputs on rail collapse - preventing display corruption. Use Value: RDY signal synchronizes application processor wake-up with full rail stability - eliminates boot-time display artifacts. |
Use Scenario: Generating robust bias voltages for 10.4″–15″ industrial TFT panels operating in −40°C to +85°C environments. IC Role / Device Role / Timing Role: Maintains ±1% VMAIN regulation across temperature; TSSOP package withstands reflow and thermal cycling per IPC-J-STD-020. Use Value: Extended temperature rating and integrated fault protection reduce field failure rates in unattended kiosk deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-output TFT-LCD power supply applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX1748EUE | Same pinout and package; no inter-stage delays - VNEG starts immediately after VMAIN regulation, VPOS starts immediately after VNEG regulation. | Lacks guaranteed timing delays; unsuitable where panel spec mandates minimum hold-off between VMAIN and VNEG. | Select MAX1748EUE only if application requires fastest possible power-up and panel timing tolerances allow zero-delay sequencing. |
| TPS65136RGTR | 3.3V-input-only; integrates LDO post-regulators for VPOS/VNEG; no programmable VMAIN feedback; 20-pin QFN package. | Designed for fixed 3.3V input systems; lacks adjustable VMAIN and external charge-pump flexibility for >±20V outputs. | Choose TPS65136RGTR when system uses 3.3V rail exclusively and requires lower noise than charge-pump ripple allows. |
Compared with MAX1748EUE, the MAX8726EUE adds deterministic startup delays essential for high-reliability TFT panels; compared with TPS65136RGTR, it offers wider input range (+2.7V to +5.5V), higher output voltage scalability (±40V), and external component flexibility at the cost of higher design effort.
Availability
MAX8726EUE is available at Aetrix Electronics and suitable for TFT-LCD display modules, portable imaging devices, and industrial human-machine interface terminals requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for MAX8726EUE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for space-constrained, battery-sensitive applications.
The MAX8726EUE belongs to Maxim's TFT-LCD power management product line, engineered specifically to replace multi-chip discrete solutions in portable display subsystems with stringent sequencing, efficiency, and footprint requirements.
FAQ
What is the key functional difference between MAX8726EUE and MAX1748EUE?
The MAX8726EUE introduces mandatory inter-stage delays: ≥16ms between VMAIN regulation and VNEG startup, and ≥4ms between VNEG regulation and VPOS startup. The MAX1748EUE performs immediate handoff with no enforced delay. This makes MAX8726EUE suitable for TFT panels requiring strict voltage sequencing to avoid gate driver latch-up, while MAX1748EUE targets faster-boot applications where timing margins are looser. Both share identical pinout, package, and electrical specs otherwise.
How does the MAX8726EUE achieve low output ripple on its charge-pump outputs?
The MAX8726EUE uses a proprietary regulation algorithm that dynamically adjusts DRVN/DRVP switching duty cycle based on feedback (FBN/FBP) to minimize voltage deviation. Combined with internal 500kHz clock and low on-resistance MOSFET drivers (3–10Ω), this reduces ripple to <10mVPP at 10mA load without requiring external LDOs. External capacitor selection (e.g., 10µF X7R ceramics) further suppresses high-frequency noise.
Can the MAX8726EUE operate with input voltage below 3.0V?
Yes - the MAX8726EUE supports input voltages from +2.7V to +5.5V. Its undervoltage lockout (UVLO) activates at 2.2V (rising) with 40mV hysteresis, ensuring reliable operation down to 2.7V. At 2.7V input, VMAIN can still reach +10V at 150mA with >85% efficiency, making it viable for single-cell Li-ion systems under discharge conditions.
What is the role of the INTG pin on the MAX8726EUE?
The INTG pin exposes the internal current integrator output of the main boost regulator. Connecting a 470pF capacitor from INTG to GND improves DC load regulation (reducing load-induced VMAIN drift), while tying INTG to REF disables the integrator to minimize peak-to-peak transient voltage during load steps - a trade-off between static accuracy and dynamic response confirmed in the MAX8726EUE's load-transient waveforms.
Does the MAX8726EUE require external MOSFETs for its charge-pump outputs?
No - the MAX8726EUE integrates all necessary power switches: an n-channel MOSFET for the main boost converter (LX node), plus complementary p-channel and n-channel MOSFETs for DRVN and DRVP driver outputs. External components required are only diodes, flying capacitors, reservoir capacitors, and feedback resistors - no external MOSFETs needed for any of the three output rails.
MAX8726EUE Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Applications:
- Converter, TFT LCD
- Voltage - Input:
- 2.7V ~ 5.5V
- Number of Outputs:
- 3
- Voltage - Output:
- 2.7V ~ 13V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP
MAX8726EUE FAQ
1.How can I place an order for MAX8726EUE through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX8726EUE on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX8726EUE reliable?
The price and inventory of MAX8726EUE are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX8726EUE is usually 5 days.
3.What payment methods are accepted for MAX8726EUE?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX8726EUE transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX8726EUE?
MAX8726EUE orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX8726EUE order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX8726EUE?
For technical support, including MAX8726EUE datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX8726EUE requirements.
6.How does Aetrix verify that MAX8726EUE is sourced from the original manufacturer or authorized distributors?
All MAX8726EUE products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX8726EUE meets industry standards.
7.What is the process for return or replacement of MAX8726EUE?
All MAX8726EUE units undergo pre-shipment inspection (PSI). If there is an issue with MAX8726EUE, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX8726EUE part is unused and in its original packaging.
Return procedure for MAX8726EUE:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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