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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Special Purpose Regulators

Analog Devices Inc./Maxim Integrated MAX8805ZEWEAC+T

Name: MAX8805ZEWEAC+T
Brand: Analog Devices Inc./Maxim Integrated
SKU: MAX8805ZEWEAC+T
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: MAX8805ZEWEAC+T

Manufacturer:: Analog Devices Inc./Maxim Integrated

Category:: Special Purpose Regulators

Package:: 16-WFBGA, WLBGA

Datasheet:: MAX8805ZEWEAC+T.pdf

Description:: IC CONV STP-DN PWM 600MA 16WLP

Quantity:: RFQ Add To RFQ list

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Product details

Overview

MAX8805ZEWEAC+T from Maxim Integrated is a 4MHz, 600mA high-frequency step-down converter with integrated 60mΩ bypass FET and dual 200mA low-noise LDOs, designed specifically to dynamically power WCDMA/NCDMA power amplifiers in mobile handsets. It supports analog voltage control (REFIN-to-OUT gain = 2V/V), delivers 7.5µs settling time for 0.8V–3.4V output transitions, and operates from 2.7V–5.5V input.

For engineers reviewing the MAX8805ZEWEAC+T datasheet, MAX8805ZEWEAC+T pinout, MAX8805ZEWEAC+T application, or MAX8805ZEWEAC+T equivalent, key selection considerations include its 4MHz switching frequency, 2V/V REFIN gain, automatic/forced bypass mode operation, dual independent LDO enable control, and 2mm × 2mm UCSP package compatibility with space-constrained RF front-end designs.

Technical Context

The MAX8805ZEWEAC+T implements a hysteretic PWM control scheme enabling fast transient response and stable regulation with minimal external components-only 2.2µF ceramic input/output capacitors required. Its feedback architecture samples directly from the LX node, eliminating phase lag from output capacitance and supporting ultra-small output caps without loop instability.

Bypass mode is triggered either automatically when VREFIN exceeds 0.465 × VIN2 (enabling seamless transition during high-power PA transmission) or forcibly via the HP logic input. The internal 60mΩ p-channel bypass FET sustains >1.5A total current in bypass, while the step-down stage delivers up to 600mA at 4MHz with <2% gain accuracy and 35µVRMS LDO noise.

Key Specifications

Parameter	Value and Actual Design Meaning
Switching Frequency	4MHz - enables use of tiny 2.2µF ceramic input/output capacitors and reduces solution footprint vs. 2MHz variants.
REFIN-to-PA_{_} Gain	2V/V - linear analog control allows precise, continuous PA output voltage adjustment from 0.4V to V_BATT.
Step-Down Output Drive	600mA - sufficient for medium/low-power WCDMA PA operation with 7.5µs settling time across 0.8V–3.4V range.
Bypass FET R_DS(ON)	60mΩ typical - minimizes dropout and conduction loss during high-power transmission, extending battery life.
LDO Output Noise	35µV_RMS typical - ensures clean bias for sensitive PA stages without added filtering.
Supply Voltage Range	2.7V to 5.5V - compatible with single-cell Li-ion (3.0–4.2V) and multi-cell or boosted supply rails.
Shutdown Current	0.1µA - critical for preserving standby battery life in cellular handset sleep modes.

Pinout & Package

The MAX8805ZEWEAC+T is housed in a 16-bump, 2mm × 2mm × 0.7mm UCSP (Ultra Compact Silicon Package) with 0.4mm pitch, optimized for RF-sensitive mobile applications.

Pin/Terminal	Circuit Role	Design Meaning
REFIN	Analog control input	Directly sets PA output voltage (V_{PA_} = 2 × V_REFIN); triggers automatic bypass at 0.465 × V_IN2.
HP	Digital bypass enable	Logic-high forces immediate bypass mode regardless of REFIN level; enables deterministic high-power timing.
PA_EN	Step-down converter enable	Active-high control; drives to GND for 0.1µA shutdown state with high-impedance LX.
EN1 / EN2	Independent LDO enables	Per-regulator logic control allows selective powering of PA bias rails to minimize quiescent current.
PAA / PAB	Bypass output terminals	Internally connected to IN1A/IN1B via 60mΩ FET in bypass mode; require local 2.2µF ceramic decoupling.
LDO1 / LDO2	Low-noise regulator outputs	Each delivers 200mA with 35µV_RMS noise and 70dB PSRR; bypassed with 1µF ceramic caps near AGND.
REFBP	Noise-reduction reference bypass	Internal 1.25V bandgap reference output; must be decoupled with 0.22µF ceramic to suppress LDO output noise.

Key Features

Feature	Design Value
Hysteretic PWM control	Enables 7.5µs output voltage settling and eliminates need for external compensation network.
Dual-mode PA power delivery	Seamlessly switches between high-efficiency PWM step-down (medium/low power) and low-dropout bypass (high power).
Voltage-positioning load regulation	Compensates for inductor DCR drop in real time, reducing load transient overshoot and improving dynamic accuracy.
Integrated REFBP reference	Provides low-noise 1.25V reference with dedicated bypass pin (REFBP) to achieve 35µV_RMS LDO noise performance.
UCSP package with AGND/PGND separation	Minimizes RF coupling between analog and power grounds; supports high-isolation layout for cellular front-end integration.

Applications

WCDMA Power Amplifier Supply	Cellular Handset RF Front-End
Use Scenario: Dynamically supplying variable-voltage power to WCDMA PA during transmit bursts with rapid output voltage scaling (e.g., 0.8V → 3.4V). IC Role / Device Role / Timing Role: Primary PA supply IC delivering both regulated step-down and direct battery bypass paths under analog (REFIN) and digital (HP) control. Use Value: Enables >30% battery life extension in talk mode by minimizing dropout loss during peak PA power via 60mΩ bypass FET.	Use Scenario: Providing clean, independently controlled bias voltages to multiple PA driver stages and RF switches in compact smartphone PCBs. IC Role / Device Role / Timing Role: Dual-LDO subsystem delivering 2.85V/2.85V bias rails with 70dB PSRR and 35µV_RMS noise, enabled only during active transmit. Use Value: Eliminates need for discrete LDOs and external noise filters, reducing BOM count by 4 components and saving 3.5mm² board area.
Smartphone Transmitter Module	NCDMA Handset Power Management
Use Scenario: Integrating PA supply, bias, and thermal protection into a single 2mm × 2mm UCSP device for multi-band LTE/WCDMA modules. IC Role / Device Role / Timing Role: System-level PA power manager coordinating step-down regulation, bypass activation, and LDO sequencing via shared IN2 rail and independent enables. Use Value: Reduces solution size by 40% versus discrete buck + dual-LDO + bypass switch implementation while maintaining <100mV load transient deviation.	Use Scenario: Supporting legacy NCDMA handset designs requiring high-efficiency, low-noise PA supply with analog envelope tracking interface. IC Role / Device Role / Timing Role: Analog-controlled PA supply IC accepting DAC-driven REFIN input and providing 2V/V gain scaling for envelope-following operation. Use Value: Achieves <±2% output accuracy over temperature and line, meeting NCDMA spectral mask requirements without closed-loop calibration.

WCDMA Power Amplifier Supply

Cellular Handset RF Front-End

Use Scenario: Dynamically supplying variable-voltage power to WCDMA PA during transmit bursts with rapid output voltage scaling (e.g., 0.8V → 3.4V).

IC Role / Device Role / Timing Role: Primary PA supply IC delivering both regulated step-down and direct battery bypass paths under analog (REFIN) and digital (HP) control.

Use Value: Enables >30% battery life extension in talk mode by minimizing dropout loss during peak PA power via 60mΩ bypass FET.

Use Scenario: Providing clean, independently controlled bias voltages to multiple PA driver stages and RF switches in compact smartphone PCBs.

IC Role / Device Role / Timing Role: Dual-LDO subsystem delivering 2.85V/2.85V bias rails with 70dB PSRR and 35µV_RMS noise, enabled only during active transmit.

Use Value: Eliminates need for discrete LDOs and external noise filters, reducing BOM count by 4 components and saving 3.5mm² board area.

Smartphone Transmitter Module

NCDMA Handset Power Management

Use Scenario: Integrating PA supply, bias, and thermal protection into a single 2mm × 2mm UCSP device for multi-band LTE/WCDMA modules.

IC Role / Device Role / Timing Role: System-level PA power manager coordinating step-down regulation, bypass activation, and LDO sequencing via shared IN2 rail and independent enables.

Use Value: Reduces solution size by 40% versus discrete buck + dual-LDO + bypass switch implementation while maintaining <100mV load transient deviation.

Use Scenario: Supporting legacy NCDMA handset designs requiring high-efficiency, low-noise PA supply with analog envelope tracking interface.

IC Role / Device Role / Timing Role: Analog-controlled PA supply IC accepting DAC-driven REFIN input and providing 2V/V gain scaling for envelope-following operation.

Use Value: Achieves <±2% output accuracy over temperature and line, meeting NCDMA spectral mask requirements without closed-loop calibration.

Equivalent & Alternatives

The following parts are listed as comparable options for similar PA power management applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
MAX8805YEREXX+T	2MHz switching frequency; same 2V/V REFIN gain and 600mA rating; slower switching requires larger inductors/caps.	Preferred where EMI sensitivity outweighs size constraints; lower switching losses improve efficiency at light loads.	Select when board-level EMI filtering is limited and 2MHz operation meets transient response requirements.
MAX8805XEREXX+T	4MHz switching frequency but 2.5V/V REFIN gain; 650mA output drive; different bypass threshold (0.372 × VIN2).	Suitable for higher-VOUT PA bias schemes (e.g., 2.5V–3.6V range); not drop-in due to gain and threshold mismatch.	Choose only if system DAC output range aligns with 0.32V–1.76V REFIN span and higher output current is needed.

Compared with MAX8805YEREXX+T, the MAX8805ZEWEAC+T offers faster transient response and smaller passive components due to 4MHz operation, while differing from MAX8805XEREXX+T in REFIN gain and bypass threshold-making it uniquely suited for 2V/V envelope-tracking systems requiring minimal footprint and ultra-fast PA voltage scaling.

Availability

MAX8805ZEWEAC+T is available at Aetrix Electronics and suitable for WCDMA/NCDMA handset design, smartphone RF front-end development, and cellular module production requiring stable component supply with full traceability and long-term lifecycle support.

Supply support for MAX8805ZEWEAC+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for communications, computing, and consumer markets.

The MAX8805 family was engineered specifically for dynamic PA power delivery in 3G cellular handsets, integrating step-down conversion, bypass FET, and dual LDOs into a single UCSP package to eliminate discrete solutions and reduce RF interference.

FAQ

What is the switching frequency of the MAX8805ZEWEAC+T?

The MAX8805ZEWEAC+T operates at a fixed 4MHz switching frequency. This high frequency allows the use of small 2.2µF ceramic input and output capacitors, significantly reducing solution size compared to 2MHz alternatives like the MAX8805Y series. The 4MHz clock is internally generated and not user-adjustable.

What is the REFIN-to-PA_{_} voltage gain for the MAX8805ZEWEAC+T?

The MAX8805ZEWEAC+T has a REFIN-to-PA_{_} gain of 2V/V. This means the PA output voltage equals twice the applied REFIN voltage (V_{PA_} = 2 × V_REFIN), enabling precise analog control of PA supply from 0.4V to V_BATT. This gain is fixed and differs from the 2.5V/V gain used in MAX8805W/MAX8805X variants.

How does bypass mode activate on the MAX8805ZEWEAC+T?

Bypass mode on the MAX8805ZEWEAC+T activates either automatically when V_REFIN exceeds 0.465 × V_IN2, or forcibly when the HP pin is driven logic-high. In bypass mode, the internal 60mΩ p-channel FET connects IN1A/IN1B directly to PAA/PAB, disabling the step-down converter and delivering battery voltage with minimal dropout.

What are the key LDO specifications of the MAX8805ZEWEAC+T?

The MAX8805ZEWEAC+T integrates two independent 200mA LDOs (LDO1 and LDO2) with 35µV_RMS output noise, 70dB PSRR (10Hz–10kHz), and 70mV typical dropout at 100mA. Each LDO features individual enable (EN1/EN2) and requires a 1µF ceramic output capacitor. Both share the same IN2 input rail and AGND reference.

What package type and dimensions does the MAX8805ZEWEAC+T use?

The MAX8805ZEWEAC+T uses a 16-bump UCSP (Ultra Compact Silicon Package) measuring 2.0mm × 2.0mm × 0.7mm maximum height, with 0.4mm bump pitch. This wafer-level package provides excellent thermal performance and RF isolation, making it ideal for space-constrained cellular handset applications where ground separation (AGND/PGND) is critical.

MAX8805ZEWEAC+T Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc./Maxim Integrated

Series:: -

Package/Case:: 16-WFBGA, WLBGA

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Applications:: Converter, WCDMA PA Power

Voltage - Input:: 2.7V ~ 5.5V

Number of Outputs:: 1

Voltage - Output:: 0.4V ~ 5.5V

Operating Temperature:: -40°C ~ 85°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-WLP

MAX8805ZEWEAC+T FAQ

1.How can I place an order for MAX8805ZEWEAC+T through Aetrix?

Please submit a Request for Quotation (RFQ) for MAX8805ZEWEAC+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for MAX8805ZEWEAC+T reliable?

The price and inventory of MAX8805ZEWEAC+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX8805ZEWEAC+T is usually 5 days.

3.What payment methods are accepted for MAX8805ZEWEAC+T?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX8805ZEWEAC+T transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for MAX8805ZEWEAC+T?

MAX8805ZEWEAC+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your MAX8805ZEWEAC+T order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for MAX8805ZEWEAC+T?

For technical support, including MAX8805ZEWEAC+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX8805ZEWEAC+T requirements.

6.How does Aetrix verify that MAX8805ZEWEAC+T is sourced from the original manufacturer or authorized distributors?

All MAX8805ZEWEAC+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX8805ZEWEAC+T meets industry standards.

7.What is the process for return or replacement of MAX8805ZEWEAC+T?

All MAX8805ZEWEAC+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX8805ZEWEAC+T, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The MAX8805ZEWEAC+T part is unused and in its original packaging.

Return procedure for MAX8805ZEWEAC+T:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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