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Analog Devices Inc./Maxim Integrated MAX96724RGTN/V+
- Part No.:
- MAX96724RGTN/V+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Serializers, Deserializers
- Package:
- 56-WFQFN Exposed Pad
- Datasheet:
-
MAX96724RGTN/V+.pdf
- Description:
- GMSL2/1 TUNNELING QUAD DESERIALI
- Quantity:
- Payment:
- Shipping:
Inventory:3,083
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Product details
Overview
MAX96724RGTN/V+ from Analog Devices is an automotive-grade quad GMSL2/1-to-MIPI CSI-2 deserializer that converts four high-speed serial inputs (3Gbps or 6Gbps forward, 187.5Mbps reverse) into up to four MIPI D-PHY v1.2 (2.5Gbps/lane) or C-PHY v1.0 (5.7Gbps/lane) outputs. It supports aggregation and replication of video streams from up to four remote sensors over 50Ω coax or 100Ω STP cables and operates across -40°C to +105°C for ADAS camera systems.
For engineers reviewing the MAX96724RGTN/V+ datasheet, MAX96724RGTN/V+ pinout, MAX96724RGTN/V+ application, or MAX96724RGTN/V+ equivalent, key selection criteria include ASIL-B compliance, RoR (Reference over Reverse) clocking support, 16/32 virtual channel capability, auto-adaptive equalization for cable aging compensation, and side-wettable 56-pin TQFN-SW package for optical inspection.
Technical Context
The MAX96724RGTN/V+ implements a dual-mode GMSL2/GMSL1 receiver architecture with independent configuration per input channel, enabling mixed-mode operation (e.g., two GMSL2 + two GMSL1 links). Its internal AEQ (Automatic Adaptive Equalization) continuously adjusts to channel loss up to -21.0dB at 3.0GHz (6Gbps), supporting aged cables at +105°C.
It integrates bidirectional control channels with two I²C ports (up to 1Mbps) and nine configurable GPIOs, plus hardware-level frame sync and vertical/data-enable timing outputs. The device performs real-time D-PHY-to-C-PHY packet conversion and supports partial FCFS aggregation across video pipes without host CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| GMSL Forward Rate | 3Gbps or 6Gbps per link - enables HD/4K multi-sensor video transport over single coax/STP |
| GMSL Reverse Rate | 187.5Mbps (GMSL2) / 1Mbps (GMSL1) - supports sensor configuration, diagnostics, and GPIO control |
| MIPI Output Format | D-PHY v1.2 (2.5Gbps/lane) or C-PHY v1.0 (5.7Gbps/lane) - direct interface to SoC image signal processors |
| Virtual Channels | 16 (D-PHY) / 32 (C-PHY) - enables concurrent routing of multiple camera streams to distinct processing paths |
| Operating Temp | -40°C to +105°C ambient - qualified for under-hood and surround-view camera module deployment |
| Insertion Loss | -21.0dB max at 3.0GHz (6Gbps) - ensures robust link integrity on long, aged coaxial runs |
| Package | 56-pin TQFN-SW, 8mm × 8mm, 0.4mm pitch - side-wettable leads enable automated optical solder-joint inspection |
Pinout & Package
MAX96724RGTN/V+ uses a 56-pin TQFN-SW (Package Code T5688Y+6C) with exposed pad thermally connected to PCB ground. The package supports reflow soldering per JEDEC J-STD-020 and features side-wettable flanks for post-solder AOI.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SIOA–SIOD | GMSL Serial Input Pairs | Four differential inputs accepting GMSL2 (3/6Gbps) or GMSL1 (3.12Gbps) pixel/tunnel data |
| DA_P/N, DB_P/N, DC_P/N, DD_P/N | MIPI CSI-2 D-PHY/C-PHY Outputs | Configurable as 2×4-lane or 4×2-lane outputs; support both D-PHY HS/LP and C-PHY HS/LP modes |
| SCLK, SDATA | I²C Host Interface | Main I²C port (up to 1Mbps) for register configuration and status readback |
| GPIO0–GPIO8 | Configurable General-Purpose I/O | Programmable as input/output/pullup/pulldown; support sensor sync, LED control, or fault signaling |
| PWDNB | Active-Low Power-Down Control | Hardware reset input; asserts full shutdown with <1μA quiescent current when held low |
| X1, X2 | Crystal Oscillator Inputs | Supports external 24MHz crystal for reference clock generation; integrated oscillator circuitry |
Key Features
| Feature | Design Value |
|---|---|
| Auto Adapt for Channel Conditions | AEQ continuously tunes equalization coefficients in real time to compensate for temperature drift and cable aging |
| Reference over Reverse (RoR) | Extracts precise clock from reverse channel, eliminating need for separate reference clock trace to SoC |
| Aggregation & Replication | Hardware-accelerated merging or duplication of video pipes without CPU overhead or added latency |
| D-PHY ↔ C-PHY Conversion | On-the-fly protocol translation enables legacy D-PHY imagers to connect to C-PHY SoCs without firmware change |
| ASIL-B Compliance | Includes lock detection, error forwarding (EMB8), and diagnostic registers aligned with ISO 26262 requirements |
Applications
| Automotive Surround-View System | ADAS Front-Facing Camera Module |
|---|---|
|
Use Scenario: Four fisheye cameras mounted at vehicle corners feed video to a central domain controller via coaxial cables. IC Role / Device Role / Timing Role: Deserializes GMSL2 streams, aggregates feeds into unified CSI-2 output, and provides frame-synced timing to SoC. Use Value: Reduces cabling weight by >40% vs. LVDS; enables 15m cable reach at 6Gbps with ASIL-B diagnostics. |
Use Scenario: High-resolution monocular camera captures traffic signs and lane markings for L2+ autonomy. IC Role / Device Role / Timing Role: Converts GMSL2 tunnel mode data to C-PHY output compatible with next-gen vision SoC. Use Value: Supports 4K@30fps with sub-10ms end-to-end latency and RoR clocking eliminates jitter-sensitive clock routing. |
| Rear-View Camera with Integrated Radar | Driver Monitoring System (DMS) |
|
Use Scenario: Co-located rear camera and short-range radar share same coaxial cable using GMSL2 tunnel mode. IC Role / Device Role / Timing Role: Separates radar control data (reverse channel) from video payload (forward channel) with dedicated I²C pass-through. Use Value: Enables dual-function sensor node with single-cable installation and deterministic 187.5Mbps reverse bandwidth. |
Use Scenario: In-cabin IR camera streams eye-tracking and facial expression data to infotainment SoC. IC Role / Device Role / Timing Role: Deserializes low-latency GMSL1 stream and routes via MIPI CSI-2 with GPIO-triggered wake-on-event. Use Value: Achieves <2ms GPI-to-GPO delay for driver alert triggering and meets AEC-Q100 Grade 2 thermal profile. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar GMSL deserializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX96724FETN/V+ | Same silicon die; differs only in temperature screening (−40°C to +105°C vs. −40°C to +125°C for /F variant) | Not rated for extended high-temp environments (e.g., front-grille mounting); identical functional behavior | Select MAX96724RGTN/V+ for production ADAS modules requiring full automotive grade qualification. |
| MAX96724RETQ+ | 56-pin TQFN (non-side-wettable); lacks AOI-compatible flank plating | Requires X-ray inspection instead of optical; higher assembly verification cost in high-volume automotive lines | Choose MAX96724RGTN/V+ when automated optical solder-joint inspection is mandated by OEM process control plans. |
Compared with MAX96724FETN/V+ and MAX96724RETQ+, the MAX96724RGTN/V+ uniquely combines full ASIL-B compliance, side-wettable lead finish for AOI, and guaranteed −40°C to +105°C operation-making it the preferred choice for safety-critical, high-volume automotive camera designs.
Availability
MAX96724RGTN/V+ is available at Aetrix Electronics and suitable for automotive surround-view systems, ADAS front-camera modules, and driver monitoring systems requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant sourcing.
Supply support for MAX96724RGTN/V+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision, power, and connectivity applications.
The MAX96724RGTN/V+ belongs to Analog Devices' GMSL serializer/deserializer product line, engineered specifically for automotive vision systems requiring ultra-reliable, low-latency, high-bandwidth serial links between cameras and domain controllers.
FAQ
What is the maximum supported cable length for MAX96724RGTN/V+ at 6Gbps over 50Ω coax?
The MAX96724RGTN/V+ supports up to 15 meters of 3.2mm Ø foam-dielectric 50Ω coax at +105°C when operating at 6Gbps forward rate and 187.5Mbps reverse rate. This value is derived from measured insertion loss (1.1dB/m max at 3GHz, aged condition) and the device's −21.0dB channel loss budget. Cable length must be derated for solid-dielectric coax or STP due to higher attenuation.
Does MAX96724RGTN/V+ support both GMSL2 and GMSL1 protocols simultaneously?
Yes, the MAX96724RGTN/V+ supports mixed-mode operation: each of its four serial inputs (SIOA–SIOD) can be independently configured for GMSL2 (3Gbps/6Gbps) or GMSL1 (3.12Gbps) in either pixel or tunnel mode. This allows heterogeneous camera clusters-e.g., two GMSL2 surround-view cameras and two GMSL1 interior DMS sensors-to share one deserializer.
What is the purpose of Reference over Reverse (RoR) in MAX96724RGTN/V+?
RoR in the MAX96724RGTN/V+ extracts a clean, low-jitter reference clock directly from the GMSL reverse channel, eliminating the need for a separate crystal or clock distribution network to the SoC. This reduces PCB layer count, EMI, and timing skew-critical for maintaining MIPI CSI-2 eye diagram integrity at 2.5Gbps/lane.
How many virtual channels does MAX96724RGTN/V+ support, and why does it matter?
The MAX96724RGTN/V+ supports 16 virtual channels in D-PHY mode and 32 in C-PHY mode. This enables simultaneous routing of multiple independent video streams (e.g., raw sensor data, ISP-processed preview, HDR metadata) over a single physical CSI-2 interface-reducing SoC pin count and simplifying software demultiplexing.
Is MAX96724RGTN/V+ pin-compatible with other devices in the MAX967xx family?
No, MAX96724RGTN/V+ is not pin-compatible with earlier MAX967xx deserializers (e.g., MAX96705, MAX96717). It uses a unique 56-pin TQFN-SW footprint with dedicated GMSL2/C-PHY signaling, RoR clock extraction pins, and enhanced GPIO routing. Migration requires PCB layout revision and firmware adaptation.
MAX96724RGTN/V+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 56-WFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Function:
- Deserializer
- Data Rate:
- 6Gbps
- Input Type:
- GMSL
- Output Type:
- CSI-2, MIPI
- Number of Inputs:
- 4
- Number of Outputs:
- 2
- Voltage - Supply:
- 0.95V ~ 1.05V, 1.14V ~ 1.26V, 1.7V ~ 1.9V, 1.7V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 56-TQFN (8x8)
MAX96724RGTN/V+ FAQ
1.How can I place an order for MAX96724RGTN/V+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX96724RGTN/V+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX96724RGTN/V+ reliable?
The price and inventory of MAX96724RGTN/V+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX96724RGTN/V+ is usually 5 days.
3.What payment methods are accepted for MAX96724RGTN/V+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX96724RGTN/V+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX96724RGTN/V+?
MAX96724RGTN/V+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX96724RGTN/V+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX96724RGTN/V+?
For technical support, including MAX96724RGTN/V+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX96724RGTN/V+ requirements.
6.How does Aetrix verify that MAX96724RGTN/V+ is sourced from the original manufacturer or authorized distributors?
All MAX96724RGTN/V+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX96724RGTN/V+ meets industry standards.
7.What is the process for return or replacement of MAX96724RGTN/V+?
All MAX96724RGTN/V+ units undergo pre-shipment inspection (PSI). If there is an issue with MAX96724RGTN/V+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX96724RGTN/V+ part is unused and in its original packaging.
Return procedure for MAX96724RGTN/V+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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