Analog Devices Inc./Maxim Integrated MAX98090BEWJ+T
- Part No.:
- MAX98090BEWJ+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- CODECS
- Package:
- 49-WFBGA, WLBGA
- Datasheet:
-
MAX98090BEWJ+T.pdf
- Description:
- IC CODEC AUDIO I2S STER 49-WLP
- Quantity:
- Payment:

- Shipping:

Inventory:4,202
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Product details
Overview
The MAX98090BEWJ+T from Analog Devices is a fully integrated ultra-low power stereo audio codec in a 49-bump 0.4mm WLP package, featuring 102dB DR stereo DAC, 99dB DR stereo ADC, FlexSound® DSP, stereo Class D speaker amplifier (3.2W/channel into 4Ω), and DirectDrive® Class H headphone amplifier. It supports I²S/TDM digital audio interface, 8–96kHz sample rates, and six configurable analog/digital microphone/line inputs for portable audio systems.
For engineers reviewing the MAX98090BEWJ+T datasheet, MAX98090BEWJ+T pinout, MAX98090BEWJ+T application, or MAX98090BEWJ+T equivalent, this page delivers verified specifications, validated pin functions, confirmed use cases in headset detection, speaker playback, headphone drive, and microphone recording, plus two technically documented alternative audio codecs with explicit functional and packaging differences.
Technical Context
The MAX98090BEWJ+T implements dual-path signal processing: record path includes biquad filtering and digital gain control before the 99dB DR stereo ADC; playback path integrates a 7-band parametric equalizer, dynamic range control, and digital filtering before the 102dB DR stereo DAC. Its clock architecture accepts master clock frequencies from 256 × fS up to 60MHz and supports both master and slave digital audio interface modes.
Power management is optimized for portable operation: 3.6mW stereo playback and 4.2mW stereo record consumption at typical conditions. The device integrates jack detection with programmable debounce, accessory button sensing, and RF-immune analog I/O-enabling robust headset insertion recognition and noise-resistant microphone input routing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DAC Dynamic Range | 102dB - Enables high-fidelity headphone playback with minimal quantization noise in portable battery-powered devices. |
| ADC Dynamic Range | 99dB - Supports clean voice capture from analog/digital microphones without audible background hiss. |
| Playback Power | 3.6mW - Allows extended battery life in always-on audio monitoring or low-duty-cycle playback applications. |
| Record Power | 4.2mW - Permits continuous voice recording in wearables or IoT edge nodes with tight thermal constraints. |
| Speaker Output | 3.2W/channel into 4Ω - Drives compact loudspeakers directly without external amplification, reducing BOM count. |
| Headphone Drive | DirectDrive® Class H - Eliminates DC-blocking capacitors, enabling smaller PCB footprint and faster startup transient response. |
| Digital Interface | I²S/LJ/RJ/TDM - Compatible with common SoC audio controllers and enables flexible channel mapping for multi-mic arrays. |
Pinout & Package
The MAX98090BEWJ+T is housed in a 49-bump, 0.4mm pitch Wafer-Level Package (WLP), optimized for space-constrained portable designs. Pin functions are defined per bump position in the official datasheet (Rev 7, p.64–65).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDIO | Digital I/O supply | 1.8V tolerant interface rail; decoupling required for stable I²S/TDM timing integrity. |
| VDDA | Analog supply | 1.2V–1.8V analog core rail; separate bypassing prevents digital switching noise coupling into ADC/DAC paths. |
| SPK_L+, SPK_L− | Left speaker differential output | Class D outputs supporting filterless operation into 4Ω or 8Ω loads; requires proper EMI layout per datasheet Fig.35. |
| HPL, HPR | Headphone left/right outputs | Ground-referenced DirectDrive outputs; no DC-blocking caps needed-reduces component count and board area. |
| MIC1P, MIC1N | Differential analog mic input | Configurable PGA input pair with programmable bias; supports electret condenser mics with >100dB SNR performance. |
| PDMCLK, PDM_DATA | Digital microphone clock/data | Supports up to two PDM microphones; synchronous clocking ensures deterministic latency for beamforming algorithms. |
| HPSENSE | Headphone sense input | Monitors jack insertion via internal comparator; enables automatic routing between speaker/headphone output paths. |
Key Features
| Feature | Design Value |
|---|---|
| FlexSound® DSP | On-chip 7-band parametric EQ + dynamic range control + biquad filter-enables loudspeaker compensation and adaptive volume leveling without host CPU overhead. |
| Jack Detection & ID | Hardware-based TRS/TRRS identification with programmable debounce-supports headset presence, button press, and earpiece/mic configuration auto-detection. |
| RF-Immune Analog I/O | Integrated RF rejection circuitry on all analog inputs/outputs-maintains SNR in cellular/Wi-Fi coexistence environments without external shielding. |
| Click-and-Pop Reduction | Zero-crossing detection and controlled ramp-up/down sequencing-eliminates audible transients during power-up, mute, or mode transitions. |
| I²C Control Interface | Two selectable slave addresses (0x34/0x35)-allows multiple MAX98090 devices on same bus for multi-audio-zone systems. |
Applications
| Smartphone Voice Call System | Wireless Headset Audio Hub |
|---|---|
Use Scenario: Full-duplex voice call with simultaneous microphone capture and loudspeaker/headphone playback in mobile handsets. IC Role / Device Role / Timing Role: Audio codec handling ADC recording from dual analog mics, DAC playback to speaker/headphone, and real-time sidetone generation. Use Value: 99dB ADC DR and 102dB DAC DR ensure clear near-end speech capture and intelligible far-end playback even under noisy conditions. | Use Scenario: Bluetooth-enabled headset with built-in mic array, speaker driver, and touch-sensitive controls. IC Role / Device Role / Timing Role: Central audio processor managing PDM mic input, TDM audio streaming to BT SoC, and Class D speaker drive with jack detection for mode switching. Use Value: 4.2mW record + 3.6mW playback power enables >10hr battery life; integrated jack detection eliminates need for external sense IC. |
| Tablet Media Playback System | IoT Voice Assistant Endpoint |
Use Scenario: High-quality stereo media playback through integrated speakers and optional headphones in Android/iOS tablets. IC Role / Device Role / Timing Role: Stereo DAC driving Class D speakers and DirectDrive headphone amp; FlexSound DSP applying loudspeaker EQ and DRC for consistent volume across content types. Use Value: 3.2W/channel Class D output drives 4Ω speakers efficiently; 7-band EQ compensates for enclosure acoustic limitations. | Use Scenario: Always-listening smart speaker with wake-word detection, local voice processing, and far-field mic input. IC Role / Device Role / Timing Role: Low-power ADC front-end for three analog mic inputs; digital audio interface streams pre-processed data to application processor. Use Value: Programmable microphone bias and RF-immune inputs maintain SNR in RF-noisy home environments; 99dB DR supports accurate keyword spotting. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar stereo audio codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX98091BEWJ+T | Same die, 40-pin TQFN package (vs. 49-bump WLP); identical electrical specs and register map. | Preferred for prototyping or layouts requiring rework-friendly QFN; not suitable for ultra-thin form factors. | Select MAX98091BEWJ+T when manual soldering, test fixture access, or thermal pad inspection is required. |
| TLV320AIC3254IRHBT | Lower DAC DR (100dB), higher playback power (5.2mW), no Class D speaker amp; supports 192kHz sampling. | Better suited for high-resolution audio playback systems without speaker drive requirement; lacks integrated jack detection. | Choose TLV320AIC3254IRHBT for studio-grade line-out applications where speaker amplification is handled externally. |
Compared with MAX98090BEWJ+T, the MAX98091BEWJ+T offers identical functionality in a more manufacturable package, while the TLV320AIC3254IRHBT trades integrated speaker drive and jack detection for higher sampling rate support and simplified analog output routing.
Availability
The MAX98090BEWJ+T is available at Aetrix Electronics and suitable for smartphone voice subsystems, wireless headset audio hubs, tablet media playback systems, and IoT voice assistant endpoints requiring stable component supply and long-term production continuity.
Supply support for MAX98090BEWJ+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and consumer markets.
The MAX98090BEWJ+T belongs to Analog Devices' ultra-low power audio codec product line, engineered specifically for battery-constrained portable devices demanding high-fidelity audio, intelligent signal processing, and system-level integration of microphone, speaker, and headphone interfaces.
FAQ
What is the maximum supported sample rate for the MAX98090BEWJ+T?
The MAX98090BEWJ+T supports digital audio sample rates from 8kHz to 96kHz across I²S, left-justified, right-justified, and TDM formats. This range covers voice communication (8–16kHz), standard music playback (44.1/48kHz), and high-definition audio (96kHz), with all rates validated in the device's digital audio interface timing specifications (datasheet p.27–28). The MAX98090BEWJ+T does not support 192kHz operation.
Does the MAX98090BEWJ+T include integrated speaker amplification?
Yes, the MAX98090BEWJ+T integrates stereo low-EMI Class D speaker amplifiers capable of delivering 3.2W per channel into 4Ω loads and 1.8W per channel into 8Ω loads at 5V supply. These amplifiers support filterless operation and include extensive click-and-pop suppression-enabling direct connection to speakers without external passive components or heatsinking in most portable applications.
How does jack detection work on the MAX98090BEWJ+T?
The MAX98090BEWJ+T implements hardware-based jack detection using internal comparators and programmable debounce logic. It identifies TRS (stereo) and TRRS (stereo + mic) configurations by measuring voltage thresholds on HPSENSE and other pins. The MAX98090BEWJ+T generates interrupts upon insertion/removal and supports accessory button detection-enabling automatic audio path routing without host software polling.
Can the MAX98090BEWJ+T accept digital PDM microphone inputs?
Yes, the MAX98090BEWJ+T provides dedicated PDMCLK and PDM_DATA terminals supporting up to two stereo PDM microphones. The digital microphone interface includes configurable clock frequency compensation and synchronization logic, allowing low-latency, high-SNR voice capture without requiring external decimation filters or additional MCU resources.
What power supply rails does the MAX98090BEWJ+T require?
The MAX98090BEWJ+T requires three primary supplies: VDDA (1.2V–1.8V analog core), VDDIO (1.8V digital I/O), and VSPK_VDD (2.7V–5.5V speaker amplifier). Separate bypassing is mandatory-per datasheet recommendations-to prevent digital noise coupling into sensitive analog paths and ensure specified 99dB ADC and 102dB DAC dynamic range performance.
MAX98090BEWJ+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- FlexSound™
- Package/Case:
- 49-WFBGA, WLBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Stereo Audio
- Data Interface:
- I2C
- Resolution (Bits):
- 24 b
- Number of ADCs / DACs:
- 2 / 2
- Sigma Delta:
- No
- S/N Ratio, ADCs / DACs (db) Typ:
- 99 / 102
- Dynamic Range, ADCs / DACs (db) Typ:
- 99 / 102
- Voltage - Supply, Analog:
- 1.65V ~ 3.6V
- Voltage - Supply, Digital:
- 1.08V ~ 1.98V, 1.65V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 49-WLP (3.15x3.15)
MAX98090BEWJ+T FAQ
1.How can I place an order for MAX98090BEWJ+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX98090BEWJ+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX98090BEWJ+T reliable?
The price and inventory of MAX98090BEWJ+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX98090BEWJ+T is usually 5 days.
3.What payment methods are accepted for MAX98090BEWJ+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX98090BEWJ+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX98090BEWJ+T?
MAX98090BEWJ+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX98090BEWJ+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX98090BEWJ+T?
For technical support, including MAX98090BEWJ+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX98090BEWJ+T requirements.
6.How does Aetrix verify that MAX98090BEWJ+T is sourced from the original manufacturer or authorized distributors?
All MAX98090BEWJ+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX98090BEWJ+T meets industry standards.
7.What is the process for return or replacement of MAX98090BEWJ+T?
All MAX98090BEWJ+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX98090BEWJ+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX98090BEWJ+T part is unused and in its original packaging.
Return procedure for MAX98090BEWJ+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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