Analog Devices Inc./Maxim Integrated MAX9986ETP+D
- Part No.:
- MAX9986ETP+D
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- RF Mixers
- Package:
- 20-WQFN Exposed Pad
- Datasheet:
-
MAX9986ETP+D.pdf
- Description:
- IC MIXER 815MHZ-1GHZ DWN 20TQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
The MAX9986ETP+D from Maxim Integrated is a SiGe high-linearity downconversion mixer designed for 815MHz–995MHz RF input in base-station receivers, delivering 10dB conversion gain, +23.6dBm IIP3, and 9.3dB noise figure with integrated LO buffer, SPDT LO switch, and on-chip baluns for single-ended RF/LO interfaces.
For engineers reviewing the MAX9986ETP+D datasheet, MAX9986ETP+D pinout, MAX9986ETP+D application, or MAX9986ETP+D equivalent, key selection criteria include high-side LO injection support (960–1180MHz), differential IF output (50–250MHz), -3dBm to +3dBm LO drive requirement, and compatibility with common PCB layouts across frequency bands.
Technical Context
The MAX9986ETP+D implements a double-balanced passive mixer core driven by an integrated two-stage LO buffer, enabling high linearity and low noise without external LO amplification. Its internal RF and LO baluns eliminate need for external matching components while supporting 50Ω single-ended inputs.
It features a digitally controlled SPDT LO switch (LOSEL input) with 49dB LO1–LO2 isolation and 50ns switching time, plus differential open-collector IF outputs requiring external pull-up chokes - optimized for enhanced 2LO-2RF rejection and IIP2 performance in cellular infrastructure receivers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| RF Frequency Range | 815MHz to 995MHz - supports W-CDMA, GSM 850/900, cdma2000, iDEN base-station bands. |
| LO Frequency Range | 960MHz to 1180MHz - enables high-side LO injection architecture; requires no external LO amplifier. |
| IF Frequency Range | 50MHz to 250MHz - accommodates standard IF processing stages with differential 200Ω output impedance. |
| Conversion Gain | 10dB typical - reduces need for post-mixer amplification; flatness ±0.15dB over 25MHz sub-bands. |
| IIP3 | +23.6dBm at +25°C - ensures robust handling of strong interferers in dense cellular environments. |
| Noise Figure | 9.3dB (SSB, fIF = 190MHz) - maintains receiver sensitivity under blocking conditions (e.g., +8dBm blocker → NF = 19dB). |
| LO Drive Range | -3dBm to +3dBm - simplifies LO source design; compatible with low-power synthesizers. |
| Supply Current | 265mA max at VCC = 4.75–5.25V - enables thermal management in compact base-station modules. |
Pinout & Package
The MAX9986ETP+D is housed in a 20-pin thin QFN package (5mm × 5mm) with exposed paddle (EP), optimized for RF thermal dissipation and ground integrity. Pin layout follows JEDEC MO-220 standard T2055-3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 6, 8, 14 | VCC | Power supply inputs - each requires local bypass capacitor; shared 4.75–5.25V rail powers mixer, LO buffer, and IF amplifier. |
| 2 | RF | Single-ended 50Ω RF input - internally matched and DC-shortened via on-chip balun; requires external DC-blocking capacitor. |
| 3 | TAP | RF balun center tap - must be bypassed to GND near IC for optimal balun balance and RF return loss. |
| 4, 5, 10, 12, 13, 17 | GND | Ground terminals - connect directly to exposed paddle; critical for RF stability and thermal conduction. |
| 7 | LOBIAS | LO buffer bias node - connects to VCC via 619Ω ±1% resistor to set LO buffer current and drive capability. |
| 9 | LOSEL | Digital LO select control - logic-low selects LO1, logic-high selects LO2; must be asserted only after VCC stabilization. |
| 11 | LO1 | First single-ended 50Ω LO input - internally matched; requires 82pF DC-blocking capacitor. |
| 15 | LO2 | Second single-ended 50Ω LO input - identical interface to LO1; isolated >49dB from LO1 when unselected. |
| 16 | LEXT | External inductor connection - ties 30nH low-DCR inductor to GND to suppress LO/RF leakage into IF path. |
| 18, 19 | IF-, IF+ | Differential IF outputs - open-collector, 200Ω differential impedance; require external RF chokes to VCC for bias and AC coupling. |
| 20 | IFBIAS | IF amplifier bias node - connects to GND via 953Ω ±1% resistor to set IF gain stage quiescent current. |
| EP | GND | Exposed paddle - must be soldered to PCB ground plane with multiple vias for thermal and RF grounding. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated RF and LO baluns | Enables direct 50Ω single-ended RF/LO interfacing without external transformers or matching networks. |
| SPDT LO switch with 49dB isolation | Supports frequency-hopping architectures (e.g., GSM) with <50ns switching time and minimal LO crosstalk. |
| Dual LO input support (LO1/LO2) | Allows oscillator settling before switching - avoids transient spurs during LO reconfiguration. |
| On-chip LO buffer | Reduces required LO drive to -3dBm to +3dBm, eliminating need for external LO amplifiers in most designs. |
| Differential IF output | Provides inherent 2LO-2RF rejection improvement and superior IIP2 performance vs. single-ended IF topologies. |
| Pin compatibility with MAX9994/MAX9996 | Enables reuse of PCB layout across 815–995MHz and 1700–2200MHz bands - lowers development cost and time. |
Applications
| 850MHz W-CDMA Base Stations | GSM 850/900 EDGE Base Stations |
|---|---|
Use Scenario: Downconverting 815–995MHz W-CDMA uplink signals to 50–250MHz IF in macrocell and microcell base stations. IC Role / Device Role / Timing Role: High-linearity active mixer performing RF-to-IF translation with integrated LO buffering and switching. Use Value: +23.6dBm IIP3 and 9.3dB NF maintain adjacent-channel selectivity and sensitivity in multi-carrier deployments. | Use Scenario: Supporting frequency-hopping receive paths in GSM 850/900 2G/2.5G base stations using dual LO inputs. IC Role / Device Role / Timing Role: LO-switched downconversion mixer enabling rapid LO reconfiguration (<50ns) between hopping frequencies. Use Value: 49dB LO1–LO2 isolation prevents inter-hop interference; -3dBm to +3dBm LO drive simplifies synthesizer integration. |
| cdma2000/iDEN Base Stations | Predistortion Receivers |
Use Scenario: Receiving forward-link signals in cdma2000 and iDEN infrastructure where wide dynamic range and low distortion are critical. IC Role / Device Role / Timing Role: Primary RF front-end mixer providing high gain (10dB) and low noise (9.3dB NF) in wideband CDMA receivers. Use Value: 10dB conversion gain reduces cascaded noise figure impact; 2LO-2RF rejection ≥67dBc minimizes in-band spurious generation. | Use Scenario: Capturing feedback signals in digital predistortion (DPD) loops for power amplifier linearization in LTE/W-CDMA transmitters. IC Role / Device Role / Timing Role: High-fidelity downconverter capturing PA output spectrum with minimal added distortion or noise. Use Value: +23.6dBm IIP3 ensures accurate capture of out-of-band distortion products; differential IF output improves DPD algorithm convergence. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar downconversion mixer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX9984 | Same pinout and functional compatibility; LO range 570–850MHz (low-side injection), not 960–1180MHz. | Designed for low-side LO injection architectures; unsuitable for high-side LO systems requiring MAX9986ETP+D's 960–1180MHz range. | Select MAX9984 only when LO source operates below 850MHz and high-side injection is not required. |
| MAX9994 | Pin-compatible but different RF/LO ranges: RF 1700–2200MHz, LO 1850–2350MHz; same 20-pin QFN package. | Targets PCS/UMTS/LTE higher-frequency bands; cannot replace MAX9986ETP+D in 815–995MHz applications without PCB redesign. | Choose MAX9994 only for 1700–2200MHz band designs sharing common board layout - not a drop-in replacement for MAX9986ETP+D. |
Compared with MAX9984 and MAX9994, the MAX9986ETP+D uniquely supports high-side LO injection in the 815–995MHz band with integrated baluns and LO switching, making it irreplaceable in W-CDMA/GSM 850 base-station receivers requiring that specific RF/LO pairing and feature set.
Availability
The MAX9986ETP+D is available at Aetrix Electronics and suitable for 850MHz W-CDMA base stations, GSM 850/900 EDGE infrastructure, and cdma2000/iDEN receiver modules requiring stable component supply, long-lifecycle support, and consistent RF performance across temperature.
Supply support for MAX9986ETP+D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and RF solutions for communications, industrial, and automotive markets.
The MAX9986ETP+D belongs to Maxim's high-linearity SiGe downconversion mixer product line, engineered specifically for cellular base-station receivers demanding exceptional IIP3, low noise figure, and integrated signal conditioning in compact 5mm × 5mm packages.
FAQ
What is the LO frequency range supported by the MAX9986ETP+D?
The MAX9986ETP+D supports a 960MHz to 1180MHz LO frequency range, optimized for high-side LO injection in 815–995MHz RF applications. This range is fixed per device variant and differs from the MAX9984 (570–850MHz). Operation outside this band degrades spurious and noise performance.
Does the MAX9986ETP+D require external matching components at the RF or LO ports?
No - the MAX9986ETP+D integrates on-chip baluns and matching circuitry for both RF and LO inputs, enabling direct 50Ω single-ended interfacing. Only external DC-blocking capacitors are required at RF, LO1, and LO2; no external transformers or impedance-matching networks are needed.
How is the LO switch controlled on the MAX9986ETP+D, and what is its isolation performance?
The LO switch on the MAX9986ETP+D is controlled by the LOSEL digital input: logic-low selects LO1, logic-high selects LO2. It delivers ≥49dB isolation between LO1 and LO2 at +25°C, with switching time <50ns - sufficient for GSM frequency-hopping requirements. Voltage must be applied to VCC before asserting LOSEL.
What is the recommended bias configuration for the IF amplifier in the MAX9986ETP+D?
The IF amplifier bias is set via a 953Ω ±1% resistor connected from IFBIAS (pin 20) to GND. This value establishes nominal quiescent current; substituting ±5% resistors is acceptable if ±1% parts are unavailable, though performance may vary slightly across temperature and voltage.
Can the MAX9986ETP+D be used in a single-ended IF configuration?
Yes - the MAX9986ETP+D's differential IF outputs (pins 18/19) can be converted to single-ended using an external 4:1 impedance-ratio balun to transform the 200Ω differential impedance to 50Ω. The Typical Application Circuit in the datasheet shows this implementation with T1 balun and RF choke biasing.
MAX9986ETP+D Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- MAX9986E
- Package/Case:
- 20-WQFN Exposed Pad
- Packaging:
- Bulk
- Product Status:
- Obsolete
- RF Type:
- Cellular, DCS, EDGE, PCS, UMTS, WLL
- Frequency:
- 815MHz ~ 1GHz
- Number of Mixers:
- 1
- Gain:
- 10dB
- Noise Figure:
- 9.3dB
- Secondary Attributes:
- Down Converter
- Current - Supply:
- 265mA
- Voltage - Supply:
- 4.75V ~ 5.25V
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-TQFN (5x5)
MAX9986ETP+D FAQ
1.How can I place an order for MAX9986ETP+D through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX9986ETP+D on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX9986ETP+D reliable?
The price and inventory of MAX9986ETP+D are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX9986ETP+D is usually 5 days.
3.What payment methods are accepted for MAX9986ETP+D?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX9986ETP+D transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX9986ETP+D?
MAX9986ETP+D orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX9986ETP+D order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX9986ETP+D?
For technical support, including MAX9986ETP+D datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX9986ETP+D requirements.
6.How does Aetrix verify that MAX9986ETP+D is sourced from the original manufacturer or authorized distributors?
All MAX9986ETP+D products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX9986ETP+D meets industry standards.
7.What is the process for return or replacement of MAX9986ETP+D?
All MAX9986ETP+D units undergo pre-shipment inspection (PSI). If there is an issue with MAX9986ETP+D, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX9986ETP+D part is unused and in its original packaging.
Return procedure for MAX9986ETP+D:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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